This is information on a product in full production.

September 2014 DocID022602 Rev 4 1/16

STL36N55M5

N-channel 550 V, 0.066 Ω typ., 22.5 A MDmesh™ M5 Power MOSFET in a PowerFLAT™ 8x8 HV package

Datasheet — production data

Figure 1. Internal schematic diagram

Features

• Extremely low RDS(on)

• Low gate charge and input

• capacitance

• Excellent switching performance

• 100% avalanche tested

Applications• Switching applications

DescriptionThis device is an N-channel Power MOSFET based on MDmesh™ M5 innovative vertical process technology combined with the well-known PowerMESH™ horizontal layout. The resulting product offers extremely low on-resistance, making it particularly suitable for applications requiring high power and superior efficiency.

Order codeVDS @ TJmax

RDS(on) max

ID

STL36N55M5 600 V 0.090 Ω 22.5 A

Table 1. Device summary

Order code Marking Package Packaging

STL36N55M5 36N55M5 PowerFLAT™ 8x8 HV Tape and reel

www.st.com

Contents STL36N55M5

2/16 DocID022602 Rev 4

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DocID022602 Rev 4 3/16

STL36N55M5 Electrical ratings

16

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 550 V

VGS Gate-source voltage ± 25 V

ID (1)

1. The value is rated according to Rthj-case and limited by package..

Drain current (continuous) at TC = 25 °C 22.5 A

ID (1) Drain current (continuous) at TC = 100 °C 17 A

IDM (1),(2)

2. Pulse width limited by safe operating area.

Drain current (pulsed) 90 A

ID(3)

3. When mounted on FR-4 board of inch², 2 oz Cu.

Drain current (continuous) at Tamb = 25 °C 3.7 A

ID(3) Drain current (continuous) at Tamb = 100 °C 2.2 A

PTOT (3) Total dissipation at Tamb = 25 °C 2.8 W

PTOT (1) Total dissipation at TC = 25 °C 150 W

IARAvalanche current, repetitive or not-repetitive (pulse width limited by Tj max)

7 A

EASSingle pulse avalanche energy

(starting Tj = 25 °C, ID = IAR, VDD = 50 V)510 mJ

dv/dt (4)

4. ISD ≤ 22.5 A, di/dt ≤ 400 A/µs, VPeak < V(BR)DSS, VDD = 340 V

Peak diode recovery voltage slope 15 V/ns

Tstg Storage temperature - 55 to 150 °C

Tj Max. operating junction temperature 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case max 0.83 °C/W

Rthj-amb(1)

1. When mounted on FR-4 board of inch², 2 oz Cu.

Thermal resistance junction-ambient max 45 °C/W

Electrical characteristics STL36N55M5

4/16 DocID022602 Rev 4

2 Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 4. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-source breakdown voltage

ID = 1 mA, VGS = 0 550 V

IDSSZero gate voltage drain current (VGS = 0)

VDS = 550 V 1 µA

VDS = 550 V, TC=125 °C 100 µA

IGSSGate-body leakage

current (VDS = 0)VGS = ± 25 V ±100 nA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V

RDS(on)Static drain-source on- resistance

VGS = 10 V, ID = 16.5 A 0.066 0.090 Ω

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss Input capacitance

VDS = 100 V, f = 1 MHz, VGS = 0

- 2670 - pF

Coss Output capacitance - 75 - pF

CrssReverse transfer capacitance

- 6.6 - pF

Co(er)(1)

1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS

Equivalent output capacitance energy related VGS = 0,

VDS = 0 to 440 V

- 71 - pF

Co(tr)(2)

2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS

Equivalent output capacitance time related

- 192 - pF

RGIntrinsic gate resistance

f = 1 MHz open drain - 1.85 - Ω

Qg Total gate charge VDD = 440 V, ID = 16.5 A,VGS = 10 V

(see Figure 16)

- 62 - nC

Qgs Gate-source charge - 15 - nC

Qgd Gate-drain charge - 27 - nC

DocID022602 Rev 4 5/16

STL36N55M5 Electrical characteristics

16

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max Unit

td(V) Voltage delay time VDD = 400 V, ID = 22 A,

RG = 4.7 Ω VGS = 10 V(see Figure 20)

- 56 - ns

tr(V) Voltage rise time - 13 - ns

tf(i) Current fall time - 13 - ns

tc(off) Crossing time - 17 - ns

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD (1)

1. The value is rated according to Rthj-case and limited by package.

Source-drain current - 22.5 A

ISDM(1),(2)

2. Pulse width limited by safe operating area

Source-drain current (pulsed) - 90 A

VSD (3)

3. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Forward on voltage ISD = 22.5 A, VGS = 0 - 1.5 V

trr Reverse recovery timeISD = 22.5 A, di/dt = 100 A/µsVDD = 100 V (see Figure 17)

- 292 ns

Qrr Reverse recovery charge - 4.2 µC

IRRM Reverse recovery current - 29 A

trr Reverse recovery time ISD = 22.5 A, di/dt = 100 A/µsVDD = 100 V, Tj = 150 °C(see Figure 17)

- 364 ns

Qrr Reverse recovery charge - 6 µC

IRRM Reverse recovery current - 33 A

Electrical characteristics STL36N55M5

6/16 DocID022602 Rev 4

2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance

Figure 4. Output characteristics Figure 5. Transfer characteristics

Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance

ID

10

1

0.10.1 1 100 VDS(V)10

(A)

Ope

ratio

n in

this

area

is

Lim

ited

by m

ax R

DS(on

)

10µs

100µs

1ms

10ms

Tj=150°C

Tc=25°CSingle pulse

AM14937v1

10-5

10-4

10-3 10

-2tp(s)

10-2

10-1

K

0.2

0.05

0.02

0.01

0.1

Single pulse

δ=0.5

Zth PowerFLAT 8x8 HV

ID

60

50

40

00 10 VDS(V)20

(A)

5 15 25

70

6V

7V

VGS=9, 10V

30

20

10

8V

AM14930v1ID

60

40

20

03 5 VGS(V)7

(A)

4 6 8

70

9

10

30

50

VDS=25V

AM14931v1

VGS

6

4

2

00 10 Qg(nC)

(V)

40

8

20 30

10

VDD=440VID=16.5A

50

12

300

200

100

0

400

450VDS

60 70

350

250

150

50

VDS(V)AM14932v1

RDS(on)

0.061

0.059

0.057

0.0550 20 ID(A)

(Ω)

10

0.063

VGS=10V

155

0.067

0.065

0.069

0.071

AM14933v2

DocID022602 Rev 4 7/16

STL36N55M5 Electrical characteristics

16

Figure 8. Capacitance variations Figure 9. Output capacitance stored energy

Figure 10. Normalized gate threshold voltage vs temperature

Figure 11. Normalized on-resistance vs temperature

Figure 12. Source-drain diode forward characteristics

Figure 13. Normalized V(BR)DSS vs temperature

C

1000

100

10

10.1 10 VDS(V)

(pF)

1

10000

100

Ciss

Coss

Crss

AM14934v1 Eoss

6

4

2

00 100 VDS(V)

(µJ)

400

8

200 300

10

500

AM14935v1

VGS(th)

1.00

0.90

0.80

0.70-50 0 TJ(°C)

(norm)

-25

1.10

7525 50 100

ID=250µA

AM05459v3 RDS(on)

1.7

1.3

0.9

0.5-50 0 TJ(°C)

(norm)

-25 7525 50 100

0.7

1.1

1.5

1.9

2.1VGS=10VID=16.5V

AM05460v3

VSD

0 20 ISD(A)

(V)

10 5030 400

0.2

0.4

0.6

0.8

1.0

1.2

TJ=-50°C

TJ=150°C

TJ=25°C

AM05461v3

Electrical characteristics STL36N55M5

8/16 DocID022602 Rev 4

Figure 14. Switching losses vs gate resistance(1)

1. Eon including reverse recovery of a SiC diode.

E

300

200

100

00 20 RG(Ω)

(μJ)

10 30

400

500

600

40

ID=22AVDD=400V

Eon

Eoff

VGS=10V

AM14936v1

DocID022602 Rev 4 9/16

STL36N55M5 Test circuits

16

3 Test circuits

Figure 15. Switching times test circuit for resistive load

Figure 16. Gate charge test circuit

Figure 17. Test circuit for inductive load switching and diode recovery times

Figure 18. Unclamped inductive load test circuit

Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform

AM01468v1

VGS

PW

VD

RG

RL

D.U.T.

2200

μF3.3μF

VDD

AM01469v1

VDD

47kΩ 1kΩ

47kΩ

2.7kΩ

1kΩ

12V

Vi=20V=VGMAX

2200μF

PW

IG=CONST100Ω

100nF

D.U.T.

VG

AM01470v1

AD

D.U.T.

SB

G

25 Ω

A A

BB

RG

G

FASTDIODE

D

S

L=100μH

μF3.3 1000

μF VDD

AM01471v1

Vi

Pw

VD

ID

D.U.T.

L

2200μF

3.3μF VDD

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

AM05540v2

Id

Vgs

Vds

90%Vds

10%Id

90%Vgs on

Tdelay-off

TfallTrise

Tcross -over

10%Vds

90%Id

Vgs(I(t))

on

-off

TfallTrise

-

))

Concept waveform for Inductive Load Turn-off

Package mechanical data STL36N55M5

10/16 DocID022602 Rev 4

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

DocID022602 Rev 4 11/16

STL36N55M5 Package mechanical data

16

Figure 21. PowerFLAT™ 8x8 HV drawing mechanical data

8222871_REV_C

Package mechanical data STL36N55M5

12/16 DocID022602 Rev 4

Table 8. PowerFLAT™ 8x8 HV mechanical data

Dim.mm

Min. Typ. Max.

A 0.80 0.90 1.00

A1 0.00 0.02 0.05

b 0.95 1.00 1.05

D 8.00

E 8.00

D2 7.05 7.20 7.30

E2 4.15 4.30 4.40

e 2.00

L 0.40 0.50 0.60

Figure 22. PowerFLAT™ 8x8 HV recommended footprint

8222871_REV_C_footprint

DocID022602 Rev 4 13/16

STL36N55M5 Packaging mechanical data

16

5 Packaging mechanical data

Figure 23. PowerFLAT™ 8x8 HV tape

Figure 24. PowerFLAT™ 8x8 HV package orientation in carrier tape.

W (

16.0

0±0.

3)

E (1.75±0.1)

F (

7.50

±0.

1)

A0 (8.30±0.1)P1 (12.00±0.1)

P2 (2.0±0.1) P0 (4.0±0.1)

D0 ( 1.55±0.05)

D1 ( 1.5 Min)

T (0.30±0.05)

B0

(8.3

0±0.

1)

K0 (1.10±0.1)

Note: Base and Bulk quantity 3000 pcs

8229819_Tape_revA

Packaging mechanical data STL36N55M5

14/16 DocID022602 Rev 4

Figure 25. PowerFLAT™ 8x8 HV reel

8229819_Reel_revA

DocID022602 Rev 4 15/16

STL36N55M5 Revision history

16

6 Revision history

Table 9. Document revision history

Date Revision Changes

14-Dec-2011 1 First release.

17-Oct-2012 2 Updated: Table 5, 6 and Table 7.: Source drain diode typ. values

24-Jan-2013 3

– Modified: Figure 1: Internal schematic diagram 4 and 6

– Document status promoted from preliminary data to production data

– Modified: VDD on Table 5– Minor text changes

22-Sep-2014 4– Updated title, features and description in cover page.– Updated Figure 1: Internal schematic diagram.– Updated Section 4: Package mechanical data.

STL36N55M5

16/16 DocID022602 Rev 4

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