World Applied Sciences Journal 10(12): 1480-1489, 2010ISSN 1818-4952© IDOSI Publications, 2010

Corresponding Author: Rosli Omar, Faculty of Electrical, University Teknikal Malaysia Melaka, Ayer Keroh, Melaka 75450, Malaysia, E-mail: omarrosli@yahoo.com.

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Voltage Disturbances Mitigation in Low Voltage Distribution System UsingNew Configuration of Dynamic Voltage Restorer (DVR)

Rosli Omar and N.A. Rahim1 2

Faculty of Electrical, University Teknikal Malaysia Melaka, Ayer Keroh, Melaka 75450, Malaysia1

UMPEDAC, Faculty of Engineering, University of Malaya, 50600 Kuala Lumpur, Malaysia 2

Abstract: This paper discusses the design and development of Dynamic Voltage Restorer (DVR) controller forvoltage unbalanced compensation using d-q-o transformation technique. The controller in d-q-o coordinateshas better performance than conventional controllers. The controlled variables in d-q-o coordinates are theninversely transformed to the original voltages which produced reference voltages to a DVR. The performanceof proposed control algorithm has been simulated by MATLAB/SIMULINK SimPower System Toolbox. Aprototype has been developed in order to validate the effectiveness of the proposed control solution.Simulation and experimental results are presented for various conditions of disturbances in the networkincluded unbalance voltage in the supply voltage to show the compensation effectiveness.

Key words: Controller % Dynamic voltage restorer % Voltage unbalance % Matlab/Simulink % D-q-o coordinate% Disturbances

INTRODUCTION basic operation principle of the DVR is to inject an

Several methods are available to prevent equipment through an injection transformer when PCC voltage sag ismal operation due to voltage sags. The two obvious detected. Loads connected downstream are thussolutions, at first sight, are a reduction of the number of protected from the PCC voltage sag [5-6]. The voltagefaults and improvement of equipment immunity. However, sags as defined by IEEE Standard 1159, IEEEexperience has shown that in many practical cases neither Recommended Practice for Monitoring Electric Powerof these methods is suitable. The most common mitigation Quality, is “a decrease in RMS voltage or current at themethod remains the installation of additional equipment power frequency for durations from 0.5 cycles to 1 minute,between the power system and the equipment, either reported as the remaining voltage”. Typical values aredirectly with the equipment terminals or at the customer- between 0.1 p.u. and 0.9 p.u. and typical fault clearingutility interface. The uninterruptable power supply (UPS) times range from three to thirty cycles depending on thehas traditionally been the method of choice for small fault current magnitude and the type of over currentpower, single-phase equipment. For large equipment detection and interruption [7].several methods are in use and under development, one The details of the existing controllers has beenof which is the series voltage controller, also known under applied in DVR can be found in [8-11]. In this paper, thethe name “Dynamic Voltage Restorer” or DVR [1-4]. improvement of d-q-o technique strategy is applied to the

The Dynamic Voltage Restorer (DVR) is a series control of a three phase DVR. The proposed of thecustom power device intended to protect sensitive loads control strategy has the following advantages comparedfrom the effects of voltage sags at the point of common to the existing ones. The improvement of the controller iscoupling (PCC).A typical DVR connected system circuit easy to design and does not much depend to circuitis shown in Figure 1, where the DVR consists of parameters. The dc value of the capacitor and harmonicessentially a series connected injection transformer, a ripple current due to input power circuit can be reduced.voltage source inverter (VSI), inverter output filter and an The controller can detect any disturbance in the networkenergy storage device connected to the dc-link. The very fast. Once the disturbance is detected, the DVR actpower system upstream to DVR is represented by an very quickly in order to correct it and injecting the exactequivalent voltage source and source impedance. The amount of energy required.

appropriate voltage quantity in series with the supply

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Fig. 1: Typical Existing DVR circuit topology (L ,L ,L , C ,C ,C and R ,R ,R ) are installed on low

Fig. 2: Symmetrical components of unbalanced system of placed in the high voltage side in this case, high ordervoltages harmonic currents will penetrates through the injection

The Concept of Voltage Unbalance Using Dynamic the voltage sags/swells at the critical load, DVR produceVoltage Restorer: Figure 1 shows a distribution system a harmonics distortion fed from series transformer aswhich consists of feeder A, feeder B and feeder C. A DVR injection voltage to the critical load. Using the FFTis connected in series between sensitive loads in order to analyzer Voltage Total Harmonic Distortion (VTHD) ofmitigate unbalanced loads or faults in feeder A or B. The 1.4% of the filtering scheme is shown in Figure 3 is satisfypossibility of compensation of voltage unbalance can be the IEEE-519 standard harmonic voltage limit.limited by a number of factors including finite DVR, In DVR the injection transformer must be designedpower rating, different load conditions, background properly according to the voltage required in thepower quality problems and different types of sags secondary side of the transformer. The ratio of the[12-13]. injection transformer will determines the flow of current in

Figure 2 shows the symmetrical components of an the primary side which may affect the performance of theunbalanced system of voltages. These are called positive power circuit devices in DVR which consists of Voltagesequence, negative and zero sequence systems. For a Source Inverter (VSI).perfect balanced system both negative and zero sequence The transformer in DVR can be configured either insystems would be absent. Delta-open or Wye open winding. In order to step-up the

Proposed New Configurations Circuit of Dvr distribution system the series injection transformerMain Circuit of New Configurations: Figure 4 illustrates turn ratio must be calculated. In the proposeda new configuration model of the proposed DVR system configuration as shown in Figure 4, the maximum injectionand the system consists of a DC voltage source (V ), transformer voltage per phase is set to Vinj 1N is equal todc

three single phase injection transformer, a three phase 120 V and single phase voltage line to line of VSL isvoltage source PWM inverter, L-C output filter and about V = 60 V. The comparison of two types ofsensitive loads. In this proposed designed of DVR, transformers can be described as follow;

special attention must be paid on two types ofconfiguration namely:

C Filtering Configuration C Injection transformer winding

Filtering configuration for DVR is very important asit related with the system dynamic response. The filteringsystem of the DVR can be placed either on the highvoltage or the low-voltage side of the injectiontransformer and are referred to as line side filter [14-15]and inverter-side filter [15-18] respectively. In theproposed filtering system as shown in Figure 3, thefiltering scheme is installed for both on the low and highvoltages. The filter inductor, capacitor and resistor

fa fb fc fa fb fc a b c

voltage side between the series converter and thetransformer and the high voltage side(C ,C and C ), when1 2 3

it is place in low voltage side, high order harmonics fromthe three phase voltage source PWM inverter is by passby the filtering scheme and its impact on the injectioncurrent rating can be ignored. The type of this filteringconfiguration can also eliminate switching ripplesproduced by the converter. As for the filtering scheme is

and it will carry the harmonic voltages. When compensate

VSI output voltage to mitigate 50% of voltage sags in the

rms

VSI L-L

( )

1 1202

60inj

Delta openVSI L L

V Va

V Vφ

−−

= = = ( )( )

( )11

( ) 1

3 3 1203.4

60injinj

Wye OpenVSI L L VSI L L

VVa

V Vφφ

φ

−−

− −= = = =

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Fig. 3: THD for voltage of the proposed scheme

Fig. 4: New Configuration of DVR

The turn ratio of the injection transformer In Delta If in case the injection transformer is connected in-Open winding Wye -Open winding

abc

LPF

LPF

LPF

VLa

VLb

VLc

THREE PHASE PLL

+

++

+

d-q-oabc

Amplitude

Vsa

Vsb

Vsc-+

PI

CONTROLLER

Vs REF

VsPWM

ControllerVsa

Vsb

Vsc

+-PI

CONTROLLER

Vdc

VLd

VLq Vq dc

Vd dc

Vq ref

Vd ref

Vsa

ref

Vsb

refVsc

ref

Vdc ref

Block 1

Block 2

Block 3

Block 5

Blo

ck 6

Unbalanced Voltage

Detection

Block 4

PWM1 to PWM6 switches

θ

θ θ

d-q-

o

Vquadrature

La

Lb

Lco

V V

V Q V

VV

α

β

=

1 11

2 22 3 3

03 2 2

1 1 12 2 2

− − −

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Fig. 5: Block Diagram Control of the proposed Scheme of DVR for Unbalanced Voltage

Based on the calculation the high ratio of the C Block 1 is used to convert the three phase loadtransformer winding will increase the primary side current, voltages (V , V , V ) into the "-$-o coordinates asso in the proposed configuration the wye-open winding in equation (1)is used. Control Method of the Proposed Scheme: There are manycontrol schemes reported in the literature for control ofDVR such as instantaneous reactive power theory, power (1)balanced theory, synchronous reference frame theory etc[14]. In this paper a new control method for DVR systemis proposed by using the d-q-o transformation or Park’stransformation for sags/swells detection. The d-q-o Where Q = method gives the sag depth and phase shift informationwith start and end times. The main aspects of the controlsystem are shown in Figure 5 and include the followingblocks:

La Lb Lc

cos sin

2sin cos3

d

q

V V

V Vα

β

θ θ

θ θ

=

cos sin

2sin cos3

d

q

VV

VVα

β

θ θ

θ θ

=

1 0 1

30.5 1

23

0.5 12

a

b

c o

V V

V V

V V

α

β

= −

−

( ) ( ) ( )2 2 223source sa sb scV V V V = + +

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C Block 1 is used to convert the three phase load C Block 6 is the PWM block, this block provides thevoltages (V , V , V ) into the "-$-o coordinates asLa Lb Lc

in equation (1), the three phase load voltagesreference components V V and Vo can be"-ref, "-ref ref

converted to V V (2).d ref and q ref

(2)

Transformation to dqo to abc

(3)

(4)

C Block 2 is considered as a source voltages (V ,sa

V V ). The amplitude of AC voltage at the sourcessb, sc

(V ) can be calculated as follow;source

(5)

C Block 3 is a three phase PLL (Phase-locked loop). Theangle 2 of the source voltage can be obtained usingthree phase PLL. The information extracted from thePLL is used for detection and reference voltagegeneration.

C Block 4 is the detection scheme for the voltageUnbalanced compensator. From Figure 5 shows that,the synchronous frame variables, V and V are usedd q

as inputs for low pass filters to generate voltagereferences in the synchronous frame.

C Block 5 receive the components of the load voltagevectors V ref and V ref and transforms them to threed q

phase coordinates using equation (3) and (4) thegeneration voltages are used as the voltagereference. The DC link error in Figure 5 is used to getoptimized controller output signal because theenergy on the DC link will be changed during theunbalance voltage.

firing for the Inverter switches (PWM1 to PWM6).The injection voltage is generated according to thedifference between the reference load voltage and thesupply voltage and is applied to the voltage sourceconverter (VSC).

Simulation Results: The proposed control scheme for theDVR is validated in this section via MATLAB/SIMULINKSimPower System toolbox. In this paper, the load isrepresented by a series equivalent rated at 200V, 5KVA at0.9 load power factor. A simulation model has beendeveloped in MATLAB/SIMULINK as shown inFigure 4. Simulation and experimental parameters are givenin Table 1. The performance of the DVR for differentsupply disturbances is tested under various operatingconditions. Several simulation of the DVR with proposedcontroller scheme and new configuration of it have beenmade. Figure 6 shows that unbalanced output voltages,positive sequence, negative and zero sequence. In case ofzero sequence all phases are equal. The distortions occurfor both the negative and zero sequence duringtransformation processes from stationary abc referenceframe to d-q-o coordinates. In figure 6 (c) also shows thatthe negative sequence disturbances rotates in theopposite direction.

Experimental Results: In order to validate theeffectiveness of the proposed system a small scaleprototype of DVR was built and tested. The prototypedeveloped based on schematic in Figure 4, all the systemparameters for the hardware designed as shown inTable 1. The prototype is rated to protect 5KVA load 40%voltage sags mitigation and in case of unbalance voltageat the Point of Common Coupling (PCC) is set at 10%-20%. Three phase load comprising of 40 S and 60mHinductor.

Table 1: System Parameters Proposed

Main Supply Voltage per phase 240V

Line Impedance Ls =0.5mH Rs = 0.1

Series transformer turns ratio 1:1

DC Bus Voltage 120V

Filter Inductance 2mH

Filter capacitance 1uF

Load resistance 40

Load inductance 60mH

Line Frequency 50Hz

Switching Frequency 5kHz

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(a) (b)

(c) (d)

Fig. 6: (a) Unbalanced voltage, (b) Positive sequence (c) Negative sequence (d) Zero sequence

The proposed control strategy is implemented The controller has its own ADC converters and PWMdigitally in DSP TMS320F2812. The DSP was selected as pulse outputs. The inputs of a 3-leg Voltage Sourceit has a 32-b CPU which operating at 150MHz. The voltage Converter (VSC) are the PWM pulses which are generatedand current sources were sent to the analog digital by the digital controller. The three phase supply voltageconverter of the DSP. The sampling times are governed by is measured continuously and it then compared with thethe DSP timer called a CpuTimer0 which generates reference voltage in order to regulate load voltageperiodic interrupt at each sampling times Ts. The Interrupt response. If there any disturbances occur, differentService Routine (ISR) will read the sampling value of the between the supply voltage and load voltage, thevoltage and current source from the analog digital different voltage between them will be compensated. Theconverter (ADC) The DSP controller offers a display amount of compensated voltage needs to be injected isfunction, which monitor the disturbances in the real time. calculated and the results of the supply, load andThe control algorithm which is proposed in section II is compensated voltages will be processed by the DSP andtested with a control using DSP TMS 320F 2812. injected to the IGBT switching scheme (PWM1 to

( )

( )

( )

2 2sin sin sin

3 323 2 2

cos cos cos3 3

sad pos

sbq pos

sc

Vt t tVV

Vt t t V

π πθ θ θ

π πθ θ θ

− + = − +

( )

( )

( )

2 2sin sin sin

3 323 2 2

cos cos cos3 3

sad neg

sbq neg

sc

Vt t tVV

Vt t t V

π πθ θ θ

π πθ θ θ

+ − = + −

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PWM2). Positive and negative sequence can be In the prototype developed the maximum sags timeconverted when three voltages are sensed in phase andquadrature components. The conversion process ofpositive and negative sequence can be formulated usingequations (6) - (7).

(6)

(7)

is set to 100 ms as it very fast to detect any disturbancesoccur in the network. It should be mentioned that withthe new configuration of the topology and animprovement of the proposed controller also can detectvoltage swells in the network. Voltage swells can occurmore frequently than other power quality phenomenonand is known as the most important power qualityproblems in the power distribution system. In normalsituation if there is no voltage swells detects in thenetwork, the dc-link capacitor charging current is almostzero. Supply current of the network is equal to loadcurrent which is sinusoidal. When the DVR detect thevoltage swells, the DVR starts to inject an appropriatevoltage for the voltage swells; active power is suppliedfrom the dc-link to the network which causes dc-linkvoltage to drop. So the controller will compared with thereference voltage and inject missing voltage throughinjection transformer. The three phase 20% balancevoltage.

(a) (b)

(c) (d)

Fig. 7: (a) Unbalanced voltage, (b) Positive sequence (c) Negative sequence (d) Zero sequence

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(a) (b)

(c)

Fig. 8: (a)Three phase Unbalanced Voltages (b) Injected Voltages (c) Restoration load Voltages

(a) (b)

Fig. 9: (a)Total Harmonic Distortion Current (THD ) under unstable dc-link (b) Total Harmonic Distortion Current (THD )I I

under stable dc-link

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(a) (b)

(c)

Fig. 10: (a)Three phase 20% balance Voltages Swells (b) Injected Voltages swells (c) Restoration load Voltages

Can be observed in Figure 10(a), the DVR will detect based on the rating of the IGBT. Harmonic current isvoltage swells and injects the missing voltage as shown depending on the DC link voltage. DC side capacitor Cdc1in Figure 10(b). The fast response to detect voltage swells and Cdc2 should be large enough to absord the rippleby the controller will causes the load voltage is secured without the distorting the dc bus voltage much. If there isfrom distortion and this can be illustrated in Figure 10(c). distortion in the dc voltage the inverter output will get

The performance during 10%-20% voltage unbalance distorted with third harmonic content. With the stabilityis illustrated in Figures 7(a). In Figure 7(b), (c) and (d) of the DC bus and the Total Harmonic Distortion forshows that positive sequence, negative and zero current (THD ) for third harmonics current is reduced 7.8sequence. Next, the performance of DVR for a three % to 2.8% as shown in Figures 9(a) and 9(b).phases to ground fault is also investigated. Figure 8 (a)shows that unbalanced three phases fault. Injection CONCLUSIONvoltages produced by DVR is shown in Figure 8(b).Figure 8(c) shows the load voltages restoration using In this research the new configuration of the DVRDVR. From the results show that the load terminal voltage prototype has been proposed. The proposed topology isis restored and help to maintain a balanced and constant capable to mitigate various disturbances in the network.load voltage. A control system based on improvement d-q-o controller

In new configuration of the proposed system, the has been applied to the prototype. The effectiveness ofDC link capacitor acts as an energy storage element of the proposed configuration and improvement of d-q-othe DVR.The DC link of the DVR prototype is determined controller can be seen from Simulation and experimental

I

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results. The implementation of a DSP TMS320F2812 based 9. Madtharad, C., 2002. Premrudeeprceechacharn,on DVR to extract positive and negative sequence was Active Power Filter for Three-Phase Four-Wirediscussed. The experimental results show that the Electric System Using Neural Networks Electricperformance of the DSP controller is satisfactory in Power Systems Res., 60(1): 179-192.mitigating disturbances in the network such as voltage 10. Jain, S.K., P. Agrawal and H.O. Gupta, 2002. Fuzzysags, swells and unbalance voltage in low voltage Logic Controlled Shunt Active Power Filter for Powerdistribution system. Quality Improvement, IEE Procedings-Electric Power

ACKNOWLEDGEMENT 11. Chung, Y.I., D.J. Won, S.Y. Park, S.I. Moon and

The authors wish to thank UM and UTeM for in Dynamic Voltage Restorer System’, Electricalproviding grant under grant PS002/2007B for this project. Power and Energy Systems, 25: 525-531.

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