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Proceedings of the European Conference on Circuit Theory and Design ECCTD '99 Under the Patronage of the European Circuit Society (ECS) With the technical cosponsorship of the Institute of Electrical and Electronic Engineers Region 8 (IEEE Region 8) and the IEEE Circuits and Systems Society (IEEE-CAS) 29 August - 2 September 1999 Stresa - Italy Volume II Editors: C. Beccari, M. Biey, P.P. Civalleri, M. Gilli With the cosponsorship of The Commission of the European Communities, Brussels Ministcro degli Affari Esteri, Roma Politecnico di Torino Dipartimento di Elettronica, Politecnico di Torino

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Page 1: ofthe European Conference Circuit Theory and Design · 2008-07-15 · AContinuous-Time CMOSCommon-Mode Feedback Circuit (CMFB) with Gain 313 Partitioning UsingReplica Bias GerryQuilligan

Proceedings of the

European Conference

on Circuit Theory and DesignECCTD '99

Under the Patronage of the European Circuit Society (ECS)With the technical cosponsorship of the Institute of Electrical

and Electronic Engineers Region 8 (IEEE Region 8) and the

IEEE Circuits and Systems Society (IEEE-CAS)

29 August - 2 September 1999

Stresa - Italy

Volume II

Editors: C. Beccari, M. Biey, P.P. Civalleri, M. Gilli

With the cosponsorship of

The Commission of the European Communities, Brussels

Ministcro degli Affari Esteri, Roma

Politecnico di Torino

Dipartimento di Elettronica, Politecnico di Torino

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TABLE OF CONTENTS pag.

Volume I

SESSION SOI: ANALOG CIRCUITS FOR INDUSTRIALAPPLICATIONS

A MOSFET-R-C Filtering TechniqueWith Improved Linearity 01M. Banu (Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA), N. Lifshitz

(Independent Consultant, formerly with Bell Laboratories, Lucent Technologies,Murray Hill, NJ, USA).

Considerations for the Design of a 10.7MHz Bandpass Sigma-Delta Modulator 05D. Tonietto, P. Cusinato, F. Stefani (STMicroelectronics s.r.L, Milano, Italy), A. Baschirotto

(Universita di Leccc, Lecce, Italy).

Novel CMFB Circuits for SC Stages with Large Common-Mode Input 09

B. Wang (Marveil Semiconductor, Inc., Sunnyvale, CA, USA), Gabor C. Temes

(Oregon State University, Corvallis, OR, USA).

Voltage Down Converter for High Speed SRAMs 13

D. Montanari, M. Whately, K. Murray, C. Phelan (Cypress Semiconductor, San Jose, CA, USA).

A Fully Integrated BiCMOS AM/FM Car Active Antenna with On-Board Battery 17

Voltage RegulatorS. Brigati, F. Francesconi (Micronova Sistemi S.r.L, Trivolzio, Italy), P. Malcovati, F. Maloberti

(Universita di Pavia, Pavia, Italy), M. Poletti (Micronova Sistemi S.r.L, Trivolzio, Italy).

Low-Power and Low-Voltage RF Circuits Integrated in a Standard Digital CMOS Process 21

T. Melly, A. -S. Porret (EPFL-LEG, Lausanne, Switzerland), C. Enz, E. Vittoz (CSEM, Neuchatel,

and EPFL-LEG, Lausanne, Switzerland).

SESSION S02: TRANSPONDER CIRCUITSAND SYSTEMS FOR RFID

RFID-Technology - Recent Development and Future Requirements 25

C. Kern (Sihl GmbH, Dueren, Germany).

Dynamic Performance of Inductive RFID Systems 29

M. Beigel (Beigel Technology Co., Encinitas, CA, USA).

Combined Radio Frequency Identification, Automatic Vehicle Detection and Train Position 34

Location

F. Petersen (Traffic Supervision Systems A/S, Lyngby, Denmark).

System Evaluation, Analog Front End Design Considerations and Software Concept for the 37

TIRIS Digital Receiver Module

T. FlaxI (Texas Instruments, Freising, Germany).

The Advantages ofAsynchronous versus Synchronous Circuit Designs for Use inPassive RFID 41

ApplicationsY. Lee, S. Poulin, P. Sorrels (Microchip Technology Inc., Chandler, AZ, USA).

A Low-Power Digital Signature Transponder IC for High-Performance RFID Authentication 45

U. Kaiser, R. Friebel, R. Ganz, H. Meier, W. Steinhagen, A. Sabetti (Texas Instruments, Freising,

Germany).

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SESSION S03: NONLINEAR TOOLS FOR SIGNALANALYSIS

Chaotic Lightwave Communications and Some Ideas on Using Nonlinear Dynamics 49

Henry D.I. Abarbanel (University of California, San Diego, CA, USA).

Noise Reduction for Human Speech Signals by Nonlinear Filters 54

R. Hegger, H. Kantz, L. Matassini (Max-Planck-Institut, Dresden, Germany).

Nonlinear Approach to Signal Coding and Compression 58

H. Dedieu (Swiss Federal Institute of Technology, Lausanne, Switzerland), M. J. Ogorzalek(University of Mining and Metallurgy, Krakow, Poland).

Prediction and Analysis of Spatio-Temporal Data Using TSTOOL 62

U. Parlitz, C. Merkwirth (University of Gottingen, Gottingen, Germany).

SESSION S04: APPLICATIONS OFSYMBOLIC CIRCUITANALYSIS

Symbolic Modeling and Analysis of Analog Integrated Circuits 66

R. Sommer, E. Hennig, M. Thole, T. Halfmann, T. Wichmann

(ITWM, University of Kaiserslautern, Germany).

Calculation of First- and Second-Order Symbolic Sensitivities in Sequential Formvia the 70

Transimpedance MethodF. Balik (Wroclaw University of Technology, Wroclaw, Poland), B. S. Rodanski

(University of Technology, Sydney, Australia).

Using Term Ordering to Improve Symbolic Behavioral Model Generationof Nonlinear 74

Dynamic Analog Circuits

L. Niithke, R. Popp, L. Hedric, E. Barke (University of Hannover, Hannover, Germany).

On theValidity Region of Behavioural Models 78

O. Guerra, J. D. Rodriguez-Garcia (IMSE-CNM, Sevilla, Spain), L. Garcia (School of

Engineering, Sevilla, Spain), F.V. Fernandez, R. Dominguez-Castro,A. Rodriguez-Vazquez (IMSE-CNM, Sevilla, Spain).

Fault Diagnosis ofAnalog Circuits Using Symbolic Analysis Techniques 82

G. Fedi, R. Giomi (Universita di Firen/e, Fircn/.e, Italy), A. Luchctta (Universita della Basilicata,

Potenza, Italy), S, Manelli, M, C. Piccirilli (Universita di Firenze, Fircnzc, Italy).

Symbolic Analysis of CMOS Regenerative Comparators 86

Gcert Van der Plas, W. Daems, W. Verhacgen, E, Lauwers, J. Vandenbussche, G. Gielen, W.

Sanson (ESAT-M1CAS, Heverlee, Belgium).

90

SESSION ROI:ANALOG CIRCUITS -1

A New Versatile Building Block: Current Differencing Buffered Amplifier and Its

ApplicationsSerdar Ozoguz, Ali Toker, Muhammed A. Ibrahim, Cevdet Acar (Istanbul Technical University,Istanbul, Turkey).

A Low Voltage High Output Impedance Tail Current Source and Its Application to a 94

Differential AmplifierEitake Ibaragi, Akira Hyogo, Keitaro Sekine (Science University of Tokyo, Tokyo, Japan).

A Highly Linear V-I Converter 98

Mikko Waltari, Saska Lindfors, Kari Halonen (Helsinki University of Technology, Espoo,

Finland).

VIII

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Low-voltage High-Frequency MOS Transconductor 102J. Sabadell, S. Celma, C. Aldea, P. A. Martinez (Universidad de Zaragoza, Zaragoza, Spain).

Submicron Regulated Cascoding for a Low-V Fast-Settling OTA 106Esa Tiiliharju, Kari Halonen (Helsinki University of Technology, Espoo, Finland).

High Output Impedance Current-Mode Multifunction Filter with Dual Output CCIIs 110

Providing Wide Dynamic RangeHakan Kuntman (Istanbul Technical University, Istanbul, Turkey), Oguzhan Cicekoglu (BogaziciUniversity, Istanbul, Turkey).

SESSIONR02: LOWPOWER DESIGN

Transistor Sizing for Switching Activity Reduction in Digital Circuits 114Christian V. Schimpfle, Artur Wroblewski, Josef A. Nossek (Munich University of Technology,Munich, Germany).

A Low Power Hand-Over Mechanism for Gated-Clocks FSMs 1 i 8

Bengt Oelmann, Mattias O'Nils (Mid Sweden University, Sundsvall, Sweden).

A Simple Control for FFT Coefficient Access 122Yulai Ma, Lars Wanhammar (Linkoping University, Linkoping, Sweden).

A IV 450 uW CMOS Fully Integrated Bandpass Filter for Pager Applications 125H. Hashemi, A. Parsa, K. Shakeri, A. Fotowat (Sharif University of Technology, Tehran, Iran), A.

Rofougaran (University of California, Los Angeles, CA, USA).

Adiabatic Gates: a Critical Point of View 129M. Alioto, G. Palumbo (Universita di Catania, Catania, Italy).

A Low-Power Pipelined Map Overlaying Architecture for Hand Held Applications 133

Wael M. Badawy, MagdyA. Bayoumi (University of Southern Louisiana, Lafayette, LA, USA).

SESSIONR03:ANALOGAND DIGITAL ICs -1

A Low-voltage High-Speed Sense Amplifier for Multilevel Nonvolatile Memories 137

Cristiano Calligaro (MAPP Technology, Milano, Italy), Alessandro Manstretta

(STMicroelectronics, Agrate Brianza, Italy), Andrea Pterin, Paolo Rolandi (STMicroclectronics,Pavia, Italy), G. Torelli (Universita di Pavia, Pavia, Italy).

A Novel Capacitive Circuit Architecture for Compact Realisation of Flash Analog-Digital 141

Converters

R. Baumgartner (Worcester Polytechnic Institute, Worcester, MA, USA), A. Schmid (SwissFederal Institute of Technology, Lausanne, Switzerland), D. Bowler, Yusuf Leblebici (WorcesterPolytechnic Institute, Worcester, MA, USA).

Word-line Read Voltage Regulator with Capacitive Boosting for Multimegabit Multilevel 145

Flash Memories

Osama Khouri (Universita di Pavia, Pavia, Italy), R. Micheloni (STMicroelectronics, AgrateBrianza, Italy), I. Motta, G. Torelli (Universita di Pavia, Pavia, Italy).

The Design of the GRAVITY Asynchronous Processor Core 149

Francesco Pessolano, Martin E. Bush, Dave Protheroe (South Bank University, London, UK).

Current-Mode Approach in High-Speed Low Power A/D Converters 153

Grzegorz Gesiarz, Zygmunt Ciota, Andrzej Napieralski (Technical University of Lodz, Lodz, Poland).

IX

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SESSION R04; POWER ELECTRONICSAND SYSTEMS -1

Analysis of Class D-E Resonant DC/DC Converter Using Thinned-out Method 157

Hirotaka Koizumi (Keio University, Yokohama, Japan), Shinsaku Mori (Nippon Institute of

Technology, Saitama, Japan), Iwao Sasase (Keio University,Yokohama, Japan).

High-Performance Gate Unit Driving a Multiple Connection of Insulated Gate Devices 161

G. Greco, A. Raciti (Universita di Catania, Catania, Italy), G. Belverde, A. Galluzzo, M. Melito,

S. Musumeci (STMicroelectronics, Catania, Italy).

Class E2 Converter with +/- Output Voltage 165

Itsda Boonyaroonate, Shinsaku Mori (Nippon Institute of Technology, Saitama, Japan).

A CMOS Audio Power Amplifier Driving 8Vpp into a 7 Ohm Resistive Load 169

S. Brigati, F. Francesconi (Micronova Sistemi Sri, Trivolzio, Italy), P. Malcovati (Universita di

Pavia, Italy), M. Poletti (Micronova Sistemi Sri, Trivolzio, Italy).

Characteristic Coefficients of DC-DC Switching Converters 173

Elena Niculescu, Eugen-Petrisor Lancu (University of Craiova, Romania).

SESSION R05: NONLINEAR CIRCUITSAND SYSTEMS I CHAOS,BIFURCATIONSANDAPPLICATIONS

Experimental Confirmation of Nonlinear HM Synchronization for Chua's Circuit 177

M.E. Yalcin, J. A. K. Suykens, J. Vandewalle (K. U. Lcuven, ESAT-SISTA, Lcuven, Belgium).

Decomposed Canonical State Models of the Third-Order Piccewise-Linear Dynamical Systems 181

Jiri Pospisil, Jaromir Brzobohaty, Zdenek Kolka, Jana Horska (Brno University of Technology,Brno, Czech Republic).

An Extended Two-Port Van Der Pol Model for the Efficient Simulation of Injection-Locked 185

Oscillator Steady-State and Transient ResponseEnrico F. Calandra, Claudio Maniscalco (Universita di Palermo, Palermo, Italy).

Topology and Dynamics of Mutual Inductors with Ferromagnetic Non-Linearity 189

S. Leva, A.P. Morando (Politecnico di Milano, Milano, Italy).

A Tailed Tent Map Chaotic Circuit Exploiting S2I Memory Elements 193

S. Callegari, R. Rovatti (Universita di Bologna, Bologna, Italy), G. Setti (Universita di Ferrara,

Ferrara, Italy).

SESSION R06: DIGITAL FILTERS AND FILTER BANKS -1

Realization of Low-Sensitivity IIR Digital Filters with Hypercomplex Coefficients 197

Hiroshi Adachi, Kazuhiro Okabayashi, Shin-ichi Takahashi (Keio University, Yokohama, Japan).

A Novel Technique for the Design of QMF Filter Banks with Approximately Linear Phase, 201

Based on Allpass Filters

S. S. Lawson, A. Klouche-Djedid (University ofWarwick, Coventry, UK).

Linear-Phase Paraunitary FIR Filter Banks with Unequal Lenghts (ULLPPUFB) 205

Toshichika Urushibara, Takayuki Nagai, Masaaki Ikehara (Keio University, Yokohama, Japan).

AnalyticalApproach to the Design of FIR Filters 209

Miroslav Vlcek, Pavel Zahradnik (Czech Technical University, Prague, Czech Republic), Rolf

Unbehauen (University of Erlangen-Nurnberg, Erlangen, Germany).

Improved Scaling for Block Digital Filters 213

M. Gaida, E. LUder (University of Stuttgart, Stuttgart, Germany).

X

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SESSIONR07:ANALOGFILTERS -1

CMOS Gnl-C Biquadratic Stage for PRML Read Channel Applications 217Adrian Ryan, Marias Neag, Oliver McCarthy (University of Limerick, Limerik, Ireland).

CMOS Low-Noise Asymmetrical Poly-Phase Filter for GMS Low-IF Radio Receivers 221

Jan H. Mikkelsen (Aalborg University, Aalborg, Denmark).

Simulation and Realization of OTA-BasedActive-C Filters 225

Umesh Kumar (JIT Delhi, New Delhi, India), M. N. Doja, Moinuddin (Jamia Millia Islamia

University, Okhla, New Delhi, India).

Biquad Based on a Generalized Divider Structure 229

Dasa Ticha (University of Zilina, Zilina, Slovak Republic), Pravoslav Martinek (Czech Technical

University, Prague, Czech Republic).

New Current-ModeAllpass Filters Using Current Feedback Amplifier 233

R. Nandi, S.K. Sanyal (Jadvpur University, Calcutta, India), T.K. Banerjee (Hooghly Institute of

Technology, Hooghly, India).

SESSION R08: TESTING: ANALOG, DIGITALAND MIXED I VLSI

PHYSICALDESIGN

A Novel CMOS Standard Cell Structure for Self-Routed Clock Net Generation 235

F. K. Gurkaynak, I. Hatirnaz, Yusuf Leblebici (Worcester Polytechnic Institute, Worchester, MA,

USA).

Use of Linear Models to Optimize Test Procedures for Mixed-Signal integrated Circuits 239

Cartsten Wegener, M. P. Kennedy (University College Dublin, Dublin, Ireland).

Description of the DC Fault Dictionary in the Measurement Space 243

J. Rutko.swski, J. Machniewski (Silesian University of Technology, Gliwice, Poland).

On Reducing the Peak Power Consumption of Test Sequences 247

F. Corno, M. Rebaudengo, M. Sonza Reorda, M. Violante (Politecnico di Torino, Torino, Italy).

Generation of Minimal Delay Routing Trees in Presence of Obstructions 251

Eugene Shragowitz, Jian Liu (University of Minnesota, MN, USA).

PLENARY SESSION: TUTORIALS T2

Network Synthesis: Some Modern Applications 255

J. O. Scanlan (University College Dublin, Dublin, Ireland).

Chaotic Communications Over a Noisy Channel 256

M. Hasler (Swiss Federal Institute ofTechnology, Lausanne, Switzerland).

SESSION S05 -1: LOW-COMPLEXITYDIGITAL FILTERS -1

Graphical Methods for Efficient Multiplier Design: Theory and Algorithms 257

A. G. Dempster (University of Westminster, London, UK), M. D. Macleod (University of

Cambridge, Cambridge, UK).

Graphical Methods for Efficient Multiplier Design: Application to Digital Filters 261

A. G. Dempster (University of Westminster, London, UK), M. D. Macleod (University of

Cambridge, Cambridge, UK).

XI

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FIR Multiplierless Cellular Networks 265

S. Samadi (University of Electro Communications, Tokyo, Japan), A. Nishihara (Tokyo Institute

of Technology, Tokyo, Japan), H. lwakura (University of Electro Communications, Tokyo, Japan).

Design of Signal Word Decomposed Filters with Optimal Filter Length and Coefficient 269

Wordlength Assignment to Each Subfilter

M. Yagyu (Texas Instruments, Tsukuba, Japan), A. Nishihara (Tokyo Institute of Technology,Tokyo, Japan).Reduced Complexity Primitive Operator FIR Filters for Low Power Dissipation 273

D. H. Horrocks,Y. Wongsuwan (Cardiff University, Cardiff, UK).

Short Wordlength Selective IIR Filters 277

M. D. Lutovac (IRITEL, Belgrade, Yugoslavia), L. D. Milic (Mihajlo Pupin Institute, Belgrade,Yugoslavia).

SESSION S06: INTEGRATED CIRCUITS FOR WIRELESSCOMMUNICATIONS

High-Performance Integrated RF Passives

Markku Aberg, Hannu Ronkainen, Tarja Riihisaari, Hannu Kallclus (VTT Electronics, Espoo,Finland),

Phase Noise in LC Oscillators

Qiuting Huang (Swiss Federal Institute ofTechnology, Zurich, Switzerland).

Design of an Integrated Transmitter for Broadband ApplicationsC. De Ranter, M. Borremans, M. Sleyaerl (ESAT-MICAS, K.U, Leuven, Leuven, Belgium).

A 2.56-GHz Continuous-Time Sigma-Delta ModulatorF. Belfiore (STMicroelectronics s.r.L, Catania, Italy), G. Palmisano, R. Salerno (Universita di

Catania, Catania, Italy).

High Frequency Resolution 2.4GHz Band Rapid Frequency Change SynthesizerEiji Okada, Takahiro Oie, Tadamitsu Irilani (University of Tokushima, Tokushima, Japan).

Si BJT Negative-Conductance Circuit Topologies for GIIz-Range Oscillators

Kari Stadias, Rislo Kaunisto, Veikko Porra (Helsinki Univ. of Tech., Helsinki, Finland).

SESSION R09: ANALOG CIRCUITS - II

A Continuously Adjustable Video-Frequency Current Amplifier for Filter Applications 305

Hanspeter Schmid, George S. Moschylz (Swiss Federal Institute of Technology, Zurich,Switzerland).

New Controlled Oscillator with Grounded Resistances Based on Current Conveyors 309

Hcrve Barthelemy (Laboratoire LEMM1, ISEM, Toulon, France), Alain Fabre (Laboratoire IXL,University dc Bordeaux, Talence, France).

A Continuous-Time CMOS Common-Mode Feedback Circuit (CMFB) with Gain 313

Partitioning Using Replica Bias

Gerry Quilligan (University of Limerick, Limerik, Ireland), Philip Burton (PEI, Limerick, Ireland).

Switched Current Circuits with Simple Programmable Transconductance Amplifiers 317

\.ndrzej Mazurek (Technical University of Koszalin, Poland).

n the Frequency Response of M-Channel Mixed Analog and Digital Maximally Decimated 321

Iter Banks• Lowenborg, Hakan Johansson, Lars Wanhammar (Linkoping University, Linkoping, Sweden).

281

285

289

293

297

301

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An OTA Consisting of Pair-MOSFET's for Low Power Supply Voltage 325

Kawori Takakubo (Tokai University, Kanagawa, Japan), Shigetaka Takagi (Tokyo Institute of

Technology, Tokyo, Japan), Hajime Takakubo (Chuo University, Japan), Nobuo Fujii (TokyoInstitute ofTechnology, Tokyo, Japan).

SESSION S07: HARMONICBALANCE TECHNIQUES: CIRCUITSAND BEYOND

Signal and Noise Analysis of Large Nonlinear Microwave Circuits by Advanced Harmonic- 329Balance TechniquesV. Rizzoli, F. Sgallari, F. Mastri (Universita di Bologna, Bologna, Italy), C. Cecchetti (FondazioneUgo Bordoni, Pontecchio Marconi, Italy), A. Lipparini (Universita di Bologna, Bologna, Italy).

Harmonic Balance Techniques Allow Nonlinear Simulations of Microwave Circuits from 333Devices to SubsystemsR. Qu6r6, J. Obregon, E. Ngoya, R. Sommet (IRCOM CNRS, Universite de Limoges, France).

Harmonic Balance Analysis of Large-Scale Circuits and Semiconductor Devices 337Boris Troyanovsky (Hewlett-Packard Company, Santa Rosa, CA, USA).

Harmonic Solution of Boltzmann's Transport Equation for Microwave and Millimetre-Wave 341

Active Device ModellingG. Acciari, F. Giannini (Universita di Roma 'Tor Vergata', Roma, Italy), G. Leuzzi (UniversitadeiPAquila, L'Aquila, Italy).

A Spectral Approach to the Computation ofFloquet Multipliers for the Bifurcation Analysis 345

of Limit CyclesF. Bonani, M, Gilli (Politecnico di Torino, Torino, Italy).

General-Purpose Electron Device Model Based on Non-Linear Discrete-Time Convolution 349

F. Filicori, A. Santarelli, P. A. Traverso (Universita di Bologna, Bologna, Italy), G. Vannini

(Universita di Ferrara, Ferrara, Italy).

SESSION RIO: CHAOS, BIFURCATIONSANDAPPLICATIONS -1

Performance Analysis ofImpulsive Synchronization 353

Makoto lion, N. Yamamoto (Fukuoka Institute of Technology, Fukuoka, Japan), Tao Yang, Leon

O, Chua (University of California, Berkeley, CA, USA).

Synchronization and Clustering of Phases in Coupled Network with Wien-Bridge 357

Oscillators

Seiichiro Moro (Fukui University, Fukui, Japan).

All Periodic Orbits with Period n <26 for the Henon Map 361

Zbigniew Galias (University of Mining and Metallurgy, Krakow, Poland).

Synchronization Method of Hyperchaotic Circuits Based on a Scalar Transmitted Signal 365

M. Brucoli, D. Cafagna, L. Carnimeo (Politecnico di Bari, Bari, Italy).

Electro-Thermal Nonlinear Phenomena in Power Diodes 369

Angelo Brambilla, Amedeo Premoli, Giancarlo Storti-Gajani (Politecnico di Milano, Milano,

Italy).

Chaos-Based FM of Clock Signals for EMI Reduction 373

R. Rovatti (Universita di Bologna, Bologna, Italy), G. Setti (Universita di Ferrara, Ferrara, Italy),

S. Graffi (Universita di Bologna, Bologna, Italy).

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SESSION RlI: PEL / DELTA-SIGMA MODULATORS

Explosion of Strange Attractors and Crisis Induced Intcrmittcncy from a Forced Phase- 377Locked Loop Circuit: Theory and ExperimentsTetsuro Endo (Meiji University, Kawasaki, Japan), Wataru Ohno (Toyota National College of

Technology, Toyota", Japan), Yoshisuke Ueda (Kyoto University, Kyoto, Japan).

Phase-Jitter Bounds in DPLLs - Low-Denominator Rational Resonance 381

Alexey Teplinski (Academy of Sciences, Kiev, Ucraine), Orla Feely (University College Dublin,

Dublin, Ireland).

Dynamical Analysis of Certain Bandpass Sigma-Delta Modulators 385

Ina Taralova-Roux, Orla Feely (University College Dublin, Dublin, Ireland).

On Stability Issues of Lowpass Sigma-Delta Modulators 389

Jurgen van Engelen (Technical University of Eindhoven, The Netherlands), Domine Leenaerts

(Philips Research Laboratories, Eindhoven, The Netherlands), Rudy van de Plassche (TechnicalUniversity of Eindhoven,The Netherlands).

Signal Distortion and Wave-Form Conversion in a Classical PLL 393

Mart Min, Velio Mannama, Toivo Paavle (Tallinn Technical University, Tallinn, Estonia).

SESSION SOS - II: LOW-COMPLEXITYDIGITAL FILTERS - II

An Interleaved Architecture for Lattice FIR Filters

F. Yu, A. N. Willson, Jr. (University of Cali I'ornia, Los Angeles, CA, USA).

Design of Optimal Finite Wordlength FIR Digital Filters

D. M. Kodek (University of Ljubljana, Ljubljana, Slovenia),

Polyphase Realizations of Fractional Sample Rate Converters

H. G. Goeckler (Ruhr-Univcrsitaet Bochum, Bochum, Germany).

Efficient Multirate Digital Filters Based on Fractional Polyphase Decomposition for

Subnyquist ProcessingH. G. Goeckler, A. Grolh, CM. Flatten (Ruhr-Univcrsitaet Bochum, Bochum, Germany).

A Comparison of FIR and IIR Digital Filters Satisfying Magnitude and Phase SpecificationsM. C. Lang (Vienna University of Technology, Vienna, Austria).

SESSION S08 -1: RECENT TRENDS IN ANALYSISAND DESIGNOF HIGH SPEED INTERCONNECTS -1

Operating Frequency Trends For High Performance Off-Chip Buses 417

George A. Katopis (IBM Corp., Poughkeepsie, NY, USA).

Recent Development in Interconnect Analysis and Simulation Based on Distributed Models 421of Transmission Lines

Ernest S. Kuh, Janet M. L. Wang (University of California, Berkeley, CA, USA).

Simulation of Distributed Interconnects with Frequency Dependent Parameters Using 425

Krylov-Space TechniquesP. Gunupudi, R. Achar, M. Nakhla, A. Dounavis (Carleton University, Ottawa, Canada).

Advanced Techniques for the Modeling and Simulation of Interconnects 429

Jos6 Schutt-Aind (University of Illinois at Urbana-Champaign, Urbana, IL, USA).

Power Analysis of Large Interconnect Grids with Multiple Sources Using Model Reduction 433

Eli Chiprout, Tuyen Nguyen (IBM Austin Research Lab., Austin, TX, USA).

397

401

405

409

413

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SESSION S09: COMMUNICATING WITH CHAOS

Chaotic Communications: State of the Art 437M. P. Kennedy (University College Dublin, Dublin, Ireland).

Robust Chaotic Synchronisation for Communications 441C. Williams (Communications Dept., DERA Malvern, Malvern, UK).

Robust Chaotic Communications without Synchronization 445G. Kolumban, B. Frigyik (Technical University of Budapest, Budapest, Hungary).

Chaos-Based DS-CDMA: Results and Open Problems 449G. Mazzini (Universita di Ferrara, Ferrara, Italy), R. Rovatti (Universita di Bologna, Bologna,Italy), G. Setti (Universita di Ferrara, Ferrara, Italy),

Piecewise Affine Markov Maps for Chaos Generation in Chaotic Communication 453M. Delgado-Restituto, A. Rodriguez-Vazquez (Instituto de Microelectronica de Sevilla, Sevilla,Spain).

SESSION R12: NUMERICALMETHODSAND CIRCUITSIMULATION -1

Dynamic Model of PWM Zero-voltage Transition Boost Converter. Large-Signal Analysis 459Y. Berkovich, A. Ioinovici (Institute for Technological Education Holon, Holon, Israel).

On the Boundary Crossing of Linear Regions in Piecewise-Linear DC Analysis 463

J. Roos, M. Valtonen (Helsinki University ofTechnology, Espoo, Finland).

An Effective Algorithm for Finding all the DC Solutions of MOS Transistors Circuits 467

Represented by Original Polynomial Nonlinearities

M. Tadeusiewicz, S. Halgas (Technical University ofLodz, Lodz, Poland).

Steady-State Analysis of LSI Circuits Coupled with Multi-Conductor Transmission Lines 471

Akio Ushida, Yoshihiro Yamagami, Yoshifumi Nishio (Tokushima University, Tokushima, Japan).

The Charge - Flux Method in Simulation of First Kind Switched Circuits 475

Jan Ogrodzki, Marcin Skowron (Warsaw University ofTechnology, Warsaw, Poland).

A New Technique for the Formulation of the Constraint Equations for Time-Variant 479

Topology Electrical Circuits

G. Acciani, E. Chiarantoni, G. Fornarelli, F. Vacca (Politecnico di Bari, Bari, Italy).

SESSION R13: ELECTROMECHANICAL SYSTEMS I SENSORS I ROBOTICS

A Digitally Enhanced Resolution Technique for Rotary Encoder Systems 483

F. Cherchi (Universita di Pavia, Pavia, Italy), L. Gonzo (Istituto Trentino di Cultura, Trento, Italy),V. Liberali, G. Torelli (Universita di Pavia, Pavia, Italy).

A CMOS Monolithic Optical Head for High-Resolution Position Encoders 487

D. Stoppa, L. Ravezzi (Universita di Trento, Trento, Italy), G. F. Dalla Betta, M. Gottardi, G.

Soncini (Istituto per la Ricerca Scientifica e Tecnologica, Povo, Trento, Italy).

Path Planning by Unsupervised Neural Nets for a Planar Robot Moving among Unknown 491

Obstacles

G. Martinelli, F. M. Frattale Mascioli, A. Rizzi, W. Iandolo (Universita di Roma "La Sapienza",Roma, Italy).

Integrated Interface Electronics for a Hall Magnetic Sensor 495

Z. Randjelovic, M. Kayal, R. S. Popovic (Swiss Federal Institute of Technology, Lausanne,

Switzerland).

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A Thermodynaniic-Circuital Approach to the Theory of Time-Varying Inductive Electro- 499

Mechanical Multi-Ports

C. M. Arturi, A. Gandelli (Politecnico di Milano, Milano, Italy).

SESSION RI4: ANALOGANDDIGITAL ICs - II

CMOS Voltage Buffer with Resistive Frequency Compensation 503

Marius Neag, Oliver McCarthy (University of Limerick, Limerick, Ireland).

Low-Voltage Current-Mode Gates for MAD Systems 507

Piotr Pawlowski, Andrzej Guzinski (Technical University of Koszalin, Koszalin, Poland).

Aries: A Compact Modular Macro-Block for Digital FilteringApplications 5 ] i

F. K. Gurkaynak, Yusuf Leblebici (Worcester Polytechnic Institute, Worcester, MA, USA).

Switched-Current Implementation of an Image Processor for Portable Digital Cameras 515

Andrzej Handkiewicz, Marcin Lukowiak, Marek Kropidlowski (Poznan University of

Technology, Poznan, Poland).

Comparison on CMOS Full Adders in Different Design Styles with Emphasis on Low-Power 519

TopologiesM. Aliolo, G. Palumbo (Universita di Catania, Catania, Italy).

High-Linearity Digitally Programmable Components For Continuous-Time Signal 523

ProcessingS. Cclma, J. Sabadell, C. Aldea, P. A. Martinez (Universidad de Zaragoza, Zaragoza, Spain).

SESSION Rl5: NEURAL NETWORKS -1

Sclforganizing Neural Networks Versus Neurofuzzy Networks 527

Stanislaw Osowski, Tran Hoai Linh, Kr/.ysztof Siwek (Warsaw University of Technology,Warsaw, Poland).

A New Sufficient Condition for Global Stability of Neural Networks 531

Sabri Arik (Istanbul University, Istanbul, Turkey), Vedat Tavsanoglu (South Bank University,

London, UK).

Design Method of Limit Cycle Generator by Cyclic Connected Neural Networks 535

Tern Yoncyama (Shi/.uoka University, Hamamalsu, Japan), Hiroshi Ninomiya (Shonan Institute of

Technology, Japan), Hidcki Asai (Shi/.uoka University, Hamamalsu, Japan).

Dual Extended Kalman Filter Algorithm for Training RBF Networks 539

lulian Ciocoiu (Technical University of Iasi, lasi, Romania).

SESSIONS08 - II: RECENTTRENDS INANALYSISANDDESIGN OF

HIGH SPEEDINTERCONNECTS - II

Influence of Frequency-Dependent Characteristics on Deep Submicron Crosstalk Simulations 543

Hartmut Grabinski, Dieter Treylnar, Uwe Arz, Klata Faiez, Petra Nordholz (University of

Hannover, Hannover, Germany). *

Electromagnetic Analysis of Interconnects Using the Finite Difference Time Domain Method 547

Christian Schuster, Andreas Wilzig, Wolfgang Fichtner (Swiss Federal Institute of Technology,Zurich, Switzerland).

XVI

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Circuit Modelling ofHigh-Density Electronic PackagingLuc Martens (University of Gent, Gent, Belgium).

551

Time Domain Scattering Parameters - The Fast and Convenient Tool for Transient 555Simulation in Coupled Transmission LinesW. Bandurski (Poznan University of Technology, Poznan, Poland).

Passive Model Order Reduction for RLCG Interconnects Via the Moment Components 559Method

Izzct Cem Goknar (Istanbul Technical University, Istanbul, Turkey), Haydar Kutuk, Sung-Mo(Steve) Kang (University ofIllinois, Urbana, IL, USA).

SESSION R16: POWER ELECTRONICSAND SYSTEMS - II

A New Approach to Model Self-Heating ofElectrical Circuits through Thermal Networks 563

Lorenzo Codecasa, M. Santomauro (Politecnico di Milano, Milano, Italy).

Electrothermal Breakdown Modes in the Darlington Power Transistor 567

Janusz Zarebski, Krzysztof Gorecki (Gdynia Maritime Academy, Poland), Witold J. Stepowicz(Technical University of Gdansk, Poland).

Small-Signal Symbolic Analysis of PWM DC-DC Converters Operated in Continuos and 571

Discontinues Current Mode

A. Reatti (Universita di Firenze, Firenze, Italy), A. Luchetta (Universita della Basilicata, Italy).

LC Matching Circuits for Class E Inverter with Non-Stationary Load 575

Boguslaw Grzesik, Jacek Junak (Silesian Technical University, Gliwice, Poland),

SESSION R17: WAVELETANDMULTIRATE SIGNAL PROCESSING

Wavelet Filter Construction for Optimal Regularized Image Restoration Using the 579

Generalized-cross-validation Criterion

Ioannis M, Stephanakis, Stefanos Kollias (National Technical University ofAthens, Greece).

A Unified Module Architecture for Forward and Inverse Discrete Wavelet Transforms 583

Shogo Muramalsu, Hitoshi Kiya, AkihikoYamada (Tokyo Metropolitan University, Tokyo, Japan).

A Novel Wavelet Filtering Method in Automated Lineament Detection by Hough Transform 587

In Sar ImagesG. Simone, F. C. Morabito (Universita di Reggio Calabria, Italy).

Signal Flow Graph Approach to Wavelet Lifting 591

Paul Cristea, Rodica Tuduce (Politechnica University of Bucharest, Bucharest, Romania).

SESSION R18: TESTING: ANALOG, DIGITALAND MIXED

A Genetic Algorithm for Test Pattern Generation of MVL Circuits 595

V. Levashenko (State Economic University, Minsk, Belarus), S. Yanushkevich (Technical

University, Szczecin, Poland).

Sensitivity Based Analog Fault Dictionary 599

J. Rutkoswski, J. Machniewski (Silesian University ofTechnology, Gliwice, Poland).

A Software Program for Ambiguity Group Determination in Low TestabilityAnalog Circuits 603

J. Starzyk, J. Pang (Ohio University, Athens, OH, USA), G. Fedi, R. Giomi, S. Manetti, M. C.

Piccirilli (Universita di Firenze, Florence, Italy).

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Tests of 64Mb Sdram for Space Applications 607

S. Bertazzoni, G. C. Cardarilli, G. C. Grande, D. Piergentili, M. Salmeri, S. Sperandei (Universitadi Roma "Tor Vergata", Roma, Italy), S. Bartalucci, G. Mazzenga, S. Ricci (1st. Naz. di Fisica

Nucleare, Frascati, Italy), V. Bidoli, D. De Francesco, E. Reali (1st. Naz. di Fisica Nuclearc,

Roma, Italy), A. Rovelli (1st. Naz. di Fisica Nucleare, Catania, Italy).

SESSION R19: GENERAL CIRCUITSAND SYSTEMS -1

Performance Characterisation Transformed into the Load Plane via Impedance Parameters 611

Filiz Gunes, Tuna Vural (Yildiz Technical University, Istanbul, Turkey).

Frequency Responses of Linear Systems with Interval Parameters 615

Z.A. Garczarczyk (Silesian Technical University, Gliwice, Poland).

A New Theorem on Nonminimal Realization of Transformerless, Common-Ground, Two- 619

Element-Kind RLC Networks

Dragan Kandic, Branimir Reljin (University of Belgrade, Belgrade, Yugoslavia).

Broadband Matching of Complex N-Port Loads 623

Gennadij Chavka (Bialystok Technical University, Bialystok, Poland).

Author Index 627

Volume II

PLENARY SESSION: TUTORIALS T3

Low Power CMOS Design Methods 631

J. A. Nossek, A. Schlaffer, C. V. Schimpfle, M. Wroblewski (Munich University of Technology,Munich, Germany).

Optimal Circuit Designer 632

A. Petrenko (Kiev Polytechnical Institute, Kiev, Ukraine).

SESSION R20: ANALOG CIRCUITS - III

On the Stability of Multistage Amplifers 635

J. Ladvanszky (Innovation Company for Telecommunications, Budapest, Hungary).

Active-R Three-Phase Oscillator Operating at Power Line Frequencies 639

John Vosper (The Manchester Metropolitan University, Manchester, UK), Oscar Roitegui(University of the Basque Country, Vitoria-Gastiez, Spain).

Binary Signals with Separated Baseband and Their Application to High Performance Class- 643

D Audio AmplifierMartin Streitenberger, Helmut Bresch, Wolfgang Mathis (Otto von Guericke UniversityMagdeburg, Germany).

Realization of Sinusoidal Oscillators Employing a Newly Introduced Active Element: 647

CDBA, Current Differencing Buffered AmplifierSadri Ozcan, Ali Toker, Cevdet Acar, Hakan Kuntman (Istanbul Technical University, Istanbul,Turkey), Oguzhan Cicekoglu (Bogazici University, Istanbul, Turkey).

Investigation of Self-Linearizing Circuits Involving P-N-Junctions 651

Yu Brack, M. Haridim (Center for Technological Education-Holon, Holon, Israel),

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Improved Biasing Error in Current Mode Absolute Value Circuits 655

Velio Mannama (Tallinn Technical University, Tallinn, Eslonia), Brett Wilson (UMIST, Manchester, UK).

SESSIONS10 -1: OPPORTUNITIESAND CHALLENGESFOR NANOELECTRONICS -1

Molecular Electronics

Philip J. Kuekes, R. Stanley Williams (Hewlett-Packard Laboratories, Palo Alto, CA, USA). 659

SPICE Simulation of Circuits Containing Resonant Tunneling Diodes 663

Mayukh Bhattacharya, Pinaki Mazumder (The University of Michigan, Ann Arbor, MI, USA).

CircuitApplications of Quantum MOS Logic 667

Shriram Kulkarni, Pinaki Mazumder (The University ofMichigan, Ann Arbor, MI, USA).

Nanoscopic Quantum Networks: Collective versus Selective Control 671

Guenter Mahler, A. Otte (University of Stuttgart, Stuttgart, Germany).

SESSION R21: NONLINEAR CIRCUITSAND SYSTEMS

Nonlinear Stabilization Techniques for Modulators: A Comparison 679Adrian Leuciuc (State University of New York, Stony Brook, NY, USA).

How to Analyse if Feedback-Structures Cause Multiple Operating Points 683

Lars Kronenbcrg (University of Magdeburg, Magdeburg, Germany), Ljiljana Trajkovic (Simon-FraserUniversity, Burnaby, Canada), Wolfgang Mathis (University ofMagdeburg, Magdeburg, Germany).

Large-Signal Simulation Model for PTC Thermistor 687

Timo Veijola (Helsinki University ofTechnology, Espoo, Finland).

On the Definition of Nonlinear Circuits for Parallel Minimisation of Continuous Functional 691

Federico Bizzarri, Marco Storace, Mauro Parodi (Universita di Genova, Genova, Italy).

Wave Propagation Phenomena ofPhase States in Coupled Oscillators 695

Masayuki Yamauchi, Masahiro Wada, Yoshifumi Nishio, Akio Ushida (Tokushima University,Tokushima, Japan).

Detection ofAll the Equilibrium Points of Dynamic ID Autonomus Rings 699

Stefano Pastore (Universita di Trieste, Trieste, Italy).

SESSION R22: DIGITAL FILTERSAND FILTER BANKS - II

Design of Stable, Causal, Perfect Reconstruction, IIR Uniform DFT Filter Banks 703

A. Klouche-Djedid, S. S. Lawson (University of Warwick, Coventry, UK).

Memoryless Fully Parallel Residue-To-Mixed Radix Converter 707

J. Mathew, D. Radhakrishnan, T. Srikanthan (Nanyang Technological University, Singapore).

A Scalable Architecture for the Realization of Compact Programmable Rank-Order Filters 711

Using Threshold LogicI. Hatirnaz, F. K. Gurkaynak, Yusuf Leblebici (Worcester Polytechnic Institute, Worchester, MA,

USA).

A Simple Method for Two-Channel QMF Bank Design Based on the Frequency Sampling 715

ApproachRobert Bregovic, Hrvoje Babic (University of Zagreb, Zagreb, Croatia), Rajeev Gandhi, Sanjit K.

Mitra (University of California, Santa Barbara, CA, USA).

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Area Minimal Architectures in Bit-Serial FIR filters 719

Rakesh Malik (STMicroelectronics, Noida, India), PuneetGoyal (STMicroelectronics, India).

Testing Composite Hypotheses Applied to AR-Model Order Estimation; the Akaike 723

Criterion Revised

R. Moddemeijer (University of Groningen, Groningen, The Netherlands).

SESSION R23: ADAPTIVE SIGNAL PROCESSING -1

A Modified Fast Affine Projection Algorithm for Adaptive Filtering Applications 727

George Keratiotis, Larry Lind (University of Essex, Colchester, UK).

Improving the CALFAdaptive Filtering Algorithm 731

Chun-Fu Lin, Sau-Gee Chen (National ChiaoTung University, Taiwan).

Performance of a Channel Estimation Equaliser on Stationary Channels 735

Tetsuya Shimamura (Saitama University, Urawa, Japan).

The Effects of DC Bias in Adaptive Filters Equipped with the Sign-Based LMS Algorithms 739

Xiaodong Tian (University of California, San Diego, CA, USA), Anthony Kuh (University of

Hawai at Manoa, Honolulu, HI, USA).

Impulse Noise Removal in the Presence of Gaussian Noise of Unknown Characteristics in 743

Images with Adaptive L-Filters

Joachim F. Selinger (University of Stuttgart, Stuttgart, Germany), Bha.sker Reddy Jakka (Indian

Institute of Technology, New Delhi, India), E. Lticler (University of Stuttgart, Stuttgart, Germany),

SESSION R24: NUMERICAL METHODSAND CIRCUITSIMULATION - II

On the Noise Simulation of Modulated Nonlinear Circuits 747

M. Lapinoja, T. Rahkonen (University of Oulu, Oulu, Finland).

One Equation of Periodically Time-Variant System Applicable to the Harmonic Analysis of 751

PWM Converters

Shui-Sheng Qiu (South China University of Technology, Guangzhou, P. R. China), I. M.

Filanovsky (University ofAlberta, Edmonton, Canada).

1-D Non-Minimum Phase Retrieval by Gain Sampling 755

Corneliu Ru.su, Pauli Kuosmanen, Adrian Burian (Tampere University of Technology, Tampere,

Finland).

An Event-Driven Approach to Analyze Large Scale Nonlinear RC Circuits 759

Amedco Premoli, Angelo Brambilla (Politecnico di Milano, Milano, Italy).

Estimation ofAverage Switching Activity in Combinational Digital CMOS Circuits 763

Sancleep Koranne (Indian Institute of Technology, Delhi, India).

A Multi-Rate Method for Finding the Periodic Steady-State of Nonlinear High Speed 767

Circuits

Florin Constantinescu, Miruna Nitescu ('Politehnica' University, Bucharest, Romania).

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SESSIONR2S: CELLULARNEURALNETWORKS - /

Attacking the General Classification Problem with CNNs 771

Martin Haenggi, George S. Moschytz (Swiss Federal Institute of Technology, Zurich,

Switzerland).

Modeling Reaction-Diffusion Partial Differential Equations Using Cellular Neural Network 775

Universal Machine

K. Slot (Technical University of Lodz, Lodz, Poland).

Complex Deconvolution by the Conjugate Gradient Method Using the CNN Universal 779

Machine

Luca Orsini, Valerio Cimagalli, M. Balsi (Universita di Roma "La Sapienza", Roma, Italy).

Threshold Boolean Filtering with Cellular Neural Networks 783

M. Balsi, Mauro Zaccari (Universita di Roma "La Sapienza", Roma, Italy).

Using Different Bias Current Sources for Controlling Turing Patterns 787

Tiberiu Dinu Teodorescu, Victor Andrei Maiorescu (Technical University "Gh. Asachi" Iasi,

Romania).

A Modified CNN Architecture for Turing Patterns Generation 791

Liviu Goras (Technical University "Gh. Asachi", Iasi, Romania).

SESSIONR26:ANALOG FILTERS - II

Noise and Dynamic Range of Second Order OTA-C BP Filter Sections 795

Nino Stojkovic, Neven Mijat (Univeristy in Zagreb, Croatia).

ARC Biquadratic Filters Using Voltage and Current Followers 799

Tomas Dostal (Brno University ofTechnology, Brno, Czech Republic).

General Current-Mode MLF MO-OTA-C Filters 803

Yichuang Sun (University of Hertfordshire, Hatfield, UK), Kel Fidler (University ofYork, UK).

Multiple Solutions and Sensitivity Comparison of Passive LC Filters 807

Yichuang Sun, Wei Lung Lee (University of Hertfordshire, Hatfield, UK).

A New Second Order Building Block with Minimised Parasitic Transfer Zero Influence 811

Karel Hajek (Military Academy Brno, Czech Republic), Jiri Sedlacek (Technical University of

Brno, Czech Republic).

SESSION S10 - II: OPPORTUNITIESAND CHALLENGES

FOR NANOELECTRONICS - II

Network Representation of Coupled MolecularArrays 815

A. I. Csurgay (Technical University of Budapest, Budapest, Hungary), W. Porod (University of

Notre Dame, Notre Dame, IN, USA).

Quantum Mechanical Description of Physical Arrangements for Quantum Computers 819

Kai Pahlke, Wolfgang Mathis (University of Magdeburg, Magdeburg, Germany).

Potential Functionality ofMulti-valued Tunneling Phase Logic Devices 823

Hossam A. H. Fahmy, Martin Morf, Richard A. Kiehl (Stanford University, Stanford, CA, USA).

The Performance Limits of Microprocessors Using CMOS, RTDs, SETs and QCAs 827

Michael Forshaw, Daniel Berzon (University College London, London, UK).

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Challenges in the Simulation of Logic Gates and Circuits Based on the Quantum Cellular 831

Automaton (QCA) ConceptM. Macucci, G. lannaccone, S. Francaviglia, G. Luchclli, M. Governalc, M. Girlanda (Universita

di Pisa, Pisa, Italy).

Modeling Nanoelectronic CNN Cells: CMOS, SETs and QCAs 835

Costa Gerousis (Arizona State University, Tempe, AZ, USA), Xiaohui Wang, Ge/.a Toth

(University of Notre Dame, Notre Dame, IN, USA), Stephen M. Goodnick (Arizona State

University, Tempc, AZ, USA), W. Porod, Craig S. Lent (University of Notre Dame, Notre Dame,

IN, USA), A. I. Csurgay (Technical University of Budapest, Budapest, Hungary).

SESSION Sll: NEURAL NETWORKS FOR CLASSIFICATION

Least Squares Support Vector Machine Classifiers : A Large Scale Algorithm 839

J. A. K. Suykens, L, Lukas (K. U. Leuven, Leuven, Belgium), P. Van Dooren (Universite

Catholique de Louvain, Louvain la Neuve, Belgium), B. De Moor, J. Vandewalle (K. U. Leuven,

Leuven, Belgium).

A Rule-Based and Neural Network System for Fraud Detection in Mobile Communications 843

H. Verrelst, E. Lerouge, Y. Moreau, J. Vandewalle (K. U. Leuven, Leuven, Belgium), C. Stormann

(Siemens Research, Munchen, Germany), P. Burge (Royal Holloway University of London,

Egham, UK).

A Posteriori Code for Multiclass Discrimination 847

W. Utschick, W. Weichselberger (Munich University ofTechnology, Munich, Germany).

Regularization and Pruning of Multivariable First-Order Polynomial Classifiers 851

R. Eigenmann, JosefA. Nossek (Munich University of Technology, Munich, Germany).

Nonlinear Functional and Operator Splines as Vehicles for Neural Network Modeling and 855

TrainingRui J.P. de Figueiredo (University of California, Irvine, CA, USA).

Designing Preselective Classifiers 859

J. A. G. Nijhuis, M. H. ter Brugge, R. Moddemeijer, L. Spaanenburg (University of Groningen,

Groningen, The Netherlands).

SESSION R27: CHAOS, BIFURCATIONSANDAPPLICATIONS - II

Theoretical and Experimental Results for the Control of Some Chaotic Systems by Using 863

Dither

Omer Morgul (Bilkent University, Bilkent, Ankara, Turkey).

Elementary Canonical State Models of Lur'e Systems and Their Application in 867

Synchronized Chaos

Jiri Pospisil, Jaromir Brzobohaly, Zdenek Kolka (Brno University ofTechnology, Czech Republic).

An Explicit Expression for the Amplitude of Oscillation in the Colpitts Oscillator 869

Gian Mario Maggio (University of California, San Diego, La Jolla, CA, USA), Oscar De Fco

(EPFL Lausanne, Switzerland), M. P. Kennedy (University College Dublin, Dublin, Ireland).

Chaotic Oscillator Using Current Conveyors 873

A.S. Elwakil, M. P. Kennedy (University College Dublin, Dublin, Ireland).

Collapse of Duck Solution and Chaos in a Rayleigh Oscillator with Extremely Weak 876

Perturbations

Noahiko Inaba, Tomoyuki Hayashibc (Ulsunomiya University, Ulsunotniya, Japan).

XXU

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IC Design for Secure Communication Using Current-Mode Chaotic Circuits 880Sedat Nisanci, G. Dundar (Bogazici University, Istanbul, Turkey), S. Balkir (University of

Nebraska-Lincoln, Lincoln, NE, USA), Yagmur Denizhan (Bogazici University, Istanbul, Turkey).

SESSION R28: MODELING, SIMULATIONAND CAD TOOLS

Efficient FM-DCSK Radio System Simulator 884Gabor Kis (Technical University of Budapest, Budapest, Hungary), Gerard Baldwin (UniversityCollege Dublin, Ireland).

A Large-Signal Compatible Dual-gate MESFET DC model 888Michael Bohl Jenner (Aalborg University, Denmark).

WritingVHDL Models of Parallel n x n Bit Multiplication Blocks for DSP Applications 892

Siddika Berna Ors, Ahmet Dervisoglu (Istanbul Technical University, Istanbul, Turkey).

A Peak-Power Estimation Algorithm for Sequential Circuits 896

F. Corno, M. Rebaudengo, M. Sonza Reorda, V. Speranza, M. Violante (Politecnico di Torino, Italy).

On VHDL Interconnections Analog Macromodels

Gabriel Stefan Popescu (Technical University "Gh. Asachi", Iasi, Romania). 900

Prediction-Extraction Modelling Scheme for Design of High Speed Circuits 904

A. Konczykowska, S. Blayac (CNET, France Telecom, Marcoussis, France), M. Abboun (IEFUniversity Paris-Sud, Orsay, France), N. Kauffmann, M. Riet (CNET, France Telecom,

Marcoussis, France), F. Aniel (IEF University Paris-Sud, Orsay, France).

SESSION R29: IMAGE PROCESSINGAND CODING

Image Enhancement Using IIR Filter Banks 908

Emir Tufan (University of Istanbul, Istanbul, Turkey).

Fractal Encoding of Distorted Images 912

Bozena Swidzinska (Warsaw University of Technology, Warsaw, Poland).

Non-Linear Image Noise Filtering Algorithm Based on SVD Block Processing 916

Z. Devcic (Institute for Defence Studies, University of Zagreb, Croatia), S. Loncaric (Universityof Zagreb, Croatia).

Semantic Identification of Moving Targets in Video Surveillance Systems 920

L. Favalli (Universita di Pavia, Pavia, Italy), A. Mecocci (Universita di Siena, Siena, Italy), M.

Zipeto (Universita di Pavia, Pavia, Italy).

Image Segmentation by Movement Estimation and Contour Extraction 924

L. Favalli (Universita di Pavia, Pavia, Italy).

A Color Preserving Image Segmentation Method 928

S. Makrogiannis, G. Economou, S. Fotopoulos (University of Patras, Patras, Greece).

Lossless Image Coding Using Optimum Prediction Generated by Local Image Features 932

S. Matsumura, K. Tamura (Kanazawa Technical College, Kanazawa, Japan), T. Takebe (KanazawaInstitute ofTechnology, Ishikawa, Japan).

SESSION R30: CELLULAR NEURAL NETWORKS - II

Error Correction for Flash A/D-Converters Using Cellular Nonlinear Network

Asko Kananen, Ari Paasio, Kari Halonen (Helsinki University of Technology, Helsinki, Finland).

936

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A Compact and Robust Circuit Proposal for Reconfigurable DTCNN 940

V, M. Brea, D. L. Vilarino, D, Cabello (University of Santiago de Compostela, Santiago de

Compostela, Spain).

Simulation of Nonlinear Evolution Equations via Cellular Networks 944

L. Corti, M. de Magistris, A. Maffucci, G. Miano, C. Serpico, L, Verolino, C. Visone (Universita

di Napoli, Napoli, Italy).

A Programmable Analog Cellular Neural Network Based on Multiple-Input 948

Transconductance CMOS AmplifierNasser N. Kamiss Al-Ani, Tomasz Kacprzak, Jacek Kowalski (Technical University of Lodz,

Lodz, Poland).

Design of Cooperative and Competitive Cellular Neural Networks 952

Masashi Mori, Toshiya Nakaguchi, Yuichi Tanji, Mamoru Tanaka (Sophia University, Tokyo,

Japan).

Cellular Neural Network for Trajectory Tracking and Predicting 956

Pavle Kaslic, Branimir Reljin (University of Belgrade, Belgrade, Yugoslavia), Irini Reljin (PTT

College, Belgrade, Yugoslavia).

PLENARY SESSION: TUTORIALS T4

Independent Component Analysis vs Principle Component Analysis with Applications to 960

Imaging ProcessingRuey-wen Liu (University of Notre Dame, Notre Dame, IN, USA), H. Szu (GWU, WashingtonDC, USA).

Unified Lyapunov Convergence of both Unsupervised ICA and Supervised PCA Learning 961

H. Szu (GWU, Washington DC, USA).

Neurofuzzy Networks 966

G. Martinelli (Universita* di Roma 'La Sapienza', Roma, Italy).

SESSION S12:ADVANCEDRESULTS INMICROELECTRONICS

Chaotic System-based Solutions for Data Protection 971

G, Di Bernardo (STMicroelectronics s.r.L, Catania, Italy), L. Fortuna (Universita di Catania,

Catania, Italy), F. Italia, L. Occhipinli (STMicroelectronics s.r.L, Catania, Italy).

Fuzzy Switching Regulators 975

A. Lionetto, L. Occhipinli (STMicroelectronics s.r.L, Catania, Italy).

VIPower M3 Technology: An Example of Smart Power Solution in Quasi Resonant Flyback 979

ApplicationsD. Tagliavia, S. Spampinato, S. Sueri (STMicroelectronics s.r.L, Catania, Italy).

Advanced Intelligent Control Systems in Non-Linear Mechatronics and Robotics: From 983

Macro- to Micro-SystemsS. Ulyanov (Yamaha Motor Europe N.V., Crema, Italy), R. Caponelto (STMicroelectronics s.r.L,

Catania, Italy), H. Kurawaki, R. Yamashita, S. Panfilov (Yamaha Motor Europe N.V., Crema,

Italy), G.G. Rizzolto (STMicroelectronics s.r.L, Catania, Italy), V. Ulyanov, K. Yamafuji (YamahaMotor Europe N.V., Crema, Italy), M. Lavorgna (STMicroelectronics s.r.L, Catania, Italy).

A Fuzzy A/D Converter by Means of Current-Mode Approach 987

G. Giustolisi, G. Palumbo, S. Pcnnisi (Universita di Catania, Catania, Italy).

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Control of Complex Neuro-Fuzzy Dynamics with Disorder 991P. Arena, M. Bucolo, L. Fortuna, A. Rizzo (Universita di Catania, Catania, Italy).

SESSION S13 -1: CNNAPPLICATIONS -1

The CNN Sampling Theorem 995M. Haenggi (Swiss Federal Inst, of Tech., Zurich, Switzerland), H. C. Reddy (California State

University, Long Beach, CA, USA), George S. Moschytz (Swiss Federal Inst, of Tech., Zurich,Switzerland).

Exploring Complexity in Reaction-Diffusion Cellular Fuzzy Processors 999R. Caponetto, G. Di Bernardo, M. Lavorgna, L. Occhipinli (STMicroelectronics s.r.L, Catania,Italy).

A Practical CNN System for Toll Driving 1003M. H. ter Brugge, J. A. G. Nijhuis, L. Spaanenburg (Rijksuniversiteit Groningen, Groningen, The

Netherlands).

Analysis of Brain Electrical Activity in Epilepsy with Cellular Neural Networks (CNN) 1007R. Tetzlaff, R. Kunz, C. Ames, D. Wolf (Universitaet Frankfurt, Frankfurt a.M., Germany).

Spatial Disorder in CNNs Induces Spatio-Temporal Organization 1011P. Arena, L. Fortuna, D. Platania, A. Rizzo (Universita di Catania, Catania, Italy).

Active Contour and Skeleton Models in Continuous-Time CNN 1015Cs. Rekeczky (ANCL, Hungarian Academy of Sciences, Budapest, Hungary).

SESSIONR31:ANALOGFILTERS - III

A CMOS Configurable Analogue Block for Continuous-Time Programmable OTA-C Filters 1019

Bogdan Pankiewicz, Marek Wojcikowski, Jacek Jakusz, Jacek Glinianowicz, Stanislaw

Szczepanski (Technical University of Gdansk, Gdansk, Poland).

A High-Frequency Fully Differential CMOS OTA for Continuous-Time Filter Applications 1023Jacek Jakusz, Jacek Glinianowicz, Marek Wojcikowski, Bogdan Pankiewicz, Stanislaw

Szczepanski (Technical University of Gdansk, Gdansk, Poland).

Minimum-Sensitivity Single-Amplifier Biquadratic Filters 1027

Hanspeter Schmid, George S. Moschytz (Swiss Federal Institute of Technology, Zurich,Switzerland).

A CMOS 800 MHz Continuous Time Biquadratic Cell 1031

Michele Fedeli, Carta Vacchi, Federico Montecchi (Universita di Pavia, Pavia, Italy).

Design ofARC Low-pass Filters for the Band 1-50 MHz 1035

Karel Hajek (Military Academy of Brno, Brno, Czech Republic), Jiri Sedlacek (Technical

University of Brno, Bmo, Czech Republic), Bohumir Sviezeny (Institut Superieur d'Electroniquede Paris, Paris, France).

The Fully Balanced and Tunable CCII-MOSFET Continuous-Time Current Filter Synthesis 1039

Aleksander Urbas, Bogdan Galinski (Warsaw University of Technology, Warsaw, Poland).

SESSION R32: ANALOGAND MIXED SIGNAL PROCESSING

Testing ofAnalog Dynamic Systems Based on Integral Sensisitivity 1043

Volodymyr Brygillewicz (University of Lviv, Ukraine), Jacek Wojciechowski (Warsaw Universityof Technology, Warsaw, Poland), J. Starzyk (Ohio University, Athens, OH, USA).

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Signal Separation Using Second Order Statistics 1047

M. F. Fahmy, G. M. A. El-Raheem, A.A. El-Sallam (University of Assiut, Assiut, Egypt).

Multirate Approach to the Harmonic Interference Removal 1051

Gordana Jovanovic-Dolecek, Maricla Aguilar-Ponce (National Institute for Research in

Astrophysiscs, Optics and Electronics, Puebla, Mexico).

Robust Broadband Beamforming Using Frequency Domain Adaptive Filter 1055

Tateo Yamaoka, Nozomu Hamada (Keio University, Yokohama, Japan).

Realization of Signature Verification System Based on Direction-Change of Pen-Point 1059

Movement

Takenobu Matsuura, ShunsukeYamamoto (Tokai University, Kanagawa, Japan).

FIR System Representation of Chin's Shape and Its Application to Personal Identification 1063

Takenobu Matsuura, Misako Takahashi, Shunsuke Yamamoto (Tokai University, Kanagawa,

Japan).

SESSION R33: NUMERICALMETHODSAND CIRCUIT SIMULATION - III

Computer Analysis of Tuning Ranges for PLL-Based Master-Slave Tuned Filters 1067

Leszek J. Opalski, Katarzyna Opalska (Warsaw University of Technology, Warsaw, Poland).

SSDSIM - A Very Fast and Versatile Simulator for Delta-Sigma Modulators 1071

Mika Lansirinne, Kari Halonen (Helsinki University ofTechnology, Espoo, Finland).

Regulation of Error Sensitivity of Nonuniform Discrete Fourier Transforms 1075

V. Karanko, M. Valtonen (Helsinki University ofTechnology, Espoo, Finland).

Symbolic Analysis of SC Circuits in MAPLE 1079

Jan Bicak, Jiri Hospodka, Pravoslav Martinck (CTU, Faculty of Electrical Engineering, Prague,Czech Republic).

Event-Driven ITA with Dynamic Partitioning for AHDL Simulators 1083

Pawel Plaskura, Jan Ogrodzki (Warsaw University ofTechnology, Warsaw, Poland).

Practical Issues in Time Domain Sensitivity Computation 1087

Lidia Daldoss, Paolo Gubian, Michele Quarantelli ( Universita di Brescia, Brescia, Italy).

SESSION R34: MODELING, SIMULATIONAND CAD

TOOLS/LOGICSYNTHESISAND FORMAL VERIFICATION

Design of Dynamic ADC Testing Based on a Frequency-Domain Approach 1091

P. Carbone, E. Nunzi, D. Petri (Universita di Perugia, Perugia, Italy).

Logic Synthesis via Hamming Clustering 1095

Marco Muselli, Diego Liberal! (1st. per i Circuiti Elettronici, Consiglio Nazionale delle Ricerche,

Genova, Italy).

Fuzzy Performance Model of Mismatch for Analog Integrated Circuit Optimization 1099

G. Alpaydin, G. Cosgul, G. Dundar, S. Balkir (Bogazici University, Istanbul, Turkey).

An Intentional Clock Skew Scheduling Algorithm for High Performance Clock Distribution 1103

Network

Mohamad B. Maaz, Magdy A, Bayoumi (The University of Southern Louisiana, Lafayette, LA,

USA).

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Statistical Evaluation of Clock Skew and Time Delay in Submicron Layouts 1107

Angelo Brambilla, Paolo Maffezzoni (Politecnico di Milano, Milano, Italy).

Extension of Class of Fixed Polarity Reed-Muller Expansions 1111

E. Zaitseva (State Economic University, Minsk, Belarus).

SESSIONR35: DISTRIBUTED CIRCUITSAND SYSTEMS

A Feedback Oscillator with Nonlinear Distributed Line 1115

Michitaka Matsuki (Kinki University, Japan), Genji Murata, Shinsaku Mori (Nippon Institute of

Technology, Saitama, Japan).

Transient Analysis of Coupled Lossy and Dispersive Nonuniform Transmission Lines from S 1119

Parameters by SPICE Compatible Behavioral Dependent Sources

Jos6 M. Gomez (Universidad de Alcala, Madrid, Spain), Jose" I. Alonso (Universidad Politecnica

de Madrid, Madrid, Spain).

Construction of Analog RF Circuits with Lumped and Distributed Components for High 1123

Speed/High Frequency Mobile Communication MMICs

Ahmet Scrtbas (Istanbul University, Istanbul,Turkey), Ahmet Aksen, B. Siddik Yarman (Isik

University, Maslak, Turkey).

Nonlinear Dynamics in Lossless Multiconductor Lines 1127

L. Corti, A. Maffucci, G. Miano (Universita di Napoli, Napoli, Italy).

Restoration of Physical Structures: an Approach Based on the Theory ofRC Networks 1131

V. Szekely (Technical University of Budapest, Budapest, Hungary).

Time-Domain Simulation of Nonuniform Multiconductor Transimission Lines under 1135

Nonzero Initial Conditions Using MATLAB LanguageLubomir Brancik (Brno University of Technology, Brno, Czech Republic).

SESSION R36: MULTIDIMENSIONAL SYSTEMS /

FAST COMPUTATION FOR SIGNAL PROCESSING

Least-Squares Design of M-D IIR Filters with Fixed Separable Denominator Based on 1139

Multivariate Division AlgorithmHiroshi Hasegawa, Isao Yamada, Kohichi Sakaniwa (Tokyo Institute of Technology, Tokyo,

Japan).

A Novel Linear-Phase FIR Filtering Algorithm 1143

Sau-Gee Chen (National Chiao Tung University, Hsinchu, Taiwan), Rachel Jiang (Silicon

Integrated Systems Corp., Hsinchu, Taiwan).

Fast Exact and Approximate Nearest Neighbor Searching for Nonlinear Signal Processing 1147

C. Mcrkwirth, U. Parlitz, Werner Lauterborn (University of Gottingen, Germany).

A New Efficient Architecture for Binary to RNS Conversion 1151

M. Re, G. C. Cardarilli, R. Lojacono (Universita di Roma "Tor Vergata", Roma, Italy), G. Ferri

(Universita dell'Aquila, 1'Aquila, Italy).

Design of Even Maximally Decimated Pairwise FIR Filter Banks 1155

M. F. Fahmy, G. A. Raheem, Hesham M.Z. Badr (University ofAssiut, Assiut Egypt).

Design of Two Channel QMF Filters with Smooth Wavelet Functions \ 159

Awad I. Saleh, M. F. Fahmy, G. A. Raheem (University of Assiut, Assiut, Assiut, Egypt), G. F.

Fahmy (SouthValley University, Aswan, Egypt).

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SESSION SI3 - //.• CNNAPPLICATIONS - II

Subthreshold Current Mode Design of Gabor-type CNN Image Fillers 1163

B. E. Shi (Hong Kong Univ. of Sci. and Tech., Hong Kong).

Implementation of Fuzzy-Rule-Based Image Processing in the CNN Universal Machine 1167

M. Balsi, F. Voci (Universita di Roma 'La Sapienza', Roma, Italy).

Design of Cellular Associative Memories for Robot Vision via a Fuzzy Image Segmentation 1171

M. Brucoli, D. Cafagna, L. Carnimeo (Politecnico di Bari, Bari, Italy).

Video Compression Algorithms on the CNN Visual Microprocessor - Early Segmentation 1175

and Basic Motion Estimation

K. Laszlo (ANCL, Hungarian Academy of Sciences, Budapest, Hungary), F. Ziliani (SwissFederal Inst, of Technology, Lausanne, Switzerland), T. Roska (Hungarian Academy of Sciences,

Budapest, Hungary), M. Kunt (Swiss Federal Inst, of Technology, Lausanne, Switzerland).

Stochastic Texture Generation in Cellular Neural Networks Using AR and ARMA Models 1179

P. Debiec, K. Slot (Technical University of Lodz, Lodz, Poland).

Digital CNN with Optical and Electronic Processing 1183

S. Jankowski (Warsaw University of Technology, Warsaw, Poland), R. Buczynski (VrijeUniversiteit Brussels, Brussels, Belgium), A. Wielgus, W. Pleskacz (Warsaw University of

Technology, Warsaw, Poland), T. Szoplik (Warsaw University, Warsaw, Poland), I, Veretennicoff,H. Thienpont (Vrije Univcrsilcil Brussels, Brussels, Belgium),

SESSION SI4: ENABLING SYSTEM-ON-CHIP DESIGN:

METHODOLOGIES AND SOLUTIONS FOR ICT PRODUCTS

The Challenge of System on a Chip in Deep Submicron Technologies 1187

M. Taliercio (STMicroelectronics, Agrate Brianza, Italy).

A System-on-Chip Design Methodology for the 3rd Millenium ICT Products 1191

M. Paolini, M. Turolla (CSELT, Torino, Italy).

A Methodology for Synthesis with Reusable Components from an Arithmetic Specification 1195

J. Smith, G. De Micheli (Stanford University, Stanford, CA, USA).

Advanced Hardware Technologies Toward Tbit/s ATM Switching System in NTT 1199

N. Yamanaka (NTT Network Service Systems Labs., Tokyo, Japan).

The Semiconductor Role in the Evolution of Wireless Communications 1203

A. Cremoncsi, P. Quarticelli (STMicroelectronics, Agrate Brianza, Italy).

CMOS Solutions for Wireless and Wireline Products 1207

M. Collivignarelli (Texas Instruments, Villeneuve Loubet, France).

SESSION R37: CHAOS, BIFURCATIONS ANDAPPLICATIONS - HI

Backstepping Design for Controlling Chaos in the Lorenz System and Chua's Circuit 1211

S. Mascolo (Politecnico di Bari, Bari, Italy), G. Grassi (Universita di Lecce, Lecce, Italy).

Synchronization of Self-Switching Phenomena in Chaotic Oscillators Coupled by One 1215

Resistor

Hiroo Sekiya (Keio University, Yokohama, Japan), Shinsaku Mori (Nippon Institute of

Technology, Saitama, Japan), Iwao Sasase (Keio University, Yokohama, Japan),

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Bifurcations and Chaos in Lossy Single Lines Connected to Nonlinear Resistors 1219L. Corti, G. Miano (Universita di Napoli, Napoli, Italy).

Study of Chaos in Buck Converter. Comparison of Bifurcation Diagram Using P and PID 1223Controller

Cristina Vlad, Dorin Petreus, Crislian Farcas (Technical University of Cluj-Napoca, Romania).

Clustering and Complex Behavior in Coupled Continuous-Time Circuits 1227Yoshifumi Nishio, Akio Ushida (Tokushima University, Tokushima, Japan).

Time-Frequency Analysis of Chaotic Waveforms from Chua's Oscillator 1231L. Galleani, M. Biey, M. Gilli, L. Lo Presti (Politecnico di Torino, Italy).

SESSION R38: SWITCHED CAPACITOR I CURRENT TECHNIQUES

Switched Realization of Nonrecursive Discrete Linear-Phase FIR Filters 1235Dalibor Biolek, Karel Zaplatilek (Brno Military Academy, Czech Republic).

Equivalent Inductor Composed of Switched Capacitor Circuits of Current-Mode Circuits 1239Wataru Suzuki, Tomokazu Arai, Masahiro Yamamoto (Kanto Gakuin University, Japan).

Comparison of Amplifier Topologies for Low Power Switched Capacitor Applications 1243

Christoph Schwocrer, Dominique Morche, Patrice Senn (CNET, Grenoble, France).

A SC Video FIR Filter with Analog-RAM-Based Delay Efficient Realization 1247

A. Gerosa, A. Neviani, E. Zanoni (Universita di Padova, Italy).

Delta Operator Based Low Sensitivity Ladder Realization for Sampled Data Filters 1251

H. C. Reddy (California Stale Universilty, Long Beach and University of California, Irvine, CA,

USA), 1-Hung Khoo (University of California, Irvine, CA, USA), George S. Moschytz (SwissFederal Institute of Technology, Zurich, Switzerland).

A Synthesis of SC Filter Using Higher-Order SC Immittance Simulation Circuits 1255

Toshio Ono (Saitama Institute of Technology, Saitama, Japan).

SESSION R39: SIGNALPROCESSINGFOR COMMUNICATIONS

Implementation of Multibit Sigma-Delta Converters Using Arrays of Single-Bit Sigma-Delta 1259

Modulators

G.I. Bourdopoulos, T. Deliyannis (University of Patras, Patras, Greece).

On Noise Reduction Methods for Chaotic Communications Systems 1263

Zollan Jako (University of Budapest, Budapest, Hungary).

Wavelet Based Multichannel Modulation 1267

Fabio Dovis, Marina Mondin (Politecnico di Torino, Torino, Italy), Fred Daneshgaran (CaliforniaState University, Los Angeles, CA, USA).

Broadband Interference Excision in Spread Spectrum Communication Systems Using Time- 1271

Frequency Masking

Aydin Akan, Yalcin Cekic (University of Istanbul, Istanbul, Turkey).

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SESSION R40: FUZZYLOGICAND CIRCUITS I EXPERT SYSTEMS I

LINEARAND NONLINEAR OPTIMISATION

Experimental Tuning of Input Membership Functions for an Improved Optimization of 1275

Fuzzy Rule Bases

Mohand Si-Fodil, Patrick Siarry (Ecole Centrale de Paris, Chatenay-Malabry, France), Jean-Luc

Tyran (EDF, Direction des Etudes et Rechcrches, Chatou, France).

Optimisation Methods in SPICE: a Comparison 1279

Janez Puhan, Tadej Tuma, Izlok Fajfar (University of Ljubljana, Ljubljana, Slovenia).

Expert System for Teaching of Problem Solving in Circuit Theory '283

Tadeusz Grabowiecki (Silesian Technical University, Gliwice, Poland).

An Embedded Control Unit for a Mechatronic Drill Based on a Fuzzy Processor 1287

V. Colla, G. Ferretti, B. Allotta (Scuola Superiore Sant'Anna, Pisa, Italy).

CMOS Analog Implementation of Multidimensional Membership Functions of a Neuro- 1291

Fuzzy NetworkMassimo Conti, S. Orcioni, C. Turchetti (Universita di Ancona, Ancona, Italy).

A Fuzzy Rule Processor Based Control System for DC/DC Converters 1295

L. Fortuna (Universita di Catania, Catania, Italy), A. Lionetlo (STMicroelcclronics, Catania,Italy), G. Nunnari (Universita di Catania, Catania, Italy).

SESSION R41:ANALOG CIRCUITS - IV

CMOS Amplifier with Rail-To-Rail Input Range at Minimum Supply Voltage'2-^

J. L. Ausin, J.F. Duquc-Carrillo (University of Extremadura, Badajoz, Spain), G. Torelli

(Universita di Pavia, Pavia, Italy), J.M. Carrillo, P. Merchan (University of Extremadura, Badajoz,Spain).

Differential Difference Current Feedback Amplifier (DDCFA) 1303

Leslaw Topor-Kaminski, Piotr Holajn (Silesian Technical University, Gliwice, Poland).

A Novel High-Frequency CMOS Amplifier with Improved Bandwidth Performance 1307

G, Palmisano, S. Pcnnlsi (Universita di Catania, Catania, Italy).

Low Power Low Noise OTA CMOS Design Technique for Switched Capacitor Applications 1311

H. Elwan (Ohio State University, Columbus, OH, USA), W. Gao, R. Sadkowski (TexasInstrument, Dallas, TX, USA), M. Ismail (Ohio Slate University, Columbus, OH, USA).

SESSION R42: DIGITAL FILTERSAND FILTER BANKS - III

Cosine-Modulated Biorthogonal IIR Filter Banks 1315Kola Fukutomi, Masahiro Okuda, Masaaki Ikchara, Shin-ichi Takahashi (Keio University,Yokohama, Japan).

An Approach to Increase the Maximal Sample Frequency of Lattice Wave Digital Filters 1319Based on Circulators and Richards' Structures

Hakan Johansson (Linkoping University, Linkoping, Sweden).

Advanced Digital IIR Filter Design 1323

Dejan V. Tosic (University of Belgrade, Belgrade, Yugoslavia), M. D. Lutovac (IRITEL, Belgrade,Yugoslavia), Brian L. Evans (The University of Texas, Austin, TX, USA).

Modified Version of Chen and Lee's Algorithm for the Design of QMF Banks 1327

Sofija Bogdanova, Milko Rostov, Momcilo Bogdanov (SS. Cyril and Methodius University,Skopje, R. Macedonia).

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SESSIONR43: NEURALNETWORKS - II

Automatic Design System Based on Neural Networks 1331Kasin Prakobwaitayakit, Nobuo Fujii (Tokyo Institute of Technology, Tokyo, Japan).

Signal-Noise Neural Network for Use in Optimisation ofTransistor Performance 1335Filiz Gunes, Bedri A. Cetiner, Hamid Torpi (Yildiz Tech. University, Istanbul, Turkey).

Different Implementations of Neural Networks for Speaker Recognition 1339Rita Wouhaybi (IEEE Member, Beirut, Lebanon), Adnan M. Al-Alaoui (American University of

Beirut, NY, USA).

An Analog Implementation of Radial Basis Function Network Appropriate fo Transducer 1343Linearization

M. Lucks, N. Oki (Departamento de Engenharia Eletrica, FEIS-Unesp, Campus de Ilha Solteira,Brasil).

SESSIONR44: CELLULAR NEURALNETWORKS - III

Different Approaches for CNN VLSI Implementations 1347Ari Paasio, Asko Kananen, Kari Halonen, Veikko Porra (Helsinki University of Technology,Espoo, Finland).

Topologic Transformations in Active Contours: A DTCNN-Based Approach 1351D. L. Vilarino, D. Cabello (University of Santiago de Compostela, Spain), T. Kozek (University of

California, Berkeley, CA, USA), J-M. Pardo, V. M. Brea (University of Santiago de Compostela,Spain).

Hierarchical Cellular Neural Networks 1355

Toshiya Nakaguchi, Takaaki Harada, Yuichi Tanji (Sophia University, Tokyo, Japan), KenyaJin'no (Nippon Institute of Technology, Saitama, Japan), Mamoru Tanaka (Sophia University,Tokyo, Japan).

SESSION R45: GENERAL CIRCUITS AND SYSTEMS - II

A SystematicApproach toApplying Extra Element Theorem 1359

C. K. Tse, Y. M. Lai (The Hong Kong Polytechnic University, Hong Kong).

Necessary and Sufficient Conditions for Robust Stability for a Special Case of Continuous 1363

Linear Time Invariant Systems Represented by an Interval Matrix

Juan Jos6 Dario Delgado-Romero, Rodolfo Serafin Gonzalez-Garza, Eduardo Hernandez-Morales

(Instituto Tecnologico de Morelia, Morelia, Mexico), Alberto E. Aleman-Nieto (Instituto

Tecnologico de Nuevo Leon, Guadalupe, Mexico).

Substitution Theorem: a New Formulation 1367

A. M. Sommariva (University di Brescia, Brescia, Italy).

System Design Strategy by Optimum Control Theory Formulation 1371

A. M. Zemliak (Puebla Autonomous University, Puebla, Mexico).

SESSION R46: LOGIC SYNTHESISAND FORMALVERIFICATION

State Reduction of Incompletely Specified Finite Sequential Machines by the Use of Closed 1375

Compatible Pairs

Orhan Ucar (NETAS, Istanbul, Turkey), Ahmet Dervisoglu (Istanbul Technical University,

Istanbul, Turkey).

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An Algorithm for Boolean Substitution 1379

Giuseppe Caruso (Universita di Palermo, Palermo, Ilaly).

Data-Dependent Clocked Logic 1383

Francesco Pcssolano, Dave Prothcroe, Martin E. Bush (South Bank University, London, UK).

SESSIONR47: ADAPTIVE SIGNAL PROCESSING - II

An LMS and LMF Threshold Technique 1387

Corneliu Rusu, Adrian Burian, Pauli Kuosmanen (Tampere University of Technology, Tampere,

Finland).

A Combined Process and Measurement-Noise Covariance Estimation in Model-Based 1391

Adaptive FIR Filters

Dani Lippuner, A. N. Kaelin (Swiss Federal Institute ofTechnology, Zurich, Switzerland).

Using Preprocessing in Blind Source Separation of Convolutive Mixtures to Accelerate 1395

ConvergenceThomas P. von Hoff, A. N. Kaelin (Swiss Federal Institute of Technology, Zurich, Switzerland).

Low Computational Complexity Implementation of Pipelined RLS Adaptive Filters 1399

Kiyoshi Nishikawa, Hitoshi Kiya (Tokyo Metropolitan University, Tokyo, Japan).

LATE PAPERS

A New Induction Generator Conroller for Stand-alone Application with Unbalanced Load 1403

S. Wekhande, V. Agarwal (Indian Institute of Technology, Bombay, India).

Author Index 1407

XXXII