- 1 - Feiling Embedded OK6410 Development Board Hardware Manual - 2 - Manual Version Update Summary V2.0 V2 version of the first edition. V2.1 1. According to the new version of the schematic diagram, schematic section of this manual corrections. 2. Add a chip, the interface picture. 3. Add chip pinout description. 4. Add-use development board considerations. 5. Add Crystal description. 6. Add the power chip instructions. - 3 - About eleven OK6410 Development Board With the rapid development of microelectronics technology, ARM processor experience, including ARM7, ARM9, including a number of development process, and the ARM11 embedded mature application development will bring new vitality to make more high-end product applications possible. And 5-stage pipeline, compared ARM9, ARM11 has a load-store with a separate water and 8-stage pipeline arithmetic, under the same process, ARM11 and ARM9 processor performance increase compared to about 40%. ARM11 instruction execution ARMv6 architecture, ARMv6 instruction includes media processing for a single instruction stream multiple data stream (SIMD) extensions, using a special design to improve video processing performance. To be able to fast floating-point operations, ARM11 increased vector floating point unit. All of these structural improvement is unparalleled ARM9 processor. ARM11 for portable and wireless applications, providing superior performance never seen before, and so our main concern to minimize the cost and power consumption. ARM11 micro-architecture of the system performance can be guaranteed a basic 350-500MHz 1GHz extend to the final over. The performance of high efficiency micro-architecture that allows application developers to adjust according to different clock frequency and supply voltage, resulting in performance and power consumption to achieve the best compromise between. For example, a micro-architecture based on ARM11 processors in the 1.2V supply voltage, using 0.13um process to achieve, its power will not exceed 0.4mW/MHz. ARM11 microprocessor is a high performance, low power consumption of the 'standard 64' microprocessor! Most embedded applications for a true 64-bit processors are still considered unnecessary, and its enormous power and area unacceptable. In this regard, ARM11 chose a compromise solution with little cost, part of the implementation of a 64-bit micro-architecture. ARM11 integer unit only in the processor and cache, and between the whole units and between co-processor 64-bit data bus. The 64-bit data path allows the processor in one clock cycle to obtain two instructions simultaneously, but also allows one clock cycle to execute multiple data read and write commands. This makes the ARM11 in the implementation of many of a particular code sequence to achieve very high performance, especially those that allow data movement and data processing of parallel processing code sequence. S3C6410 Samsung introduced by a low-power, cost-effective RSIC processor, which

is based on ARM11 core (ARM1176JZF-S), can be widely used in mobile phones and general treatment and other fields; S3C6410 as 2.5G and 3G communication services provide optimized hardware performance, built-in powerful hardware accelerators include: sports video processing, audio processing, 2D acceleration, display processing and scaling; integrates a MFC (Multi-Format video Codec) support MPEG4 / H.263 / H H.264 and VC1 decoding codec that provides real-time video conferencing and the NRSC and the TV standard PAL output; In addition, the processor built using the most advanced technology of a 3D accelerator, support for OpenGL ES 1.1 / 2.0 and D3DM API, to achieve 4M triangles / s of the 3D acceleration; the same time, S3C6410 includes the optimization of the external memory interface, the interface in the high-end communications services to meet the data bandwidth requirements. Outstanding performance of the above, the famous Apple IPHONE mobile phone is based on S3C6410 processor. OK6410 development board based on Samsung's latest ARM11 processor S3C6410, has a strong internal resources and video processing capabilities, more stable operation in the 667MHz frequency to support a variety of Mobile DDR and NAND Flash. OK6410 development board integrates a variety of high-end interfaces such as composite video signal, camera, USB, SD card, LCD screen, Ethernet, and equipped with temperature sensors and infrared receiver top. Application of these interfaces can be used as reference to help users achieve high-end product-level design. - 4 - OK6410 development board using 'core board + chassis' structure, core board size specifications for the '5 CM × 6CM ', floor size '10 .5 CM × 14CM', the core plate and the bottom 4 between the use of imported high-quality connectors (nickel and gold technology, access to good, antioxidant), a total of 320 pins (80 × 4), the second development to facilitate customers to conduct various forms of extended application. OK6410 development board designed in strict accordance with CE, CCC certification standards and other electronic products at home and abroad, to fully consider the high-speed signal integrity, electromagnetic compatibility measures to ensure OK6410 development board in the harsh electromagnetic environment of reliable operation. OK6410 software system currently supports WinCE 6.0, LINUX2.6.28, Android2.1 and uC / OS-II, provides a standard Board Support Package (BSP) and open source, which contains drivers for all interfaces, customers can directly load use. In addition, the board can be connected to the company with the support of Feiling serial port expansion board for use, WIFI module, camera module. - 5 - OK6410 development board hardware resources twenty-two -6 Core layer PCB board design, performance and stability, after a strong test of the electromagnetic environment Samsung S3C6410 processor, ARM1176JZF-S core clocked at 533MHz/667MHz; • • Mobile DDR 128M bytes of memory; • • 1G bytes of NAND Flash (MLC); • • 12MHz, 48MHz, 27MHz, 32.768KHz clock source; • • Support 5V voltage supply; • • Board laminates designed -4 A reset button, reset the chip using a dedicated, stable and reliable • • 8-bit DIP switch used to set the system startup mode • • 4 serial ports, including a five-wire RS 232 level serial (DB9 female) and three three-TTL-level • • Serial Port (20pin 2.0mm pitch socket) 1 100M Ethernet ports, with DM9000AE, with connection and transmission indicator

light • • A USB HOST jack to support the USB1.1 protocol, plug the mouse, U disk, etc. • • 1 USB Slave interface, support USB2.0 protocol, using mini-USB socket, can be connected with the PC • • A high-speed SD card connector. SD Memory function can be achieved, and SDIO capabilities • • A wireless card (WIFI), the interface can be reused for the SD card interface • • 3 3.5MM standard stereo audio jack. These include an audio output jack can be connected with headphones connected • •; a microphone input socket; a line input jack Touchpad interface supports 4-wire resistive touch pad; LCD interface supports 3.5-inch, 4.3 inch, 5.6 inch, • • 5.7-inch, 7 inch, 8 inch, 10 inch TFT LCD, another exclusive 10-inch LVDS LCD support 1 channel CVBS output (PAL / NTSC) • • A CMOS camera interface, support ITU-RBT601/656 8-bit mode, using the 10 * 2 pin connectors • • control Internal real time clock with lithium battery back-seat, power-off time is not lost after the system • • A JTAG interface, using 10 × 2 pin connector • • A single digital temperature sensor (DS18B20) • • An infrared receiver • • 4 LED • • A buzzer • • 3 '10 × 2 'pin expansion port. Among them, an extension of the port, including a road GND, 1 Road, DA, 8 Road • • AD, 10 Road, IO, 1 Road, SPI; another expansion port is used to extend the keyboard 8 × 8 matrix; the third expansion port 3 can be connected TTL level serial port and 6-channel IO (Note: 3 serial ports, including a five-wire serial port and two three-wire serial port) - 6 - OK6410 startup mode introduces three three S3C6410 processor supports NAND FLASH, NOR FLASH and SD cards and other boot method, through the system configuration pins on power to determine the different states of the corresponding startup mode. OK6410 development board through configuration DIP switch SW2 select startup mode, as shown below: SW2 Pin Pin 8Pin 7Pin 6Pin 5Pin 4Pin 3Pin 2Pin 1 start 10011XXXSD card pin definitions SELNANDOM4OM3OM2OM1GPN15GPN14GPN13Nandflash start X1111000 Note: (1) SW2 switch is ON when "1"; OFF when "0", "X" is high or low (2) OK6410 development board factory default setting for the NAND FLASH boot mode Startup mode related design method is as follows: JTAGBOOT SELECTCOM0HOME: 9C560.1uC570.1uC630.1uC640.1u1C1 +2 V +3 C1-4C2 +5 C2-6V-10T2IN9R2O16VCC15GND11T1IN12R1O13R1IN14T1O7T2O8R2INU5MAX202ER2115KR715KR815KR915KR1015KR1115KR5315KR1215K1234567816151413121110SW2SWITCH8R4115KR5215KVDD33VNRESETTDON48TCKTMSTDITRSTNRTCKDBGSELVDD33VGNDGNDTXD0CTSN0RXD0VDD5VRTSN0VDD33VEINT15OM1OM2OM3OM4SELNNDVDD33VOM0EINT14EINT13GND 'OM0' signal for the S3C6410 chip clock source select signal, when the 'OM0' signal is "0" select 'XTlpll': When 'OM0' signal is "1" select 'EXTCLK'. Here, OK6410 development board using the 'XTlpll', so 'OM0' direct drop-down to ground.

'SELNAND' signal is used to select the system FLASH memory types, when the choice must be high when the NAND FLASH '1 ', select ONENAND memory is low '0', OK6410 development board NAND FLASH memory, so here directly on Access to high. 'EINT13-EINT15' way of equipment selection for the IROM start pin, when using IROM start mode, S3C6410 processor first firmware running on-chip ROM, read EINT15, EINT14, EINT13 three port pin state, then under this configuration different states, so choose a different startup. OM1-OM4 signal for the S3C6410 processor startup mode configuration pins. - 7 - OK6410 hardware design description of the main four-four NAND FLASH11 Latest OK6410 development board configuration 1G Bytes NAND FLASH, model K9G8G08U0A (another SLC 256M bytes of K9F2G08U0M structure for users to choose), chip select signal used CSn2. NAND FLASH memory used to store the main kernel code, applications, file systems and data. To facilitate the expansion of capacity, OK6410 designed to support dual-chip select architecture NAND FLASH chip, chip select signals to use CSn2 and CSn3, customers can be customized selection of 128M-2GB of space the size of the NAND FLASH, the specific design see design schematics. Note: OK6410 development board NAND FLASH memory, when using the NAND FLASH boot, S3C6410 processor also configured CSn2, CSn3 for the NAND FLASH memory chip select signal, so in this case CSn3 not connected bus devices other than the NAND FLASH . NAND FLASH design schematics: HOME: FL6410 Core Board COMPANY: Forlinx Embedded TITLE: www.forlinx.comMobile FLASH1NC12NC23NC34NC45NC511NC614NC729I/O030I/O131I/O232I/O341I/O442I/O543I/O644I/O79CE110CE218WE8RE16CLE17ALE7R/B16R/B215NC820NC921NC1022NC1123NC1224NC1325NC1426NC1527NC1628NC1733NC1834NC1935NC2038NC2139NC2240NC2345NC2446NC2547NC2648NC2712VCC13VCC213VSS119/WP36VSS2U3K9GAG08R1710RR1810RR194.7kR204.7kC550.1uC570.1u + C5610u + 0:15] DATA0DATA1DATA2DATA3DATA4DATA5DATA6DATA7CSN2CSN3FWENFRENFCLEFALERNBVDD_IOVDD_IOVDD_DQS2XM1_DQS3XM1_DQM2XM1_DQM3XM1_DATA [16:31] XM1_DATA16XM1_DATA17XM1_DATA18XM1_DATA19XM1_DATA20XM1_DATA21XM1_DATA22XM1_DATA23XM1_DATA24XM1_DATA25XM1_DATA26XM1_DATA27XM1_DATA28XM1_DATA29XM1_DATA30XM1_DATA31 - 8 - The following two figures, the first photo graph is K9G8G08U0A chip, the second figure is the pin-points Cloth. The first pin is the upper left corner of the first pin of the chip. K9G8G08U0A located in the core board. FLASH MEMORY 4 Preliminary K9G8G08U0M K9LAG08U1M PIN CONFIGURATION (TSOP1)

K9G8G08U0M-PCB0/PIB0 48-pin TSOP1 Standard Type 12mm x 20mm 123456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 N.C N.C N.C N.C N.C N.C

R / B RE CE N.C N.C Vcc Vss N.C N.C CLE ALE WE WP N.C N.C N.C N.C N.C N.C N.C N.C N.C I/O7 I/O6 I/O5 I/O4 N.C N.C Vcc Vss N.C N.C N.C I/O3 I/O2 I/O1 I/O0 N.C N.C N.C N.C N.C PACKAGE DIMENSIONS 48-PIN LEAD / LEAD FREE PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE (I) 48 - TSOP1 - 1220AF Unit: mm / Inch 0.787 � 0.008 20.00 � 0.20 # 1 # 24 0.16 +0.07

-0.03 0.008 +0.003 -0.001 0.50 0.0197 # 48 # 25 0.488 12.40MAX 12.00 0.472 0.10 0.004 MAX 0.25 (0.010) 0.039 � 0.002 1.00 � 0.05 0.002 0.05 MIN 0.047 1.20 MAX 0.45 ~ 0.75 0.018 ~ 0.030 0.724 � 0.004 18.40 � 0.10 0 ~ 8 � 0.010 0.25 TYP 0.125 +0.075 0.035 0.005 +0.003 -0.001 0.50 0.020 () 0.20 +0.07 -0.03 DataSheet4U.com www.ic-cn.com.cn 22DDR memory OK6410 development board configuration 128M Bytes Mobile DDR memory, using two Samsung K4X51163PC chip, DDR data bus frequency up to 266MHz Chip BGA package with small size, PCB board layout give full consideration to reflection, crosstalk and signal so long EMC design rules to ensure reliable operation OK6410 development board. Mobile DDR design schematics: Mobile DDR R19 R20 + C58 10u

C59 0.1u C60 0.1u C61 0.1u C62 0.1u C63 0.1u C64 0.1u C65 0.1u C66 0.1u C67 0.1u J8 A0 J9 A1 K7 A2 K8 A3 K2 A4 K3 A5 J1 A6 J2 A7 J3 A8 H1 A9 J7 A10 H2 A11 H3 A12 H8 BA0 H9 BA1 G2 CK G3 CK G9 RAS G8 / CAS G7 / WE H7 / CS0 G1 CKE0 F3 NC/CKE1 F7 NC/CS1 B1 VDDQ1 D1 VDDQ2 A7 VDDQ3 C9 VDDQ4 E9 VDDQ5 A9 VDD1 F9 VDD2 K9 VDD3 DQ0 A8 DQ1 B7 DQ2 B8 DQ3 C7 DQ4 C8 DQ5 D7 DQ6 D8 DQ7 E7 DQ8 E3 DQ9 D2 DQ10 D3 DQ11 C2 DQ12 C3 DQ13 B2 DQ14 B3 DQ15 A2 LDQS E8 UDQS E2 LDM F8 UDM F2 VSSQ1 A3 VSSQ2 C1 VSSQ3 E1 VSSQ4 B9 VSSQ5 D9 VSS1 A1 VSS2 F1 VSS3 K1 U11 K4X51163PEL J8 A0 J9 A1 K7 A2 K8 A3 K2 A4 K3 A5 J1 A6 J2 A7 J3 A8 H1 A9 J7 A10 H2 A11 H3 A12 H8 BA0 H9 BA1 G2 CK G3 CK G9 RAS G8 / CAS G7 / WE H7 / CS0 G1 CKE0 F3 NC/CKE1 F7 NC/CS1 B1 VDDQ1 D1 VDDQ2 A7 VDDQ3 C9 VDDQ4 E9 VDDQ5 A9 VDD1 F9 VDD2 K9 VDD3 DQ0 A8 DQ1 B7 DQ2 B8 DQ3 C7 DQ4 C8 DQ5 D7 DQ6 D8 DQ7 E7 DQ8 E3 DQ9 D2 DQ10 D3 DQ11 C2 DQ12 C3 DQ13 B2 DQ14 B3 DQ15 A2 LDQS E8 UDQS E2 LDM F8 UDM F2 VSSQ1 A3 VSSQ2 C1 VSSQ3 E1 VSSQ4 B9 VSSQ5 D9 VSS1 A1 VSS2 F1 VSS3 K1

U13 K4X51163PEL VDD_IO VDD_MDDR XM1_ADDR [0:15] XM1_ADDR0 XM1_ADDR1 XM1_ADDR2 XM1_ADDR3 XM1_ADDR4 XM1_ADDR5 XM1_ADDR6 XM1_ADDR7 XM1_ADDR8 XM1_ADDR9 XM1_ADDR10 XM1_ADDR11 XM1_ADDR12 XM1_ADDR14 XM1_ADDR15 XM1_SCLK XM1_SCLKN XM1_RASN XM1_CASN XM1_WEN XM1_CSN0 XM1_CKE0 VDD_MDDR XM1_ADDR [0:15] XM1_ADDR0 XM1_ADDR1 XM1_ADDR2 XM1_ADDR3 XM1_ADDR4 XM1_ADDR5 XM1_ADDR6 XM1_ADDR7 XM1_ADDR8 XM1_ADDR9 XM1_ADDR10 XM1_ADDR11 XM1_ADDR12 XM1_ADDR14 XM1_ADDR15 XM1_SCLK XM1_SCLKN XM1_RASN XM1_CASN XM1_WEN XM1_CSN0

XM1_CKE0 VDD_MDDR XM1_DQS0 XM1_DQS1 XM1_DQM0 XM1_DQM1 XM1_DATA [0:15] XM1_DATA0 XM1_DATA1 XM1_DATA2 XM1_DATA3 XM1_DATA4 XM1_DATA5 XM1_DATA6 XM1_DATA7 XM1_DATA8 XM1_DATA9 XM1_DATA10 XM1_DATA11 XM1_DATA12 XM1_DATA13 XM1_DATA14 XM1_DATA15 XM1_DQS2 XM1_DQS3 XM1_DQM2 XM1_DQM3 XM1_DATA [16:31] XM1_DATA16 XM1_DATA17 XM1_DATA18 XM1_DATA19 XM1_DATA20 XM1_DATA21 XM1_DATA22 XM1_DATA23 XM1_DATA24 XM1_DATA25 XM1_DATA26 XM1_DATA27 XM1_DATA28 XM1_DATA29 XM1_DATA30 XM1_DATA31 - 9 - The following two figures, the first map is KSX51163PG chip photo, second chart is overlooking the pin distribution. KSX51163PG located in the core board. The figure is K4X51163PC - L (F) E / GFebruary DDR SDRAMPackage Dimension and Pin ConfigurationBall NameBall FunctionCK, CKSystem Differential ClockCSChip

SelectCKEClock EnableA0 ~ A12AddressBA0 ~ BA1Bank Select AddressRASRow Address StrobeCASColumn Address StrobeWEWrite EnableL (U) DMData Input MaskL (U) DQSData StrobeDQ0 ~ 15Data Input / OutputVDD / VSSPower Supply / GroundVDDQ / VSSQData Output Power / Ground <Bottom View * 1> 60Ball (6x9) FBGA123789AVSSDQ15VSSQVDDQDQ0VDDBVDDQDQ13DQ14DQ1DQ2VSSQCVSSQDQ11DQ12DQ3DQ4VDDQDVDDQDQ9DQ10DQ5DQ6VSSQEVSSQUDQSDQ8DQ7LDQSVDDQFVSSDMN.CNCLDMVDDGCKECKCKWECASRASHA9A11A12CSBA0BA1JA6A7A8A10/AP A0A1KVSSA4A5A2A3VDD <Top View * 2> FEDCBJHGAK631745982K4X51163PC-XXXXSAMSUNGWeek # A1 Ball Origin IndicatoreDED1E1 <Top View * 2> * 2 : Top View * 1: Bottom ViewSymbolMinTypMaxA - 1.0A10.25 - E11.411.511.6E1-6.4-D9.910.010.1D1-7.2-e-0.80-b0.450.500.55z - 0.10 [Unit: mm] zAA1b 33 UART Interface OK6410 development board designed with 4 serial ports, including a five-wire RS-232 level serial port (DB9 female) and three three-wire TTL level serial port (20pin 2.0mm pitch socket), in order to facilitate the special needs of the users, which developed a special product to support additional serial port terminal board. The default for the debug serial port UART0 which can be connected directly to PC, to view the system debugging information. - 10 - Schematic design of the serial port 0: 9C560.1uC570.1uC630.1uC640.1u1C1 +2 V +3 C1-4C2 +5 C2-6V-10T2IN9R2O16VCC15GND11T1IN12R1O13R1IN14T1O7T2O8R2INU5MAX202ER2115KR715KR815KR915KR1015KR1115KR5315KR1215K1234567816151413121110 the following two diagrams, the first map is MAX202E chip photo, second chart is overlooking the pin distribution. MAX202E development board in the floor. � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � ± � � � � � � � � � � � � � � � � � � SLLS576D - JULY 2003 - REVISED JANUARY 20041POST PerJESD drivers, two line receivers, and a dual charge-pump circuit with ± D, DW, N, OR PW PACKAGE (TOP VIEW) 12345678161514131211109C1 + V + C1-C2 + C2-V-DOUT2RIN2VCCGNDDOUT1RIN1ROUT1DIN1DIN2ROUT2 - 11 - The following chart is a DB9 female COM0 Block. COM0 of the DB9 female on the development board seat bottom. Schematic in COM0, this seat is the name of the mother RS232_9. Figure 1-9 can be removed to see the number of labels. The following is the mother of the connection table seat with MAX202E Parent coordinates number 123456789 Electrical connection GND RXD TXD DTR GND DSR RTS CTS RI 44 USB HOST Interface OK6410 development board USB HOST port, support USB1.1 protocol, the use of horizontal USB plug-type female port (A type socket); can be connected to U disk, USB mobile hard disk, USB mouse, USB keyboard and other equipment. USB HOST design schematics: USB OTGUSB HOSTUSER KEYUSER 3D +4 GND5SHELL16SHELL2CN1USB2.1C330.1uC580.1uR5810KR5910KR7410KR7510KR7710KR7810KR5510KLED1SMD PUSH212S3SW_PUSH212S4SW_PUSH212S5SW_PUSH212S6SW_PUSH212S7SW_PUSH21GND2DQ3VDDDS1DS18B20R384.7K678954321U956579-

0576R2522RR2622R1OP2GND3VCCH1HYR404.7K12LED4SMD B210uH + C1210uC280.1uUSBDNUSBDPVDD33VVDD33VNLED2VDD33VNLED3VDD33VNLED1VDD33VNLED4KEYINT1KEYINT2KEYINT3KEYINT4KEYINT5KEYINT6VDD33VVDD33VUSB HOST interface uses a USB female port (A type socket). USB HOST contacts and menu below. Contact 1 2 3 4 Features VBUS D- D + Ground - 12 - USB OTG Interface 55 USB OTG interface supports 2.0 protocol, with Mini USB A / B Type Interface (U9), maximum operating speed of up to 480Mbps. System development, you can use the USB OTG interface for program download. USB OTG Schematic Design: USB OTGUSB HOSTUSER KEYUSER 3D +4 GND5SHELL16SHELL2CN1USB2.1C330.1uC580.1uR5810KR5910KR7410KR7510KR7710KR7810KR5510KLED1SMD PUSH212S3SW_PUSH212S4SW_PUSH212S5SW_PUSH212S6SW_PUSH212S7SW_PUSH21GND2DQ3VDDDS1DS18B20R384.7K678954321U956579-0576R2522RR2622R1OP2GND3VCCH1HYR404.7K12LED4SMD B210uH + C1210uC280.1uUSBDNUSBDPVDD33VVDD33VNLED2VDD33VNLED3VDD33VNLED1VDD33VNLED4KEYINT1KEYINT2KEYINT3KEYINT4KEYINT5KEYINT6VDD33VVDD33VUSB OTG interface uses a miniUSB male population (B-type plug). USB OTG contacts and menu below. Contact 1 2 3 4 5 Features VBUS D- D + ID Ground - 13 - JTAG Interface 66 OK6410 development board JTAG interface uses 10X2 pole interface (CN2). S3C6410 processor design JTAG interface is used to access the ARM11 core, or chip equipment, can be configured by SBGSEL signal selection, the specific configuration is as follows: DBGSEL signal is high, JTAG interface processor peripherals. • •

DBGSEL signal is low, JTAG connection to access the ARM11 core, the code for debugging. • • OK6410 development board DBGSEL signal can be jumper J9 to select. JTAG design schematics: JTAGBOOT ICE18273645RA210KR130R3330 | ¸ R515K112233J9CON3R615K1DCD2RXD3TXD4DTR5GND6DSR7RTS8CTS9RIP1RS232_2V +3 C1-4C2 +5 C2-6V-10T2IN9R2O16VCC15GND11T1IN12R1O13R1IN14T1O7T2O8R2INU5MAX202ER2115KR715KR815KR915KR1015KR1115KR5315KR1215K1234567816151413121110 the following diagram, is the JTAG interface, overlooking the photos, PCB silkscreen triangle pointing to the pin for the JTAG interface, the first pin, all pins can diagram to see the connection. JTAG interface is located development board floor. - 14 - RTC circuit 77 Development board equipped with a 'CR1220' type of button batteries, when in power from the system RTC (Real Time Clock) power supply. RTC design schematics are as follows: POWERUSER IO 1HOME: IO 3USER IO 2D2BAT1BATTERYD1R174.7KC340.1uR494._RTCVDD33VRXD1KP_SO1SPICLK0SPIMISO0GNDDAC_OUT1SPIMOSI0SPICS0HSYNCVD20VD19VD17VD7VD2EINT15EINT11KEYINT5KEYINT1VD12OM4PWRRGTONOM0OM2DBGSELOTGIDOTGDPOTGDMEINT12TRSTNDAC_ROW1KP_ROW2KP_ROW3KP_ROW4KP_ROW5KP_ROW6KP_ROW7KP_COL1KP_COL2KP_COL3KP_COL4KP_COL5KP_COL6KP_COL7GPP1GPP8GPP9GPP12GPP13GPK5TXD1RXD1RTSN1CTSN1RXD2TXD2RXD3TXD3KP_ROW0KP_COL0VDD5VGNDVDD5VI2CSDA0I2CSCL0I2CSCL0I2CSDA0VBUS BATTERY schematic of the battery. The following picture shows the Block button batteries and button cells. Button batteries and button cells in the development board seat bottom. - 15 - SD CARD0 deck 88 OK6410 development board integrates an SD card connector (CON2), using the four-SD card interface, supporting SD Memory and SDIO specification 2.0 protocol specification 1.0 protocol. As can support 8G SD SD Memory card. This port can be used as the system boot device, user volume, and software upgrades. SD CARD deck design schematics: SD CARDSDCARD0SDCARD WIFI INTERFACEPWM BUZZERAD CONVERTHOME: DAT32CMD3VSS14VDD5CLK6VSS27DAT08DAT110WP11NCD12PAD113PAD2CON2SD CARD SOCKET (SKT SD / MMC Standard Type) R1910KC160.1uR1810KR2010KR2210KR2310KR2410KR2910KR3010KR3110KR3210KR3310K + C2510uC260.1uB110uHR5010KR5110K11223344556677889910101111121213131414151516161717181819192020CN4MULTI_ICER12kEBCQ5BAU4BELLR220 | ¸ CN3DZQVDD33VMMC0_DATA2MMC0_CLKMMC0_DATA3MMC0_CMDMMC0_DATA0MMC0_DATA1MMC0_CDNMMC0_WPNVDD33VMMC1_WPNMMC1_DATA1MMC1_DATA0MMC1_CLKMMC1_CDNMMC1_CMDMMC1_DATA3MMC1_DATA2VDD_WIFIGPP11GPP10GPP11GPP10VDD33VVDD_TOUT1VDD5VVDD33VADCIN0VDD33V

The following picture shows the SD card connector. SD card connector development board in the floor. - 16 - WIFI Interface 99 OK6410 development board can be connected to WIFI module, the interface with the SDCARD1 deck using the same signals. Development board by matching the WIFI connection module to achieve WIFI Internet access and other functions; In addition, users can also use the interface to expand SD card connector, dual SD card functionality. WIFI Interface schematic diagram is as follows: SD CARDSDCARD0SDCARD WIFI INTERFACEPWM BUZZERAD CONVERTHOME: OK6410 Expansion COMPANY: Forlinx Embedded TITLE: www.forlinx.comR9310KR9410KR9510KR9110KR9210K9DAT21CD/DAT32CMD3VSS14VDD5CLK6VSS27DAT08DAT110WP11NCD12PAD113PAD2CON2SD CARD SOCKET (SKT SD / MMC Standard Type) R1910KC160.1uR1810KR2010KR2210KR2310KR2410KR2910KR3010KR3110KR3210KR3310K + C2510uC260.1uB110uHR5010KR5110K11223344556677889910101111121213131414151516161717181819192020CN4MULTI_ICER12kEBCQ5BAU4BELLR220 | ¸ CN3DZQVDD33VMMC0_DATA2MMC0_CLKMMC0_DATA3MMC0_CMDMMC0_DATA0MMC0_DATA1MMC0_CDNMMC0_WPNVDD33VMMC1_WPNMMC1_DATA2MMC1_CLKMMC1_DATA3MMC1_CMDMMC1_DATA0MMC1_DATA1MMC1_CDNMMC1_WPNMMC1_DATA1MMC1_DATA0MMC1_CLKMMC1_CDNMMC1_CMDMMC1_DATA3MMC1_DATA2VDD_WIFIGPP11GPP10GPP11GPP10VDD33VVDD_WIFIPWM_TOUT1VDD5VVDD33VADCIN0VDD33V Below SD1 seat. PCB silkscreen triangle pointing to the interface pin for the SD1 the first pin, all pins according to the diagram to see the connection. SD1 floor seats in the development board. - 17 - LCD screen and touch screen LCD interface, 111 OK6410 development board can support 3.5-inch, 4.3 inch, 5.6 inch, 7 inch, 8 inch, 10 inch TFT LCD screen. LCD screen, touch-screen interface method is as follows: POWERLCDHOME: comTV1234567891011121314151617181920JP1CAM_28292930303131323233333434353536363737383839394040CON1FPC-40AR154.7KR16012C11nf12C21nf12C315pf (NC) 5GND4VIN1POWER2VOUT3VSAGU6NJM2561F1R34150RR350C140.1uC170.1uR364.7K + C1847u + C1947uR3775R12TV1BNCR422R6422R6522R6622I2CSDA0I2CSCL0CAMRSTNCAMCLKCAMHREFCAMVSYNCCAMPCLKCAMYDATA7CAMYDATA6CAMYDATA5CAMYDATA4CAMVVDD_LCDVD0VD1VD2VD3VD4VD5VD6VD7GNDVD8VD9VD10VD11VD12VD13VD14VD15GNDVD16VD17VD18VD19VD20VD21VD22VD23GNDLVDENLVSYNCLVCLKLHSYNCTSXMTSXTSYMTSYPVDD_LCDCLKOUTVDD33VI2CSDA0I2CSCL0VDD33VDAC_ Below LCD seat, then under the FPC are 40pin Block (0.5mm pitch). LCD development board seat at the bottom. - 18 - TV OUT Interface 111 OK6410 development board integrates a TV OUT video output (S3C6410 processor supports), the use of 2Pin standard TV interface.

TVOUT design schematics: CAMCAM POWERLCDHOME: OK6410 COMPANY: Forlinx TITLE: www.comTV1234567891011121314151617181920JP1CAM_EXTEND3+ 40AR154.7KR16012C11nf12C21nf12C315pf (6V +5 GND4VIN1POWER2VOUT3VSAGU6NJM2561F1R34150RR350C140.1uC170.1uR364.7K + C1847u + C1947uR3775R12TV1BNCR422R6422R6522R6622I2CSDA0I2CSCL0CAMRSTNCAMCLKCAMHREFCAMVSYNCCAMPCLKCAMYDATA7CAMYDATA6CAMYDATA5CAMYDATA4CAMTSYMTSYPVDD_OUT0GND The following picture shows the TV interface. TV Interface in the development board floor. - 19 - 111 audio interface OK6410 S3C6410 development board audio processor using the AC97 bus. Add WM9714 audio chip, which integrates audio output, Line in input and Mic input. Audio output and MIC input and LINE IN audio jacks are standard. (1) The following is the WM9714 chip and audio line in the schematic: POWERHOME: IN5SDATA_OUT11RESTB14NC115NC216NC317NC424LINER23LINEL20MONO_IN38SPKVDD25AVDD143HPVDD49GNDPADDLE42AGND226AGND140HPGND18AGND348GPIO5/PCMADC47GPIO4/PCMDAC46GPIO3/PCMFS45GPIO2/RQ44GPIO1/PCMCLK39HPOUTL41HPOUTR31MONO35SPKL36SPKR21MIC122MICCM19PCBEEP29MIC2A/AUX128MICBIAS33OUT437OUT32MCLKA3MBCLKB30MIC2B/AUX212AUX413AVDD227VREF32CAP234SPKGNDU2WM9714LGEFL4VDD1OE3OUT2GNDU11Y705024.576MHzR600R6110KR620C351uC361uC371uC391uC411uC421u + C4647u + C4447uR63100K12354J6R6947KC49220pfC48220pfR6847K12354J7R7047KR710R73680R1VIN2GND3EN5VOUT4NCU8XC6219B33AMRR27100KC100.1uR280RC11.1uC661uC670.1u + C6810uR390C150.1uC591uC600.1uC611uC620.1uC651u12354J14VDD33VVDD33VMICVDD_AC97GND_AC97HPLHPRMICBIASAC97_BITCLKAC97_SYNCAC97_SDIAC97_SDOAC97_RSTNGND_AC97GND_AC97HPLHPRGND_AC97MICBIASMICVDD5VVDD_AC97GNDGND_AC97VDD33VVDD_AC97GND_AC97GND_AC97 - 20 - The following picture shows the WM9714 chip. PCB silkscreen triangle pointing to the pin for the WM9714 the first pin, all pins according to the diagram to see the connection. WM9714 development board in the floor. Below is the audio line in the top view of Block. Audio line input on the development board seat bottom. In WM9717 the schematic labeled J14. (2) Below is the mic Block diagram: SPEAKERMICAUDIOAUDIO OK6410 Expansion Board COMPANY: Forlinx Embedded TITLE: C4447uR63100K12354J6R6947KC49220pfC48220pfR6847K12354J7R7047KR710R73680R1VIN2GND3EN5VOUT4NCU8XC6219B33AMRR27100KC100.1uR280RC11C6810uR390C150.1uC591uC600.1uC611uC620.1uC651u12354J14VDD33VVDD33VMICVDD_AC97GND_AC97HPLHPRGND_AC97GND_AC97MICBIASMICVDD5VVDD_AC97GND_AC97GND_ Block below shows the top view of MIC input. Audio line input on the development board seat bottom. In the schematic labeled J7. The seat can be used to access the microphone input. - 21 -

(3) The following is the speaker Block diagram: SPEAKERMICAUDIOAUDIO OK6410 Expansion Board COMPANY: Forlinx Embedded TITLE: www.forlinx.com1DBVDD9DCVDD4DGND17DGND26BITCLK10SYNC8SDATA_C4447uR63100K12354J6R6947KC49220pfC48220pfR6847K12354J7R7047KR710R73680R1VIN2GND3EN5VOUT4NCU8XC6219B33AMRR27100KC100.1uR280RC11C6810uR390C150.1uC591uC600.1uC611uC620.1uC651u12354J14VDD33VVDD33VMICVDD_AC97GND_AC97HPLHPRGND_AC97GND_AC97MICBIASMICVDD5VVDD_AC97GND_ speaker under the seat map is a picture, you can access the headset. development board seat in the bottom speaker. In the schematic labeled J6. - 22 - 100M Ethernet port 111 OK6410 development of a 100M-board Ethernet interface, to extend through the DM9000AE chip. In the development process, the Ethernet interface can be used to connect PC, download the WINCE image; in the Linux system development, can be used to mount the NFS network file system. Use, to be directly connected via crossover cable PC, you can also use direct cable networking switch or router. DM9000AE use S3C6410 processor interrupt signal interrupts 'EINT7' signal. Ethernet port RJ45 socket by socket, built-in transformer. DM9000AE design schematics are as follows: ETHERNETETHERNET 38LED239LED140PWRST # 41TEST42VDD043X244X145GND046SD47RXGND048BGGND24SD1423VDD122SD1521EECS20EECK19EEDIO18SD017SD116SD215GND14SD313SD425SD1326SD1227S1128SD1029SD930VDD231SD832CMD33GND134INT35IOR36IOW12SD511SD610SD79TXVDD258TX-7TX +6 TXGND5RXGND4RX-3RX +2 RXVDD251BGRESU7DM9000AR426.8k 1% 12X125.0Mhz12C2022pf12C6922pf1RX + C75100nfR474.7KR484.7K12C76100nfR9022R +0:15] DATA0DATA1DATA2DATA3DATA4DATA5DATA6DATA7DATA8DATA9DATA10DATA11DATA12DATA13DATA14DATA15VDD33VVDD33VADDR2IRQ_LANVDD33VRXD + RXD-TXD + TXD-AVDD25RXD + - 23 - The following picture shows two photographs and DM9000AE chip I / O distribution, the lower left corner for the first pin chip. Development board for 16-bit mode DM9000AE, and another description of the eight models, users can find in the DM9000AE datesheet. DM9000AE development board in the floor. - 24 - RJ45 socket design method is as follows: ETHERNETETHERNET INTERFACEHOME: OK6410 Expansion Board COMPANY: Forlinx Embedded TITLE: www.forlinx.comC990.1uFC1030.1uFC1000.1uFC1010.1uFC1040.1uFC980.1uFC1020.1uF37CS # 12X125.0Mhz12C2022pf12C6922pf1RX +2 RX-3TX +4 N/C5N/C_56TX-7N/C_78N / C_813SHIELD114SHIELD212YLED_R11YLED_L10GLED_R9GLED_LJ10HR911105AR4350 1% R4450 1% C70100nfR4550 1% R4650 1% C75100nfR474.7KR484.7K12C76100nfR9022R + C7710uVDD33VDATA [RXD-TXD + TXD-AVDD25VDD33VVDD33VLED2LED1LED1LED2CSN1XNRSTOUTWENOEN CMOS camera interface 111 S3C6410 processor, camera support ITU-BT 601/656 8-bit mode, the maximum you can achieve 4096 X 4096 pixels.

OK6410 leads to the development board camera interface, using 10X20 pin method (CAM), can be used directly Feiling supporting the camera module. CAMERA signals in addition to the interface, but also increased the IIC signal, the parameters used to configure the camera; also added a GPIO signal (GPP14), mainly used in CAMERA's power control, to help implement power management system. CMOS camera interface design schematics: CMOS CAMCAM POWERLCDHOME: comTV1234567891011121314151617181920JP1CAM_EXTEND3 + C5010u + C5110uC520.1uC530.1u1IN2GND3OUT4U3LM1117-CT1.8R850 + C5510uF/16VR830R840C540.1uC840.1uC850.1uR1401122334455667788991010111112121313141415151616171718181919202021212222232324242525262627272C1947uR3775R12TV1BNCR422R6422R6522R6622I2CSDA0I2CSCL0CAMRSTNCAMCLKCAMHREFCAMVSYNCCAMPCLKCAMYDATA7CAMYDATA6CAMYDATA5CAMYDATA4CAMDATA3CAMYDATA2CAMYDATA1CAMYDATA0VDD33VVDD18VVDD33VGNDVDD18VVDD5VGNDVDD33VGPP14GNDVCLKHSYNCVSYNCVDENLVCLKLHSYNCLVSYNCLVDENGNDVDD - 25 - The figure below shows the top view of CAM blocks. PCB silkscreen triangle pointing to the pin for the CAM interface, the first pin, all pins according to the diagram to see the connection. CAM on the development board seat bottom. The CAM blocks can be used to access Feiling the CMOS camera. Reset button 111 OK6410 development board using the reset button 6X6mm touch switch, reset the chip select MAX811t (in the core board), professional reset chip can guarantee stable and reliable system. (1) Reset button design method is as follows: INTERFACERESETExpansion C410uC50.1u + C610uC70.1u + C810uC90.1uC130.1u + CT3.312R7610K1342S1SW_PUSH21M1MHOLE_C2710u123J5SIP2.0C920.1uC940.1uC810.1uC830.1uC860.1uC900.1uC910.1uC960.1uC970.1uGNDVDD_RSTVDD33V RESET button below shows the top view. RESET button located in the floor boards. Press this key to restart the development board. - 26 - (2) reset chip MAX811 design schematics are as follows: The picture shows the MAX811 chip clock12R8144.2RD20XURXD0/GPF13AE17XEINT0/GPN15AD16XNRSTOUTAD15WR_GPG0U1-BS3C641012R1100k1GND2RESET4VCC3MRU6MAX81112R2012R30R44.7kC1025pfR510k12R610K12R7012R8100k12X227Mhz12X348MhzC225pfC125pfC325pfC45pfC525pfC625pfR91MR101MR111MC1813pfC5213pf12X532.768KHzR125MR132kR142k12X112MhzRXD0TXD0CTSN0RTSN0RXD1TXD1CTSN1RTSN1RXD2TXD2RXDLANMMC1_CDNKEYINT6KEYINT5KEYINT4KEYINT3KEYINT2KEYINT1GPF13CLKOUTPWM_TOUT1RTCXTIRTCXTO27MXTI27MXTOXTIXTOVDD_IOTRSTNTMSTCKTDITDORTCKDBGSELOM0OM1OM2OM3OM4XNRSTOUTNRESETKEY_RSTVDD_IOVDD_IOSELNANDNBATFPWRRGTONVDD_ the following two pictures and I / O distribution, the upper left corner for the first pin chip. MAX811 located in the core board. DescriptionThe microprocessor (power sup-provide excellentcircuit eliminating externalcomponents used with 5V-MAX811/MAX812also input.They assert areset

voltage fallsbelow asserted for atleast reset thresh-devices is thatthe RESEToutput (which isguaranteed VCC down to1V), RESET out-ignore fasttransients available foroperation MAX812 idealfor devices come in a4-ApplicationsComputersControllersIntelligent Features � Precision Monitoring of 3V, 3.3V, and 5V Power-Supply Voltages � 6μA Supply Current � 140ms Min Power-On Reset Pulse Width; RESETOutput (MAX811), RESET Output (MAX812) � Guaranteed Over Temperature � Guaranteed RESETValid to VCC = 1V (MAX811) � Power-Supply Transient Immunity � No External Components � 4-Pin SOT143PackageMAX811/MAX8124-Pin μP Voltage Monitors with Manual Reset Input________________________________________________________________Maxim Integrated Products11243VCCMR (RESET) RESETGNDMAX811MAX812SOT143TOP VIEW () ARE FOR MAX812NOTE: SEE LAST PAGE FOR MARKING INFORMATION.___________________Pin ConfigurationMAX811MAX812VCCVCCRESET (FOR MAX812PUSHBUTTONSWITCHMR___________Operating Circuit19-MAX811_EUS-TMAX812_EUS-T-40 ° C to +85 ° C-40 ° C to +85 ° CTEMP. RANGEPIN-PACKAGE4 SOT1434 SOT143_______________Ordering Information * This part offers a choice of five different reset threshold voltages. Select the letter corresponding to the desired nominal reset threshold voltage, and insert it into the blank to complete the part number.RESET THRESHOLDSUFFIXVOLTAGE (V) L4.63M4.38T3.08S2.93R2.63For literature: http : / / www.maxim-ic.com, or phone 1-800-998-8800.835-8769. - 27 - Temperature sensors & infrared receiver 111 OK6410 DS18B20 development board with high-precision temperature sensor, and HS0038B integrated infrared receiver; Related design method is as follows: OTGUSB HOSTUSER KEYUSER TYPE (RED) R5710KLED2SMD TYPE (RED) R8010KLED3SMD TYPE (RED) R8210K12S2SW_PUSH21GND2DQ3VDDDS1DS18B20R384.7K678954321U956579-TYPE (RED) PE0VBUSOTGIDOTGDPOTGDMVDD5VVDD5VGPE1VDD5V (1) DS18B20 following picture shows the top view of the two and I / O distribution, the left foot for the first chip. DS18B20 in the development board floor. only one serial code distributed Power supply 55 ° C to C selectable word in alarm identifies and temperature is temperature pin? SOP, controls, products, PIN ASSIGNMENT PIN DESCRIPTION GND - Ground DQ - Data In / Out VDD - Power Supply Voltage NC - No Connect DS18B20Programmable Resolution1-Wire Digital Thermometerwww.Pin 150mil SO (DS18B20Z) TO-92 (DS18B20) 1 (BOTTOM VIEW) 2 3 DALLAS18B20 1 GND DQVDD 2 3 NCNCNC NC GND DQVDDNC68753 1 2 4 DALLAS18B20NCVDD NC NC NC GNDNCDQ68753 1 2 4 18B208- Pin? SOP (DS18B20U) - 28 - (2) below the top view of the two photo HS0038B and I / O distribution, the left foot for the first chip. HS0038B development board in the floor. The infrared receiver has three pins, from the figure direction, from left to right is OUT, GND, VCC. User IO 111 expansion interface User IO pin expansion port with 10X2, contains 8 AD inputs, all the way DA output, one spi bus, all the way to GND, the other for the common IO port. IO expansion port design schematics are as follows: POWERUSER IO 1HOME:

2D2BAT1BATTERYD1R174.7KC340.1uR494._OUT1SPIMOSI0SPICS0HSYNCVD20VD19VD17VD7VD2EINT15EINT11KEYINT5KEYINT1VD12OM4PWRRGTONOM0OM2DBGSELOTGIDOTGDPOTGDMEINT12TRSTNDAC_ROW1KP_ROW2KP_ROW3KP_ROW4KP_ROW5KP_ROW6KP_ROW7KP_COL1KP_COL2KP_COL3KP_COL4KP_COL5KP_COL6KP_COL7GPP1GPP8GPP9GPP12GPP13GPK5TXD1RXD1RTSN1CTSN1RXD2TXD2RXD3TXD3KP_ROW0KP_COL0VDD5VGNDVDD5VI2CSDA0I2CSCL0I2CSCL0I2CSDA0VBUS The figure below shows the user I / O Block, top view. PCB silkscreen triangle pointing to the pin for the user I / O Block, a pin, all pins according to the diagram to see the connection. User I / O development board seat in the bottom. User I / O to provide a better expansion interface. - 29 - Description of the crystal and the Fifth Power OK6410 provides a crystal source and power management unit, we summarize and learning in order to facilitate, in particular summed up as a chapter. (A) of the crystal source OK6410 provides six crystal source. The core board has four crystal source, are passive crystal: 1, the master clock, 12MHZ RTC ClockHOME: OTG clockGraphics clockRTCSYSTEM clock12R8144.2RD20XURXD0/5pfC525pfC625pfR91MR101MR111MC1813pfC5213pf12X532.768KHzR125MR132kR142k12X112MhzRXD0TXD0CTSN0RTSN0RXD1TXD1CTSN1RTSN1RXD2TXD2RXDRSTVDD_IOVDD_2, Graphics clock signal 27HZ, for the display module, such as the MFC LCD TV module provides the clock signal OTG clockGraphics clockRTCSYSTEM RSTVDD_IOVDD_3, USB clock, 48MHZ, USB SD Card SDIO used to provide the clock signal OTG clockGraphics clockRTCSYSTEM clock12R8144.2RD20XURXD0/RSTVDD_IOVDD_4, RTC clock, 32.768KHZ, for real-time clock module provides the clock signal. Please refer to the RTC section. - 30 - The base has two crystal Source: 1. 24.576MHz crystal. Supply to WM9714 MCLKA. Then the WM9713 on the internal supply AC97 CLK: 24.576MHz. The crystal oscillator is active. IN5SDATA_OUT11RESTB14NC115NC216NC317NC424LINER23LINEL20MONO_IN38SPKVDD25AVDD143HPVDD49GNDPADDLE42AGND226AGND140HPGND18AGND348GPIO5/PCMADC47GPIO4/PCMDAC46GPIO3/PCMFS45GPIO2/RQ44GPIO1/PCMCLK39HPOUTL41HPOUTR31MONO35SPKL36SPKR21MIC122MICCM19PCBEEP29MIC2A/AUX128MICBIAS33OUT437OUT32MCLKA3MBCLKB30MIC2B/AUX212AUX413AVDD227VREF32CAP234SPKGNDU2WM9714LGEFL4VDD1OE3OUT2GNDU11Y705024.576MHzR600R6110KR620C351uC361uC371uC391uC411uC421u + C4647u + C4447uR63100K12354J6R6947KC49220pfC48220pfR6847K12354J7R7047KR710R73680R1VIN2GND3EN5VOUT4NCU8XC6219B33AMRR27100KC100.1uR280RC11C6810uR390C150.1uC591uC600.1uC611uC620.1uC651u12354J14VDD33VVDD33VMICVDD_AC97HPLHPRMICBIASAC97_BITCLKAC97_SYNCAC97_SDIAC97_SDOAC97_RSTNGND_2. 25M crystal. Provide DM9000AE crystal source. The crystal is a passive crystal. ETHERNETETHERNET 38LED239LED140PWRST # 41TEST42VDD043X244X145GND046SD47RXGND048BGGND24SD1423VDD122SD1521EECS20EECK19EEDIO18SD017SD116SD215GND14SD313SD425SD1326S

D1227S1128SD1029SD930VDD231SD832CMD33GND134INT35IOR36IOW12SD511SD610SD79TXVDD258TX-7TX +6 TXGND5RXGND4RX-3RX +2 RXVDD251BGRESU7DM9000AR426.8k 1% 12X125.0Mhz12C2022pf12C6922pf1RX + C75100nfR474.7KR484.7K12C76100nfR9022R +0:15] DATA0DATA1DATA2DATA3DATA4DATA5DATA6DATA7DATA8DATA9DATA10DATA11DATA12DATA13DATA14DATA15VDD33VVDD33VADDR2IRQ_RXD-TXD + TXD-AVDD25RXD + - 31 - (B) Power Management Unit The following is a S3C6410 I / O voltage, and feature descriptions. 6410_UMPRODUCT OVERVIEW1-33The table below shows I / O types and descriptions. Input (I) / Output (O) Type Descriptionsdih (vddivh), si (vssipvh) Vdd / Vss for internal logic with internal pad power ring dich (vddicvh) Vdd for only internal logic dth (vddtvh), sth (vsstvh) 1.8 ~ 3.3V Vdd / Vss for external logic dtm (vddtvm) 1.8 ~ 2.5V Vdd for external logic dtlh (vddtvlh), stlh (vsstvlh) 1.2V Vdd / Vss for external and internal logicdrtc (vddrtcvh) 1.8 ~ 3.0V Vdd for RTC power dih_u (vddivh_usb) Vdd for usb phy core si_u (vssipvh_usb) Vss for usb phy core hag (pvhbsudtartg) 1.8V ~ 3.3V Wide Range Bi-directional Buffer with Schmitt Trigger Input, Controllable Pull-up/down Resistor and A type Output driver hag_a (pvhbsudtag_alv) 1.8V ~ 3.3V Wide Range Bi-directional Alive Buffer with Schmitt Trigger Input, Controllable Pull-up/down Resistor and A type Output driver hbg (pvhbsudtbrtg ) 1.8V ~ 3.3V Wide Range Bi-directional Buffer with Schmitt Trigger Input, Controllable Pull-up/down Resistor and B type Output driver hb_c (pvhbsudtbrt_ckds) 1.8V ~ 3.3V Wide Range Bi-directional Buffer with clock driver input for pulse clock or small amplitude clock, Schmitt Trigger Input, Controllable Pull-up/down Resistor and B type Output driver mbg (pvmbsudtbrtg) 1.8V ~ 2.5V Wide Range Bi-directional Buffer with Schmitt Trigger Input, Controllable Pull-up/down Resistor and B type Output driver sca (pvhsosca) 1.8V ~ 3.3V wide range oscillator for RTC Interface scb (pvhsoscbrt) 1.8V ~ 3.3V wide range oscillator for Wide Frequency usb1 (usb6002x1) USB 1.1 pad hr (pvhbr) 1.8V ~ 3.3V wide range analog bi-direction path-through PAD with 3 different paths which have no resistor, 50ohm or 100ohm resistorhtr (pvhtbr) 1.8V ~ 3.3V wide range analog tolerant bi-direction path-through PAD with 3 different paths which have no resistor , 50ohm or 100ohm resistorhtr00 (pvhtbr00_efuse) 1.8V ~ 3.3V wide range analog bi-direction path-through PAD without resistor for efuse memoryr_h (pvbr_h) 1.2V bi-direction path-through PAD with 3 different paths which have no resistor, 50ohm or 100ohm resistor Above table shows that CPU is not only needed a power supply. OK6410 provides multiple power management unit. OK6410 core board each way power supply input from the power chips alone, more stable and more secure. 1.S3C6410 ARM core power supply Signal Description Voltage VDDARM Internal power for ARM1176 core and cache 1.2 - 32 - Core Power 1.1V (533M/1.1V, 667M/1.2V) VDD INT Power 1.3VInternal blockMobile DDR Power 1.8vVDD Alive Powr 1.2VPLL 91uC800.1u1VIN2GND3EN5VOUT4NCU9XC6219B12AMRR27100KR280RC830.1uC840.1uC850.1u1VIN2GND3EN5VOUT4NCU10XC6219B33AMRR29100KC860.1uR30uR460RC1070.1uC1081uC1090.1uC1100.1u + C11110uC1120.1u + C10010uC1010.1uR480RC924.7u1VIN2GND3EN5LX4VOUTU15XC9216A13CMRC1024.7uB63.3uH + C10310uC1040.1uB73.3uH +

C11510uC1160.1uR47100KC1174.7u1M1MHOLE_IOVDD_ALIVEVDD_5VVBUSVDD_ARMVDD_IOPWRRGTONVDD_IOVDD_INTVDD_INTVDD_MDDRVDD_MDDRVDD_IO 2.S3C6410 ALIVE power Signal Description Voltage VDDALIVE Internal power for alive block 1.2 DDR Power 1.8vVDD Alive Powr 1.2VPLL 91uC800.1u1VIN2GND3EN5VOUT4NCU9XC6219B12AMRR27100KR280RC830.1uC840.1uC850.1u1VIN2GND3EN5VOUT4NCU10XC6219B33AMRR29100KC860.1uR30C11110uC1120.1u + C10310uC1040.1uB73.3uH + C11510uC1160.1uR47100KC1174.7u1M1MHOLE_IOVDD_ALIVEVDD_5VVBUSVDD_IOVDD_INTVDD_MDDRVDD_MDDRVDD_IO - 33 - 3.S3C6410 VDD internal power supply Signal Description Voltage VDDINT Internal power for logic 1.2 VDD INT Power 1.3VInternal blockMobile DDR Power 1.8vVDD Alive Powr 1.2VPLL 91uC800.1u1VIN2GND3EN5VOUT4NCU9XC6219B12AMRR27100KR280RC830.1uC840.1uC850.1u1VIN2GND3EN5VOUT4NCU10XC6219B33AMRR29100KC860.1uR30C11110uC1120.1u + C10010uC1010.1uR480RC924.7u1VIN2GND3EN5LX4VOUTU15XC9216A13CMRC1024.7uB63.3uH + C10310uC1040.1uB73.3uH + C11510uC1160.1uR47100KC1174.7u1M1MHOLE_IOVDD_ALIVEVDD_5VVBUSVDD_IOVDD_INTVDD_INTVDD_MDDRVDD_MDDRVDD_IO 4.S3C6410 Mobile DDR Power Supply Signal Description Voltage VDDM1 IO power for Memory Port 1 1.8 Core Power 1.1V (533M/1.1V, 667M/1.2V) VDD INT Power 1.3VInternal blockMobile DDR Power 1.8vVDD Alive Powr 1.2VPLL C10010uC1010.1uR480RC924.7u1VIN2GND3EN5LX4VOUTU15XC9216A13CMRC1024.7uB63.3uH + C10310uC1040.1uB73.3uH + C11510uC1160.1uR47100KC1174.7u1M1MHOLE_IOVDD_5VVBUSVDD_ARMVDD_IOPWRRGTONVDD_IOVDD_INTVDD_INTVDD_MDDRVDD_MDDRVDD_IO - 34 - 5.S3C6410 PLL power supply PLL power supply part MPLL, APLL, EPLL same power supply. Signal Description Voltage VDDPLL Power for PLL core 1.2 Power 1.2VUSB uR460RC1070.1uC1081uC1090.1uC1100.1u + IOVDD_PLLVDD_6.S3C6410 OTG power Signal Description Voltage VDDOTG Power for USB OTG PHY 3.3 OTG POWER 3.3vUSB OTGI Power 1.2VUSB_RC880.1uC890.1uC900.1uR310RR32110KC820.1uC870.1uR33180KR34330KR350RC910.1u1VIN2GND3EN5VOUT4NCU12XC6219B12AMRR45100KC1050.1uC1065VVDD_OTGIVDD_5VVDD_OTGGPF13VDD_ - 35 - 7.S3C6410 OTGI power Signal Description Voltage VDDOTGI Internal power for USB OTG PHY 1.2

FL6410 Core Board COMPANY: Power 1.2VUSB OTGI Power 1.2VUSB_OTG interruptNC3.3V1VIN2GND3EN5VOUT4NCU5XC6219B12AMR1SKIP2SHDN3IN4GND8OUT7CXP6CXN5PGNDU7MAX682ESAR24100KC760.1uC771u12R260RC780.1uCRC880.1uC890.1uC900.1uR310RR32110KC820.1uC870.1uR33180KR34330KR350RC910.1u1VIN2GND3EN5VOUT4NCU12XC6219B12AMRR45100KC1050.1uC106C11310uC810.1uR430R1VIN2GND3EN5LX4VOUTU2XC9216A12CMR1VIN2GND3EN5LX4VOUTU14XC9216A18CMRR44100KB53.3uH +5 VVDD_OTGIVDD_OTGGPF13VDD_5VOTGDRV_VBUSVBUSEINT8VDD_IOVDD_PLLVDD_ - 36 - Development Board precautions when using sixty-six If the development board are not familiar with or do not understand some of the basic operation of electronic products, we recommend looking for some information from the network to learn. Here we briefly about the development board in the learning and operational considerations in the process. 1. Development board hot-plug interface. Development board with multiple interfaces, some are hot-swappable, such as: USB HOST, USB OTG, audio input and output, network card, Block, SD card; some are not hot-swappable: LCD, serial port, VGA, camera the first module interface, WIFI interfaces, GPS Interface, TV OUT, etc.. So pay attention to the use of these interfaces to prevent misuse human damage caused by the development board. 2. Core board and backplane connectors. Feiling connectors used have been introduced in the previous, here explain the operation of plug. Of course, this is not supported by live hot-swappable. In the development board power, the release of the body's static electricity, and then forced evenly pry the core board right hand. When installing the connectors, power development board also needs to release the body's static electricity, according to the direction of the corresponding link. Adjourned. - 37 - OK6410 development board dimensions seventy-seven Core board dimensions are as follows: 11 Definition of the core board 38 feet PIN: 22 - 19 - - 19 - � � � � � � � � � � �

- 39 - - 20 - � � � �

- 40 - - 21 - - 21 - � � � �

- 41 - - 22 - - 22 - � � � �

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