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OptiX PTN 910 Packet Transport Platform of PTN Series V100R002C00 Hardware Description Issue 04 Date 2010-08-28 HUAWEI TECHNOLOGIES CO., LTD.

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Page 1: OptiX PTN 910 Hardware Description-(V100R002C00 04)

OptiX PTN 910 Packet Transport Platform of PTN SeriesV100R002C00

Hardware Description

Issue 04

Date 2010-08-28

HUAWEI TECHNOLOGIES CO., LTD.

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Page 3: OptiX PTN 910 Hardware Description-(V100R002C00 04)

Copyright © Huawei Technologies Co., Ltd. 2010. All rights reserved.No part of this document may be reproduced or transmitted in any form or by any means without prior writtenconsent of Huawei Technologies Co., Ltd. Trademarks and Permissions

and other Huawei trademarks are trademarks of Huawei Technologies Co., Ltd.All other trademarks and trade names mentioned in this document are the property of their respective holders. NoticeThe purchased products, services and features are stipulated by the contract made between Huawei and thecustomer. All or part of the products, services and features described in this document may not be within thepurchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information,and recommendations in this document are provided "AS IS" without warranties, guarantees or representationsof any kind, either express or implied.

The information in this document is subject to change without notice. Every effort has been made in thepreparation of this document to ensure accuracy of the contents, but all statements, information, andrecommendations in this document do not constitute the warranty of any kind, express or implied.

Huawei Technologies Co., Ltd.Address: Huawei Industrial Base

Bantian, LonggangShenzhen 518129People's Republic of China

Website: http://www.huawei.com

Email: [email protected]

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About This Document

Related VersionsThe following table lists the product versions related to this document.

Product Name Version

OptiX PTN 910 V100R002C00

Huawei iManager U2000 V100R002C00

Intended AudienceThis document describes the equipment structure, chassis structure, and board classification.This document also describes each board of these classes in details.

This document helps you get the detailed information about the equipment hardware.

This document is intended for:

l Network planning engineers

l Hardware installation engineers

l System maintenance engineers

Symbol ConventionsThe symbols that may be found in this document are defined as follows.

Symbol Description

DANGERIndicates a hazard with a high level of risk, which if notavoided, will result in death or serious injury.

WARNINGIndicates a hazard with a medium or low level of risk, whichif not avoided, could result in minor or moderate injury.

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Symbol Description

CAUTIONIndicates a potentially hazardous situation, which if notavoided, could result in equipment damage, data loss,performance degradation, or unexpected results.

NOTE Provides additional information to emphasize or supplementimportant points of the main text.

TIP Indicates a tip that may help you solve a problem or savetime.

GUI ConventionsThe GUI conventions that may be found in this document are defined as follows.

Convention Description

Boldface Buttons, menus, parameters, tabs, window, and dialog titlesare in boldface. For example, click OK.

> Multi-level menus are in boldface and separated by the ">"signs. For example, choose File > Create > Folder.

Change HistoryUpdates between document versions are cumulative. Therefore, the latest document versioncontains all updates made to previous versions.

Changes in Issue 04 (2010-08-28) Based on Product Version (V100R002C00)This document is the fourth release of the V100R002C00 version. Compared with issue 03(2010-05-20), this document updates the following contents:

Chasis

Updates the description of the installation scenarios.

Boards

Fixes the known bugs of the FE/GE interface specifications .

Others

Updates the description of the safety labels.

Changes in Issue 03 (2010-05-20) Based on Product Version (V100R002C00)This document is the third release of the V100R002C00 version. Compared with issue 02(2010-03-30), this document updates the following contents:

About This DocumentOptiX PTN 910

Hardware Description

iv Huawei Proprietary and ConfidentialCopyright © Huawei Technologies Co., Ltd.

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Boards

Updates the description of the functions of the CXPA/CXPB, and CXPG/CXPH.

Others

l Updates and optimizes the description of indicators.

l Fixes the known bugs.

Changes in Issue 02 (2010-03-30) Based on Product Version (V100R002C00)

This document is the second release of the V100R002C00 version. Compared with issue 01(2009-12-30), this document updates the following contents:

Others

Fixes the known bugs.

Changes in Issue 01 (2009-12-30) Based on Product Version (V100R002C00)

This document is the first release of the V100R002C00 version. Compared with theV100R001C01 version, this document updates the following contents:

This document is used to be Chapter 9 of the OptiX PTN 910 Product Description. For theV100R002C00 version, this part is separated as an independent document.

Boards

l Updates the diagram showing the inter-board relation of boards.

l Adds the description of single-fiber bidirectional optical modules in the contents describingthe front panels of the CXPG/CXPH, EG2, EF8F, and CD1 and technical specifications ofthese boards.

l Deletes the description of the IFE2 board.

Filler Panel

Adds the description of the functions and features of the filler panel.

Pluggable Optical Modules

Adds the description of the pluggable optical modules used by the equipment.

Fibers and Cables

Adds the description of various fibers and cables used by the equipment.

Others

l Updates and optimizes the description of indicators.

l Adds the table providing the board weight and power consumption.

l Adds the description of board configuration parameters.

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Contents

About This Document...................................................................................................................iii

1 Chassis..........................................................................................................................................1-1

2 Boards...........................................................................................................................................2-12.1 Overview of Boards........................................................................................................................................2-32.2 CXPA/CXPB...................................................................................................................................................2-5

2.2.1 Version Description................................................................................................................................2-62.2.2 Functions and Features...........................................................................................................................2-62.2.3 Working Principle and Signal Flow.......................................................................................................2-92.2.4 Front Panel...........................................................................................................................................2-112.2.5 Valid Slots............................................................................................................................................2-182.2.6 Board Configuration Reference...........................................................................................................2-182.2.7 Technical Specifications......................................................................................................................2-18

2.3 CXPG/CXPH................................................................................................................................................2-192.3.1 Version Description..............................................................................................................................2-202.3.2 Functions and Features.........................................................................................................................2-202.3.3 Working Principle and Signal Flow.....................................................................................................2-222.3.4 Front Panel...........................................................................................................................................2-242.3.5 Valid Slots............................................................................................................................................2-312.3.6 Board Configuration Reference...........................................................................................................2-312.3.7 Technical Specifications......................................................................................................................2-31

2.4 EF8T..............................................................................................................................................................2-342.4.1 Version Description..............................................................................................................................2-342.4.2 Functions and Features.........................................................................................................................2-342.4.3 Working Principle and Signal Flow.....................................................................................................2-352.4.4 Front Panel...........................................................................................................................................2-362.4.5 Valid Slots............................................................................................................................................2-382.4.6 Board Configuration Reference...........................................................................................................2-382.4.7 Technical Specifications......................................................................................................................2-38

2.5 EF8F..............................................................................................................................................................2-392.5.1 Version Description..............................................................................................................................2-392.5.2 Functions and Features.........................................................................................................................2-392.5.3 Working Principle and Signal Flow.....................................................................................................2-40

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2.5.4 Front Panel...........................................................................................................................................2-412.5.5 Valid Slots............................................................................................................................................2-432.5.6 Board Configuration Reference...........................................................................................................2-432.5.7 Technical Specifications......................................................................................................................2-43

2.6 EG2................................................................................................................................................................2-442.6.1 Version Description..............................................................................................................................2-452.6.2 Functions and Features.........................................................................................................................2-452.6.3 Working Principle and Signal Flow.....................................................................................................2-462.6.4 Front Panel...........................................................................................................................................2-472.6.5 Valid Slots............................................................................................................................................2-482.6.6 Board Configuration Reference...........................................................................................................2-482.6.7 Technical Specifications......................................................................................................................2-48

2.7 ML1/ML1A...................................................................................................................................................2-502.7.1 Version Description..............................................................................................................................2-512.7.2 Functions and Features.........................................................................................................................2-512.7.3 Working Principle and Signal Flow.....................................................................................................2-532.7.4 Front Panel...........................................................................................................................................2-542.7.5 Valid Slots............................................................................................................................................2-562.7.6 Board Configuration Reference...........................................................................................................2-572.7.7 Technical Specifications......................................................................................................................2-57

2.8 CD1...............................................................................................................................................................2-572.8.1 Version Description..............................................................................................................................2-582.8.2 Functions and Features.........................................................................................................................2-582.8.3 Working Principle and Signal Flow.....................................................................................................2-612.8.4 Front Panel...........................................................................................................................................2-632.8.5 Valid Slots............................................................................................................................................2-642.8.6 Board Configuration Reference...........................................................................................................2-642.8.7 Technical Specifications......................................................................................................................2-65

2.9 ADS2A/ADS2B............................................................................................................................................2-662.9.1 Version Description..............................................................................................................................2-672.9.2 Functions and Features.........................................................................................................................2-672.9.3 Working Principle and Signal Flow.....................................................................................................2-682.9.4 Front Panel...........................................................................................................................................2-692.9.5 Valid Slots............................................................................................................................................2-702.9.6 Board Configuration Reference...........................................................................................................2-702.9.7 Technical Specifications......................................................................................................................2-71

2.10 SHD4...........................................................................................................................................................2-712.10.1 Version Description............................................................................................................................2-722.10.2 Functions and Features.......................................................................................................................2-722.10.3 Working Principle and Signal Flow...................................................................................................2-732.10.4 Front Panel.........................................................................................................................................2-742.10.5 Valid Slots..........................................................................................................................................2-75

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2.10.6 Board Configuration Reference.........................................................................................................2-752.10.7 Technical Specifications....................................................................................................................2-76

2.11 SHD4I..........................................................................................................................................................2-762.11.1 Version Description............................................................................................................................2-762.11.2 Functions and Features.......................................................................................................................2-772.11.3 Working Principle and Signal Flow...................................................................................................2-772.11.4 Front Panel.........................................................................................................................................2-802.11.5 Valid Slots..........................................................................................................................................2-812.11.6 Board Configuration Reference.........................................................................................................2-812.11.7 Technical Specifications....................................................................................................................2-81

2.12 PIU..............................................................................................................................................................2-822.12.1 Version Description............................................................................................................................2-822.12.2 Functions and Features.......................................................................................................................2-822.12.3 Working Principle and Signal Flow...................................................................................................2-832.12.4 Front Panel.........................................................................................................................................2-832.12.5 Valid Slots..........................................................................................................................................2-852.12.6 Technical Specifications....................................................................................................................2-85

2.13 FAN.............................................................................................................................................................2-852.13.1 Version Description............................................................................................................................2-862.13.2 Functions and Features.......................................................................................................................2-862.13.3 Working Principle and Signal Flow...................................................................................................2-862.13.4 Front Panel.........................................................................................................................................2-872.13.5 Valid Slots..........................................................................................................................................2-882.13.6 Technical Specifications....................................................................................................................2-88

3 Filler Panel...................................................................................................................................3-13.1 Functions and Features....................................................................................................................................3-23.2 Appearance and Valid Slots............................................................................................................................3-2

4 Pluggable Optical Modules......................................................................................................4-14.1 Appearance and Application...........................................................................................................................4-24.2 Optical Module Labels....................................................................................................................................4-2

5 Fibers and Cables.......................................................................................................................5-15.1 Fibers...............................................................................................................................................................5-2

5.1.1 Fiber Types.............................................................................................................................................5-25.1.2 Fiber Connectors....................................................................................................................................5-2

5.2 -48 V Power Supply Cable..............................................................................................................................5-45.3 Protection Grounding Cables..........................................................................................................................5-55.4 Service Cables.................................................................................................................................................5-6

5.4.1 Ethernet Cables...................................................................................................................................... 5-65.4.2 75-Ohm 16 x E1 Cables.........................................................................................................................5-85.4.3 120-Ohm 16 x E1 Cables.....................................................................................................................5-115.4.4 xDSL Cables........................................................................................................................................5-14

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5.5 Management Cables......................................................................................................................................5-165.6 Clock Cables.................................................................................................................................................5-18

5.6.1 External Clock Cables..........................................................................................................................5-185.6.2 Clock Bridging Cable...........................................................................................................................5-20

5.7 Alarm Input/Output Cables...........................................................................................................................5-21

A Safety Labels.............................................................................................................................A-1

B Indicators....................................................................................................................................B-1

C Power Consumption and Weight..........................................................................................C-1

D Board Configuration Parameters..........................................................................................D-1

E Glossary.......................................................................................................................................E-1

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Figures

Figure 1-1 Appearance of the OptiX PTN 910.................................................................................................... 1-1Figure 1-2 Slot allocation of the OptiX PTN 910................................................................................................1-1Figure 2-1 Board relations of the OptiX PTN 910...............................................................................................2-5Figure 2-2 Block diagram for the working principle of the CXPA/CXPB..........................................................2-9Figure 2-3 Front panels of the CXPA and CXPB..............................................................................................2-11Figure 2-4 Block diagram for the working principle of the CXPG/CXPH........................................................2-23Figure 2-5 Appearances of the front panel of the CXPG and CXPH.................................................................2-24Figure 2-6 Block diagram for the functions of the EF8T...................................................................................2-35Figure 2-7 Font panel of the EF8T.....................................................................................................................2-37Figure 2-8 Block diagram for the functions of the EF8F...................................................................................2-40Figure 2-9 Font panel of the EF8F.....................................................................................................................2-41Figure 2-10 Block diagram for the functions of the EG2...................................................................................2-46Figure 2-11 Font panel of the EG2.....................................................................................................................2-47Figure 2-12 Block diagram for the working principle of the ML1/ML1A........................................................2-53Figure 2-13 Front panel of the ML1...................................................................................................................2-54Figure 2-14 Front panel of the ML1A................................................................................................................2-55Figure 2-15 Block diagram for the working principle of the CD1.....................................................................2-61Figure 2-16 Appearance of the front panel of the CD1......................................................................................2-63Figure 2-17 Block diagram for the working principle of the ADS2..................................................................2-68Figure 2-18 Appearance of the front panel of the ADS2A................................................................................2-69Figure 2-19 Appearance of the front panel of the ADS2B.................................................................................2-69Figure 2-20 Block diagram for the working principle of the SHD4..................................................................2-73Figure 2-21 Appearance of the front panel of the SHD4...................................................................................2-74Figure 2-22 Block diagram for the working principle of the SHD4I.................................................................2-78Figure 2-23 Appearance of the front panel of the SHD4I..................................................................................2-80Figure 2-24 Block diagram for the working principle of the PIU......................................................................2-83Figure 2-25 Appearance of the front panel of the PIU.......................................................................................2-84Figure 2-26 Block diagram for the working principle of the FAN....................................................................2-86Figure 2-27 Appearance of the front panel.........................................................................................................2-87Figure 3-1 Appearance of a filler panel................................................................................................................3-2Figure 4-1 Appearance of the eSFP optical module.............................................................................................4-2Figure 4-2 Optical module label...........................................................................................................................4-2Figure 5-1 LC/PC fiber connector........................................................................................................................5-3

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Figure 5-2 FC/PC fiber connector........................................................................................................................5-3Figure 5-3 SC/PC fiber connector........................................................................................................................5-4Figure 5-4 Appearance of the power cable...........................................................................................................5-5Figure 5-5 Appearance of the protection grounding cable...................................................................................5-5Figure 5-6 Appearance of the network cable.......................................................................................................5-7Figure 5-7 RJ-45 connector..................................................................................................................................5-7Figure 5-8 Structure of the network cable............................................................................................................5-7Figure 5-9 Appearance of the 75-ohm 16 x E1 cable...........................................................................................5-9Figure 5-10 Structure of the 75-ohm 16 x E1 cable.............................................................................................5-9Figure 5-11 Appearance of the 120-ohm 16 x E1 cable.....................................................................................5-12Figure 5-12 Structure of the 120-ohm 16 x E1 cable.........................................................................................5-12Figure 5-13 Structure of the telephone wire.......................................................................................................5-15Figure 5-14 RJ-45 connector..............................................................................................................................5-16Figure 5-15 Structure of the RJ-45 Connector...................................................................................................5-18Figure 5-16 Structure of the clock bridging cable..............................................................................................5-20Figure 5-17 Structure of the alarm input/output cable.......................................................................................5-22Figure A-1 Label position...................................................................................................................................A-2

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Tables

Table 2-1 Boards supported by the OptiX PTN 910 and their valid slots............................................................2-3Table 2-2 Functions and Features of the CXPA/CXPB.......................................................................................2-6Table 2-3 Types and usage of the interfaces on the CXPA/CXPB....................................................................2-12Table 2-4 Pins of the ETH/OAM interface........................................................................................................2-13Table 2-5 Pins of the CLK1/TOD1 and CLK2/TOD2 interface........................................................................2-14Table 2-6 Pins of the EXT/F1 interface..............................................................................................................2-15Table 2-7 Pins of the PHONE interface.............................................................................................................2-16Table 2-8 Pins of the ALMI/ALMO interface....................................................................................................2-16Table 2-9 Pins of the FE1-FE4 interfaces..........................................................................................................2-16Table 2-10 Pins of the Anea 96 interface...........................................................................................................2-17Table 2-11 Specifications of FE electrical interfaces.........................................................................................2-18Table 2-12 Specifications of E1 interfaces.........................................................................................................2-19Table 2-13 Functions and features of the CXPG/CXPH....................................................................................2-20Table 2-14 Interfaces on the CXPG/CXPH........................................................................................................2-25Table 2-15 Pins of the ETH/OAM interface......................................................................................................2-26Table 2-16 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces.....................................................................2-27Table 2-17 Pins of the PHONE interface...........................................................................................................2-28Table 2-18 Pins of the FE1 interface to FE4 interface.......................................................................................2-28Table 2-19 Pins of the GE optical interfaces......................................................................................................2-29Table 2-20 Pins of the Anea 96 interface...........................................................................................................2-29Table 2-21 Specifications of the FE electrical interface.....................................................................................2-31Table 2-22 Technical specifications of the GE optical interface........................................................................2-31Table 2-23 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code.............................................................................................................................................................................2-33Table 2-24 Wavelength allocation of 1000BASE-BX optical interfaces and related optical module code.......2-33Table 2-25 Specifications of the E1 interface.....................................................................................................2-33Table 2-26 Functions and features of the EF8T.................................................................................................2-34Table 2-27 Types and usage of interfaces on the EF8T.....................................................................................2-37Table 2-28 Pins of the RJ-45 connector of the EF8T.........................................................................................2-38Table 2-29 Specifications of interfaces on the EF8T.........................................................................................2-38Table 2-30 Functions and features of the EF8F.................................................................................................2-39Table 2-31 Interfaces of the EF8F......................................................................................................................2-42Table 2-32 Performance specifications of the FE optical interface....................................................................2-43Table 2-33 Wavelength allocation of 100BASE-BX optical interfaces and related optical module code.........2-44

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Table 2-34 Functions and Features of the EG2..................................................................................................2-45Table 2-35 Types and usage of optical interfaces on the EG2...........................................................................2-48Table 2-36 Technical specifications of the GE optical interface........................................................................2-49Table 2-37 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code.............................................................................................................................................................................2-50Table 2-38 Wavelength allocation of 1000BASE-BX optical interfaces and related optical module code.......2-50Table 2-39 Functions and features of the ML1/ML1A...................................................................................... 2-51Table 2-40 Type and usage of the interface on the front panel of the ML1.......................................................2-55Table 2-41 Pins of the Anea 96 interface...........................................................................................................2-55Table 2-42 Specifications of the interfaces on the ML1/ML1A.........................................................................2-57Table 2-43 Functions and features of the CD1...................................................................................................2-58Table 2-44 Interfaces on the CD1.......................................................................................................................2-64Table 2-45 Technical specifications of the STM-1 optical interface................................................................. 2-65Table 2-46 Wavelength allocation of single-fiber bidirectional interface optical interface and related optical modulecode..................................................................................................................................................................... 2-66Table 2-47 Functions and Features of the ADS2............................................................................................... 2-67Table 2-48 Types and usage of the interfaces on the ADS2...............................................................................2-70Table 2-49 Pins of the ADSL1 and ADSL2 interface on the ADS2..................................................................2-70Table 2-50 Performance specifications of the ADS2A......................................................................................2-71Table 2-51 Performance specifications of the ADS2B...................................................................................... 2-71Table 2-52 Functions and Features of the SHD4............................................................................................... 2-72Table 2-53 Types and usage of the interfaces on the SHD4...............................................................................2-75Table 2-54 Pins of the SHDSL1 - SHDSL4 interfaces on the SHD4.................................................................2-75Table 2-55 Performance specifications of the SHD4.........................................................................................2-76Table 2-56 Functions and Features of the SHD4I..............................................................................................2-77Table 2-57 Types and usage of the interfaces on the SHD4I.............................................................................2-80Table 2-58 Pins of the SHDSL1 - SHDSL4 interfaces on the SHD4I...............................................................2-81Table 2-59 Specifications of the interfaces of the SHD4I..................................................................................2-81Table 2-60 Functions and features of the PIU....................................................................................................2-82Table 2-61 Types and usage of the interfaces on the PIU..................................................................................2-84Table 2-62 Technical specifications of the PIU................................................................................................. 2-85Table 2-63 Technical specifications of the FAN................................................................................................2-88Table 4-1 Boards where the eSFP optical module is applicable..........................................................................4-2Table 4-2 Codes and types of optical modules.....................................................................................................4-3Table 5-1 Types of Fiber......................................................................................................................................5-2Table 5-2 Usage and types of fiber connectors....................................................................................................5-3Table 5-3 Technical specifications of the power cable........................................................................................5-5Table 5-4 Technical specifications of the power cable and protection grounding cable......................................5-6Table 5-5 Pin assignment of the network cable connector...................................................................................5-8Table 5-6 Technical specifications of the network cable.....................................................................................5-8Table 5-7 Pin assignment of the 75-ohm E1 cable connector............................................................................5-10Table 5-8 Technical specifications of the 75-ohm 16 x E1 cable.......................................................................5-11Table 5-9 Pin assignment of the 120-ohm E1 cable connector..........................................................................5-12

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Table 5-10 Technical specifications of the 120-ohm 16 x E1 cable...................................................................5-14Table 5-11 Pin assignment of the ADSL cable connector (RJ-11)....................................................................5-15Table 5-12 Pin assignment of the G.SHDSL cable connector...........................................................................5-15Table 5-13 Technical specifications of the xDSL cable.....................................................................................5-16Table 5-14 Pin assignment of the RJ-45 connector (ETH/OAM)......................................................................5-17Table 5-15 Pin assignment of the RJ-45 connector (EXT/F1)...........................................................................5-17Table 5-16 Technical specifications of the Ethernet cable.................................................................................5-18Table 5-17 Pin assignment of the RJ-45 connector (external clock mode)........................................................5-19Table 5-18 Pin assignment of the RJ-45 connector (external time mode).........................................................5-19Table 5-19 Technical specifications of the external clock cable........................................................................5-20Table 5-20 Pin assignment of the clock bridging cable connector.....................................................................5-20Table 5-21 Technical specifications of the clock bridging cable.......................................................................5-21Table 5-22 Pin assignment of the alarm input/output cable connector..............................................................5-22Table 5-23 Technical specifications of the alarm input/output cable.................................................................5-22Table A-1 Label description................................................................................................................................A-1Table B-1 Start status indicator combination.......................................................................................................B-7Table C-1 Power consumption and weight..........................................................................................................C-1Table D-1 Mapping relation between the service type and C2 byte....................................................................D-2Table D-2 Mapping relation between the service type and V5 byte................................................................... D-2

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1 Chassis

The OptiX PTN 910 is case-shaped for easy deployment.

Figure 1-1 shows the appearance of the OptiX PTN 910 equipment.

Figure 1-1 Appearance of the OptiX PTN 910

The dimensions of the OptiX PTN 910 are 442 mm (width) x 220 mm (depth) x 1 U (height, 1U = 44.45 mm).

The OptiX PTN 910 can be installed in the following scenarios:

l ETSI cabinet (300 mm deep)l ETSI cabinet (600 mm deep)l 19 inch cabinet (450 mm deep)l 19 inch cabinet (600 mm deep)l Indoor Mini Box (IMB) network boxl APM30/OMB outdoor cabinetl Open rack

The PTN equipment can be installed indoors or outdoors. The installation must satisfy therequirement of running environment for equipment. To better satisfy the requirement, you caninstall the equipment in an IMB network cabinet or an APM30/OMB outdoor cabinet. Use theGIE4805S external AC power supply system to provide power to the IMB network box oroutdoor cabinet.

Figure 1-2 shows the slot allocation of the OptiX PTN 910.

Figure 1-2 Slot allocation of the OptiX PTN 910

SLOT 3 SLOT 4SLOT5 SLOT 1 and SLOT 2

SLOT6

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1 ChassisOptiX PTN 910

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2 Boards

About This Chapter

Boards of the OptiX PTN 910 include system control, cross-connect and protocol processingboard, interface boards, power supply board, and fan board.

2.1 Overview of BoardsBoards are the key hardware components of the equipment.

2.2 CXPA/CXPBThis section describes the CXPA/CXPB, which is the system control, cross-connect and protocolprocessing board, with regard to the version, functions, features, working principle, front panel,valid slots, and technical specifications.

2.3 CXPG/CXPHThis section describes the CXPG/CXPH, which integrates the control, cross-connect, andprotocol processing units, in terms of the version, functions, features, working principle, frontpanel, valid slots, and technical specifications.

2.4 EF8TThis section describes the EF8T, which is an interface board with eight FE electrical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.

2.5 EF8FThis section describes the EF8F, which is an interface board with eight FE optical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.

2.6 EG2This section describes the EG2, which is an interface board with two GE optical interfaces, withregard to the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.7 ML1/ML1AThis section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regardto the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.8 CD1

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This section describes the CD1, which is a 1 x channelized STM-1 service processing board, interms of the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.9 ADS2A/ADS2BThis section describes the ADS2A/ADS2B, a 2-channel ADSL service interface board, in termsof the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.10 SHD4This section describes the SHD4, a 4-channel G.SHDSL service interface board, in terms of theversion, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.11 SHD4IThis section describes the SHD4I, a 4-channel SHDSL service interface board that supports theIMA mode, in terms of the version, functions, features, working principle, front panel, validslots, and technical specifications.

2.12 PIUThis section describes the PIU, a power input unit, in terms of the version, functions, features,working principle, front panel, valid slots, and technical specifications.

2.13 FANThis section describes the FAN, a fan board, in terms of the version, functions, features, workingprinciple, front panel, valid slots, and technical specifications.

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2.1 Overview of BoardsBoards are the key hardware components of the equipment.

Board Description and Valid SlotsTable 2-1 shows the boards supported by the OptiX PTN 910 and their valid slots.

Table 2-1 Boards supported by the OptiX PTN 910 and their valid slots

Board Name Board Description Valid Slot

CXPA System control, switchingand timing board, with 4 x FEservice interfaces and 16 x E1interfaces (matching 75-ohmE1)

Slot 1 and slot 2

CXPB System control, switchingand timing board, with 4 x FEservice interfaces and 16 x E1interfaces (matching 120-ohm E1)

Slot 1 and slot 2

CXPG System control, switchingand timing board, with 4 x FEservice interfaces, 2 x GEservice interfaces, and 16 xE1 interfaces (matching 75-ohm E1)

Slot 1 and slot 2

CXPH System control, switchingand timing board, with 4 x FEservice interfaces, 2 x GEservice interfaces, and 16 xE1 interfaces (matching 120-ohm E1)

Slot 1 and slot 2

EF8T 8 x FE service interface board(electric interface)

Slot 3, slot 4

EF8F 8 x FE service interface board(optical interface)

Slot 3, slot 4

EG2 2 x GE service interfaceboard

Slot 3, slot 4

ML1 16 x E1 service interfaceboard (75 ohms)

Slot 3, slot 4

ML1A 16 x E1 service interfaceboard (120 ohms)

Slot 3, slot 4

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Board Name Board Description Valid Slot

CD1 1 x channelized STM-1service interface board

Slot 3, slot 4

ADS2A/ADS2B 2 x ADSL2+ interface board Slot 3, slot 4

SHD4 4 x G.SHDSL interface board(supporting the ATM modeand EFM mode)

Slot 3, slot 4

SHD4I 4 x G.SHDSL interface board(supporting the IMA mode)

Slot 3, slot 4

PIU Power board Slot 5

FAN Fan board Slot 6

NOTE

l The CXPA and CXPB each house two slots. Slot 1 and slot 2 house one CXPA or CXPB.

l The CXPG and CXPH each house two slots. Slot 1 and slot 2 house one CXPG or CXPH.

l The second port of the CD1 can be used for only the LMSP protection.

l The ADS2A supports the Annex A mode. The ADS2B supports the Annex B mode.

Board RelationsThe OptiX PTN 910 uses different boards to achieve various functions.

Figure 2-1 shows board relations of the OptiX PTN 910.

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Figure 2-1 Board relations of the OptiX PTN 910

Network side

E1

User sideControl and

management module

Service processing

and forwarding

module

Clock module

Power module

PIU

Heat dissipation

module FAN

CXPA/CXPB/CXPG/CXPH

GEFE

-48 V DC/-60 V DC

E1

1 2 543 876

ADSL2+

G.SHDSL

FE

E1

FE

E1

FE

EF8T

EF8F

EG2

EF8T

EF8F

EG2

SHD4/SHD4I

ADS2

ML1/ML1A

ML1/ML1A

GE

GE

GE

-48 V DC/-60 V DC

1.Orderwire interface2.NM network interface3.Alarm interface4.Synchronous data interface5.NE serial interface6.Clock interface7.Time interface8.Concatenation interface

GE

Channelized STM-1 CD1

GE

CD1Channelized STM-1

NOTE

Only the CXPA/CXPB supports the NM cascading interface, transparent data interface, and alarm interface.The GE signal can be accessed from the front panel of only the CXPG/CXPH.

2.2 CXPA/CXPBThis section describes the CXPA/CXPB, which is the system control, cross-connect and protocolprocessing board, with regard to the version, functions, features, working principle, front panel,valid slots, and technical specifications.

NOTE

The matched impedance of the E1 service interface on the CXPA is 75 ohms and the matched impedanceof the E1 interface on the CXPB is 120 ohms. The CXPA and CXPB have the same functions and features,except for the impedance of the E1 service interfaces.

2.2.1 Version DescriptionThe functional version of the CXPA/CXPB is TNC1.

2.2.2 Functions and FeaturesThe CXPA/CXPB accesses and processes 4 x FE electrical signals and 16 x E1 signals, groomsservices, performs the system control, processes the system clock, and provides auxiliaryinterfaces.

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2.2.3 Working Principle and Signal FlowThe CXPA/CXPB consists of the control module, auxiliary interface module, service groomingand processing module, clock module, and power supply module.

2.2.4 Front PanelOn the front panel of the CXPA/CXPB, there are indicators, buttons, and interfaces.

2.2.5 Valid SlotsTwo slots house one CXPA/CXPB. The CXPA/CXPB can be housed in slot 1 and slot 2.

2.2.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the CXPA/CXPB.

2.2.7 Technical SpecificationsThe technical specifications of the CXPA/CXPB include the interface specifications, boarddimensions, weight, and power consumption.

2.2.1 Version DescriptionThe functional version of the CXPA/CXPB is TNC1.

2.2.2 Functions and FeaturesThe CXPA/CXPB accesses and processes 4 x FE electrical signals and 16 x E1 signals, groomsservices, performs the system control, processes the system clock, and provides auxiliaryinterfaces.

Table 2-2 lists the functions and features of the CXPA/CXPB.

Table 2-2 Functions and Features of the CXPA/CXPB

Function and Feature Description

Basic function Cross-connect capacity 6.5 Gbit/s

Line Rate I/O Capabilityusing the CXPA/CXPB

4.43 Gbit/s

Accesses and processes 4 x FE electrical signals and 16 x E1signals. In the case of the E1 services, the IMA, CES, andML-PPP protocols are supported.

Supports the inband DCN. By default, the DCN function isenabled at all the ports. In addition, this function can bedisabled or enabled manually.

Fractional E1 Supports the CES services and IMA services at 64 kbit/s level.

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Function and Feature Description

Auxiliary interface function Provides one NM serial port or NM network port tocommunicate with the NMS so that the NMS can manage andquery the equipment.Provides two interfaces for inputting and outputting theexternal clock/time to obtain the external clock/timeinformation.Provides one alarm input/output interface for three alarminputs and one alarm output.Provides one extended network port or 64 kbit/s synchronousdata port. The extended network port is used to realize thecascading of Huawei equipment. The 64 kbit/s synchronousdata port, which is compliant with ITU-T G.703, is used totransparently transmit other NM data.Provides one orderwire interface.The orderwire interface isreserved for later use.

Interface function Type of the loopback at theFE port

PHY-layer inloopMAC-layer outloop

Automatic loopback releaseat the port

Supported

LAG Intra-board LAG Supported

Inter-board LAG Supported

ATM/IMA Number of supported IMAgroups/supported ATM E1 services

8

Maximum number of E1links or 64kbit/s level serialports in each IMA group

16

Dynamically enables or disables the IMA group, restarts theIMA group protocol, and dynamically adds or deletes theIMA group members.

Supported traffic type CBRUBRUBR+rt-VBRnrt-VBR

Number of supported ATMconnections(VPC and VCC included)

256 remote connections128 local connections

Number of supported ATMservices

64

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Function and Feature Description

Encapsulates the ATM VPC/VCC services to the PWE3 inthe N-to-1 (N≤32) or 1-to-1 format.

Encapsulates the ATM cells to the PW in the concatenationand non-concatenation modes. The number of PWconnections that support the cell concatenation is 64, and themaximum number of concatenated cells is 31.

ATM OAM on the UNI sideand NNI side

Supports the CC test.

Supports the LB test.

CES Number of supported CESservices

16

Supported emulation mode CESoPSNSAToP

Supports the timeslot compression function. Provides the idle64 kbit/s timeslot suppression function for the CES servicesin the CESoPSN mode to save the transmission bandwidth.

Supported clock mode Retiming modeSelf-adaptation mode

The jitter compensation buffer time of the CES service can beset. The jitter buffer time ranges from 0.375 ms to 16 ms, andthe step value is 0.125 ms.

The packet loading time of the CES service can be set. Theencapsulation buffer time ranges from 0.125 ms to 3 ms, andthe step value is 0.125 ms.

ML-PPP Number of supported ML-PPP groups

7

Maximum number of linkssupported by each ML-PPPgroup

16

Functions as the NNI interface.

PRBS Supports the PRBS function in framed or unframed mode ofan E1 port in the receive/transmit direction.

APS Supports MPLS Tunnel APS.Supports 1:1 PW APS with dual-ended switching.

MPLS Tunnel OAM Supported

PW OAM Supported

BFD Supports BFD with a period of 3.3 ms, 10 ms, 20 ms, 50 ms,100 ms, or 1 s.

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Function and Feature Description

Black list and white list ofMAC addresses

Supported

Clock Synchronous Ethernet Supported

SSM protocol Supported by the FE ports

IEEE 1588V2 protocol Supported

1588 ACR clock Supported

2.2.3 Working Principle and Signal FlowThe CXPA/CXPB consists of the control module, auxiliary interface module, service groomingand processing module, clock module, and power supply module.

Figure 2-2 shows the block diagram for the working principle of the CXPA/CXPB.

Figure 2-2 Block diagram for the working principle of the CXPA/CXPB

Service grooming and

processing module

Clock module

Power supply module

Control module

4 x FE electrical signals

16 x E1 signals

Auxiliary interface module

Orderwire interface

Alarm input/output interface

Extended network interface/transparent data interface

NM network interface/serial interface

Transparent data signals

Orderwire signals

Alarm input/output signals

External time/clock signals

Time/clock signals

Extended network interface signals

NM network interface/serial interface signals

Clock signals

3.3 V

12 VFAN

Interface boards

Working clock

signals

Backplane

Working powerEach module on the board

Each module on the board

2-channel external time/clock input/output interface

Interface boards

Interface boardsService bus

Interface boards

Management bus

Management bus

-48 V/-60 VPIU

-48 V/-60 VPIU

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Control ModuleThis module performs the following functions:

l Configures and monitors the CXPA/CXPB and the entire system.

l Enables the communication through the NM serial interface and NM Ethernet interface.

l Enables the communication based on the extended Ethernet interface.

Service Grooming and Processing ModuleThis module performs the following functions:

l Accesses and processes 4 x FE electrical signals.

l Accesses and processes 16 x E1 signals.

l Processes the services accessed by the interface boards.

l Supports the CES, ML-PPP, and IMA protocols for E1 services.

l Grooms services with 6.5 Gbit/s switching capacity in the full-duplex mode.

l Supports 4.43 Gbit/s line rate I/O capability of the system.

Auxiliary Interface ModuleThis module performs the following functions:

l Provides two interfaces for input and output of the external clock/time.

l Provides one NM serial interface or NM Ethernet interface for communication with theNMS, management and queries of the equipment.

l Provides one alarm input/output interface to input three channels of alarms and output onechannel of alarms.

l Provides one orderwire interface.

l Provides one extended network port or 64 kbit/s synchronous data port. The extendednetwork port is used to realize the cascading of Huawei equipment. The 64 kbit/ssynchronous data port, which is compliant with ITU-T G.703, is used to transparentlytransmit other NM data.

NOTE

The orderwire interface is reserved for later use.

Clock ModuleThis module performs the following functions:

l Provides the system clock signals and processes the clock signals from the service boardsand the external clock/time interfaces.

l Provides the working clock for each module on the CXPA/CXPB.

l Supports the synchronous Ethernet and the SSM protocol.

l Supports the IEEE 1588V2 protocol.

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l Supports the 1588 ACR clock.

Power Supply Module

This module performs the following functions:

l Accesses two - 48 V DC or - 60 V DC power supplies.

l Supplies working power for each module on the CXPA/CXPB.

l Supplies 12 V power for the FAN board.

l Supplies 3.3 V power for other boards.

2.2.4 Front PanelOn the front panel of the CXPA/CXPB, there are indicators, buttons, and interfaces.

Appearance of the Front Panel

Figure 2-3 shows the appearance of the front panel of the CXPA/CXPB.

Figure 2-3 Front panels of the CXPA and CXPB

Indicator

The following indicators are present on the front panel of the CXPA/CXPB:

l STAT indicator, red, green, or orange, which indicates the working status

l PROG indicator, red or green, which indicates the running status of the program

l SYNC indicator, red or green, which indicates the clock synchronization status

l SRV indicator, red, green, or orange, which indicates the service status

l CRIT indicator, red, which indicates critical alarms

l MAJ indicator, orange, which indicates major alarms

l MIN indicator, yellow, which indicates minor alarms

l LINK indicator, green, which indicates the port connection status

l ACT indicator, yellow, which indicates the data transceiving status of the port

NOTE

The LINK and ACT indicators, which are present above ETH/OAM, EXT/F1, and FE service interface,indicate the connection status of the Ethernet interface.

For details on meanings of indicators, see B Indicators.

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Button

The following buttons are present on the front panel of the CXPA/CXPB:

l RST button, which is used for warm reset of the board. When you press the RST buttonand then release it, the board is reset (warm).

l CF RCV button, which is used to restore the configuration data from the CF card. Whenyou press the CF RCV button for 5 seconds, the equipment automatically restores theconfiguration data from the CF card.

l LAMP button, which is used to test the indicators. When you press the LAMP button,except the LINK indicators on the ADS2A/ADS2B and the FE service port indicators onthe EF8T/EF8F/CXPA/CXPB all the board indicators on the NE are on.

Interface

Table 2-3 lists the types and usage of the interfaces on the CXPA/CXPB.

Table 2-3 Types and usage of the interfaces on the CXPA/CXPB

Interfaceon theFrontPanel

InterfaceType

Usage Pin Corresponding Cable

ETH/OAM

RJ-45 10M/100M interface for NMnetwork port or NM serial port

For details, seeTable 2-4.

For details, see5.5ManagementCables.

CLK1/TOD1

RJ-45 External clock/time input/output interface

For details, seeTable 2-5.

For details, see5.6 ClockCables.

CLK2/TOD2

RJ-45 External clock/time input/output interface

EXT/F1 RJ-45 10Base-T/100Base-TXextended Ethernet interface or64 kbit/s synchronous datainterface

For details, seeTable 2-6.

For details, see5.5ManagementCables.

PHONE RJ-45 Orderwire interface For details, seeTable 2-7.

For details, see5.5ManagementCables.

ALMI/ALMO

RJ-45 3 x alarm inputs and 1 x alarmoutput interface

For details, seeTable 2-8.

For details, see5.7 AlarmInput/OutputCables.

FE1 - FE4 RJ-45 Input/output interface for FEelectrical signals

For details, seeTable 2-9.

For details, see5.4.1 EthernetCables.

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Interfaceon theFrontPanel

InterfaceType

Usage Pin Corresponding Cable

E1 (1 - 16) Anea 96 E1 service input/outputinterface

For details, seeTable 2-10

For details, see5.4.2 75-Ohm16 x E1Cablesand5.4.3 120-Ohm 16 x E1Cables.

NOTEThe FE1 to FE4 interfaces, ETH/OAM interface and EXT/F1 interface support auto-adaptation to astraight-through network cable or a crossover network cable.

The matched impedance of the E1 service interface on the CXPA is 75 ohms and the matched impedanceof the E1 interface on the CXPB is 120 ohms.

The PHONE interface is reserved for later use.

Table 2-4 Pins of the ETH/OAM interface

Front View Pin Usage

18 24 3567

1 Transmit positive of the NM interface

2 Transmit negative of the NM interface

3 Receive positive of the NM interface

4 Grounding end of the NM serial interface

5 Receive end of the NM serial interface

6 Receive negative of the NM interface

7 Undefined

8 Transmit end of the NM serial interface

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Table 2-5 Pins of the CLK1/TOD1 and CLK2/TOD2 interface

Front View Pin Usage

ExternalClock

ExternalTime Input(1PPS + TimeInformation)

ExternalTimeOutput(1PPS +TimeInformation)

ExternalTime Input(DCLS)

ExternalTime Output(DCLS)

18 24 3567

1 Negativereceive endof externalclock

Unspecified Unspecified Unspecified Unspecified

2 Positivereceive endof externalclock

Unspecified Unspecified Unspecified Unspecified

3 Unspecified Negative inputfor the 1ppssignal(RS422 level)

Negativeoutput for the1pps signal(RS422 level)

Negativeinput for theDCLS timesignal(RS422level)

Negativeoutput for theDCLS timesignal(RS422 level)

4 Negativetransmit endof externalclock

Grounding end Groundingend

Groundingend

Grounding end

5 Positivetransmit endof externalclock

Grounding end Groundingend

Groundingend

Grounding end

6 Unspecified Positive inputfor the 1ppssignal(RS422 level)

Positiveoutput for the1pps signal(RS422 level)

Positiveinput for theDCLS timesignal(RS422level)

Positive outputfor the DCLStime signal(RS422 level)

7 Unspecified Negative inputfor timeinformation(RS422 level)

Negativeoutput fortimeinformation(RS422 level)

Unspecified Unspecified

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Front View Pin Usage

ExternalClock

ExternalTime Input(1PPS + TimeInformation)

ExternalTimeOutput(1PPS +TimeInformation)

ExternalTime Input(DCLS)

ExternalTime Output(DCLS)

8 Unspecified Positive inputfor timeinformation(RS422 level)

Positiveoutput fortimeinformation(RS422 level)

Unspecified Unspecified

NOTEThe CLK1/TOD1 and CLK2/TOD2 interfaces can be configured so that they can work in one of the preceding five working modes.

Table 2-6 Pins of the EXT/F1 interface

Front View Pin Usage

18 24 3567

1 Transmit positive of the extended Ethernetinterface

2 Transmit negative of the extended Ethernetinterface

3 Receive positive of the extended Ethernetinterface

4 Transmit positive of the 64 kbit/ssynchronous data interface

5 Transmit negative of the 64 kbit/ssynchronous data interface

6 Receive negative of the extended Ethernetinterface

7 Receive positive of the 64 kbit/s synchronousdata interface

8 Receive negative of the 64 kbit/s synchronousdata interface

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Table 2-7 Pins of the PHONE interface

Front View Pin Purpose

18 24 3567

1 - 3 Undefined

4 RING

5 TIP

6 - 8 Undefined

Table 2-8 Pins of the ALMI/ALMO interface

Front View Pin Usage

18 24 3567

1 Alarm input 1

2 Grounding end for alarm input 1

3 Alarm input 2

4 Alarm input 3

5 Grounding end for alarm input 3

6 Grounding end for alarm input 2

7 Alarm output positive

8 Alarm output negative

Table 2-9 Pins of the FE1-FE4 interfaces

Front View Pin Usage

18 24 3567

1 Positive of twisted pair 1

2 Negative of twisted pair 1

3 Positive of twisted pair 2

4 Undefined

5 Undefined

6 Negative of twisted pair 2

7 Undefined

8 Undefined

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Table 2-10 Pins of the Anea 96 interface

Front View Connector Pin Usage Connector Pin Usage

1 R x 1 25 T x 1

2 26

3 R x 2 27 T x 2

4 28

5 R x 3 29 T x 3

6 30

7 R x 4 31 T x 4

8 32

9 R x 5 33 T x 5

10 34

11 R x 6 35 T x 6

12 36

13 R x 7 37 T x 7

14 38

15 R x 8 39 T x 8

16 40

17 R x 9 41 T x 9

18 42

19 R x 10 43 T x 10

20 44

21 R x 11 45 T x 11

22 46

23 R x 12 47 T x 12

24 48

49 R x 13 73 T x 13

50 74

51 R x 14 75 T x 14

52 76

53 R x 15 77 T x 15

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Front View Connector Pin Usage Connector Pin Usage

54 78

55 R x 16 79 T x 16

56 80

2.2.5 Valid SlotsTwo slots house one CXPA/CXPB. The CXPA/CXPB can be housed in slot 1 and slot 2.

2.2.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the CXPA/CXPB.

You can use the U2000 to set the following parameter for the CXPA/CXPB:

l Ethernet interface

l PDH interface

l Environment monitor interface

l External time interface

l Phase-locked source output by External clock

For details on the parameters, see D Board Configuration Parameters.

2.2.7 Technical SpecificationsThe technical specifications of the CXPA/CXPB include the interface specifications, boarddimensions, weight, and power consumption.

Interface Specifications

The interface specifications of the CXPA/CXPB are as follows:

l For specifications of FE electrical interfaces, see Table 2-11.

l For specifications of E1 interfaces, see Table 2-12.

Table 2-11 Specifications of FE electrical interfaces

Item Specification

Electrical interface rate 100 Mbit/s

RJ-45 electrical interface specification The specifications of the RJ-45 electricalinterfaces comply with the followingregulations:l IEEE 802.3 and enterprise regulations

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Table 2-12 Specifications of E1 interfaces

Item Specification Requirement

Nominal bit rate (kbit/s) 2048

Interface impedance 75 ohms (CXPA)120 ohms (CXPB)

Interface code HDB3

Pulse waveform at the output interface Complies with ITU-T G.703

Attenuation tolerance of the inputinterface at the point with a frequency of1024 kHz (dB)

0 to 6

Anti-interference capability of the inputinterface

Complies with ITU-T G.703

Input jitter tolerance Complies with ITU-T G.823

Output jitter Complies with ITU-T G.823

Other SpecificationsOther specifications of the CXPA/CXPB are as follows:

l Board dimensions (mm): 20.32 (H) x 226.00 (D) x 388.40 (W)

l Weight (kg): 1.25

l Power consumption (W): 43.9

2.3 CXPG/CXPHThis section describes the CXPG/CXPH, which integrates the control, cross-connect, andprotocol processing units, in terms of the version, functions, features, working principle, frontpanel, valid slots, and technical specifications.

NOTE

The matched impedance of the E1 service interface on the CXPG is 75 ohms and that on the CXPH is 120ohms. The CXPG and CXPH have the same functions and features, except for the impedance of theinterfaces.

2.3.1 Version DescriptionThe functional version of the CXPG/CXPH is TNC1.

2.3.2 Functions and FeaturesThe CXPG/CXPH accesses and processes 4 x FE electrical signals, 2 x GE optical signals, and16 x E1 signals, grooms services, performs the system control, processes the system clock, andprovides auxiliary interfaces.

2.3.3 Working Principle and Signal FlowThe CXPG/CXPH consists of the auxiliary interface module, control and communicationmodule, service grooming and processing module, clock module, and power supply module.

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2.3.4 Front PanelOn the front panel of the CXPG/CXPH, there are indicators, buttons, and interfaces.

2.3.5 Valid SlotsTwo slots house one CXPG/CXPH. The CXPG/CXPH can be housed in slots 1 and 2.

2.3.6 Board Configuration ReferenceThe CXPG/CXPH can be configured through the U2000.

2.3.7 Technical SpecificationsThe technical specifications of the CXPG cover the interface specifications, board dimensions,weight, and power consumption.

2.3.1 Version DescriptionThe functional version of the CXPG/CXPH is TNC1.

2.3.2 Functions and FeaturesThe CXPG/CXPH accesses and processes 4 x FE electrical signals, 2 x GE optical signals, and16 x E1 signals, grooms services, performs the system control, processes the system clock, andprovides auxiliary interfaces.

Table 2-13 lists the functions and features of the CXPG/CXPH.

Table 2-13 Functions and features of the CXPG/CXPH

Function and Feature Description

Basic function Cross-connect capacity 6.5 Gbit/s

Line Rate I/O Capabilityusing the CXPG/CXPH

6.43 Gbit/s

Accesses and processes 4 x FE electrical signals, 2 x GEoptical signals, and 16 x E1 signals.

Supports the inband DCN. By default, the DCN function isenabled at all the ports. In addition, this function can bedisabled or enabled manually.

Fractional E1 Supports the CES services and IMA services at 64 kibt/s level.

Auxiliary interface function Provides one NM serial port or NM network port tocommunicate with the NMS so that the NMS can manage andquery the equipment.Provides two interfaces for inputting and outputting theexternal clock/time to obtain the external clock/timeinformation.Provides one orderwire interface. The orderwire interface isreserved for later use.

Interface function Type of the loopback at theGE port

PHY-layer inloop andoutloopMAC-layer outloop

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Function and Feature Description

Type of the loopback at theFE port

PHY-layer inloopMAC-layer outloop

Automatic loopback releaseat the port

Supported

LAG Intra-board LAG Supported

Inter-board LAG Supported

ATM/IMA Number of supported ATME1 services

8

Number of supported IMAgroups

8

Maximum number of E1links or 64kbit/s serial portsin each IMA group

16

Dynamically enables or disables the IMA group, restarts theIMA group protocol, and dynamically adds or deletes theIMA group members.

Supported traffic type CBRUBRUBR+rt-VBRnrt-VBR

Number of supported ATMconnections

256 remote connections128 local connections

Number of supported ATMservices

64

Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N≤32) or 1-to-1 format.

Encapsulates the ATM cells to the PW in the concatenationand non-concatenation modes. The number of PWconnections that support the cell concatenation is 64, and themaximum number of concatenated cells is 31.

ATM OAM on the UNI sideand NNI side

Supports the CC test.

Supports the LB test.

CES Number of supported CESservices

16

Supported emulation mode CESoPSNSAToP

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Function and Feature Description

Supports the timeslot compression function. Provides the idle64 kbit/s timeslot suppression function for the CES servicesin the CESoPSN mode to save the transmission bandwidth.

Supported clock mode Retiming modeSelf-adaptation mode

The jitter compensation buffer time of the CES service can beset. The jitter buffer time ranges from 0.375 ms to 16 ms, andthe step value is 0.125 ms.

The packet loading time of the CES service can be set. Theencapsulation buffer time ranges from 0.125 ms to 3 ms, andthe step value is 0.125 ms.

ML-PPP Number of supported ML-PPP groups

7

Maximum number of linkssupported by each ML-PPPgroup

16

Functions as the NNI interface.

PRBS Supports the PRBS function in framed or unframed mode ofan E1 port in the receive/transmit direction.

APS Supports MPLS Tunnel APS.Supports 1:1 PW APS with dual-ended switching.

MPLS Tunnel OAM Supported

PW OAM Supported

BFD Supports BFD with a period of 3.3 ms, 10 ms, 20 ms, 50 ms,100 ms, or 1s.

Black list and white list ofMAC addresses

Supported

Clock Synchronous Ethernet Supported

SSM protocol Supported

IEEE 1588V2 protocol Supported

1588 ACR clock Supported

2.3.3 Working Principle and Signal FlowThe CXPG/CXPH consists of the auxiliary interface module, control and communicationmodule, service grooming and processing module, clock module, and power supply module.

Figure 2-4 shows the block diagram for the working principle of the CXPG/CXPH.

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Figure 2-4 Block diagram for the working principle of the CXPG/CXPH

Service grooming and

processing module

Clock module

Power supply module

Control and communication

module

4 x FE electrical signals

16 x E1 signals

Auxiliary interface module

NMS network port or NMS serial port

Two external time/clock signals

Orderwire signal

Clock signal

3.3 V

12 VFAN

Interface boards

Clock signal

Backplane

Working power supplyEach module

on the board

Each module on the board

Two external time/clock input/output interfaces

Interface boards

Interface boardsService bus

Interface boards

Management bus

Management bus

-48 V/-60 VPIU

-48 V/-60 V PIU

2 x GE signals

NMS signal

Orderwire interface

Auxiliary Interface Module

This module performs the following functions:

l Provides two interfaces for inputting and outputting the external clock/time.

l Provides one NM serial port or NM network port for communicating with the NMS,managing the equipment, and querying the equipment.

l Provides one orderwire interface.

NOTE

The orderwire interface is reserved for later use.

Control and Communication Module

This module performs the following functions:

l Configures and monitors the CXPG/CXPH and the entire system.

l Enables the communication through the NM serial port or NM network port.

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Service Grooming and Processing ModuleThis module performs the following functions:

l Accesses and processes 2 x GE optical signals.

l Accesses and processes 4 x FE electrical signals.

l Accesses and processes 16 x E1 signals.

l Processes the service signals accessed by the interface boards.

l Supports the CES, ML-PPP, and IMA protocols for E1 services.

l Grooms services with 6.5 Gbit/s switching capacity in the full-duplex mode.

l Supports 6.43 Gbit/s line rate I/O capability of the system.

Clock ModuleThis module performs the following functions:

l Provides the system clock signals and processes the clock signals from the service boardsand the external clock/time interfaces.

l Provides the working clock for each module on the CXPG/CXPH.

l Supports the synchronous Ethernet and the SSM protocol.

l Supports the IEEE 1588V2 protocol.

l Supports the 1588 ACR clock.

Power Supply ModuleThis module performs the following functions:

l Accesses two -48 V or -60 V DC power supplies.

l Supplies working power for each module on the CXPG/CXPH.

l Supplies 12 V power for the FAN board.

l Supplies 3.3 V power for the interface board.

2.3.4 Front PanelOn the front panel of the CXPG/CXPH, there are indicators, buttons, and interfaces.

Appearance of the Front PanelFigure 2-5 shows the appearance of the front panel of the CXPG/CXPH.

Figure 2-5 Appearances of the front panel of the CXPG and CXPH

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IndicatorsThe following indicators are present on the front panel of the CXPG/CXPH:

l STAT indicator, red, green, or orange, which indicates the working status

l PROG indicator, red or green, which indicates the running status of the program

l SYNC indicator, red or green, which indicates the clock synchronization status

l SRV indicator, red, green, or orange, which indicates the service status

l L/A1 and L/A2 indicators, orange or green, which indicate the connection status of the port

l CRIT indicator, red, which indicates critical alarms

l MAJ indicator, orange, which indicates major alarms

l MIN indicator, yellow, which indicates minor alarms

l LINK indicator, green, which indicates the port connection status

l ACT indicator, yellow, which indicates the data transceiving status of the port

NOTE

Above the ETH/OAM and four FE service interfaces, five pairs of LINK and ACT indicators are present,which indicate the connection status of the Ethernet interface.

For details on indications of indicators, see B Indicators.

ButtonsThe following buttons are present on the front panel of the CXPG/CXPH:

l RST button, which is used for warm reset of the board. When you press the RST buttonand then release it, the board is reset (warm).

l CF RCV button, which is used to restore the configuration data from the CF card. Whenyou hold down the CF RCV button for five seconds, the equipment automatically restoresthe configuration data from the CF card.

l LAMP button, which is used to test the indicators. When you press the LAMP button,except the LINK indicators on the ADS2A/ADS2B, the FE service port indicators on theEF8T/EF8F/CXPG/CXPH, and the L/A indicators on the CXPG/CXPH, all the boardindicators on the NE are on.

InterfacesTable 2-14 lists the types and usage of the interfaces on the CXPG/CXPH.

Table 2-14 Interfaces on the CXPG/CXPH

InterfaceName

Interface Type

Usage Pin Corresponding Cable

ETH/OAM

RJ-45 10M/100M interface for NMnetwork port or NM serialport

For details, seeTable 2-15.

For details, see5.5ManagementCables.

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InterfaceName

Interface Type

Usage Pin Corresponding Cable

CLK1/TOD1CLK2/TOD2

RJ-45 External time/clock input/output interface

For details, seeTable 2-16.

For details, see5.6 ClockCables.

PHONE RJ-45 Orderwire interface For details, seeTable 2-17.

For details, see5.5ManagementCables.

FE1 toFE4

RJ-45 Input/output interface for FEelectrical signals

For details, seeTable 2-18.

For details, see5.4.1 EthernetCables.

OUT1IN1,OUT2IN2

LC Input/output interface for GEoptical signals

For details, seeTable 2-19.

For details, see5.1.1 FiberTypes.

E1 (1 to16)

Anea 96 E1 service input/outputinterface

For details, seeTable 2-20.

For details, see5.4.2 75-Ohm16 x E1Cablesand 5.4.3120-Ohm 16 xE1 Cables.

NOTEThe FE1 to FE4 interfaces and ETH/OAM interface support auto-adaptation to a straight-through networkcable or a crossover network cable.

The matched impedance of the E1 service interface on the CXPG is 75 ohms and the matched impedanceof the E1 interface on the CXPH is 120 ohms.

The PHONE interface is reserved for later use.

Table 2-15 lists the pins of the ETH/OAM interface.

Table 2-15 Pins of the ETH/OAM interface

Front View Pin Usage

18 24 3567

1 Transmit positive of the NM network port

2 Transmit negative of the NM network port

3 Receive positive of the NM network port

4 Grounding end of the NM serial port

5 Receive end of the NM serial port

6 Receive negative of the NM network port

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Front View Pin Usage

7 Unspecified

8 Transmit end of the NM serial port

Table 2-16 lists the pins of the CLK1/TOD1 and CLK2/TOD2 interfaces.

Table 2-16 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces

Front View Pin

Working Mode

External Clock

ExternalTime Input(1PPS +TimeInformation)

External TimeOutput(1PPS + TimeInformation)

External TimeInput(DCLS)

External TimeOutput(DCLS)

18 24 3567

1 Receivenegativeof theCLK

Unspecified Unspecified Unspecified Unspecified

2 Receivepositiveof theCLK

Unspecified Unspecified Unspecified Unspecified

3 Unspecified

Inputnegative forthe 1PPSsignal(RS422 level)

Output negativefor the 1PPSsignal(RS422 level)

Input negativefor the DCLStime signal(RS422 level)

Output negativefor the DCLStime signal(RS422 level)

4 Transmitnegativeof theCLK

Groundingend

Grounding end Grounding end Grounding end

5 Transmitpositiveof theCLK

Groundingend

Grounding end Grounding end Grounding end

6 Unspecified

Input positivefor the 1PPSsignal(RS422 level)

Output positivefor the 1PPSsignal(RS422 level)

Input positivefor the DCLStime signal(RS422 level)

Output positivefor the DCLStime signal(RS422 level)

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Front View Pin

Working Mode

External Clock

ExternalTime Input(1PPS +TimeInformation)

External TimeOutput(1PPS + TimeInformation)

External TimeInput(DCLS)

External TimeOutput(DCLS)

7 Unspecified

Inputnegative forthe timeinformation(RS422 level)

Output negativefor the timeinformation(RS422 level)

Unspecified Unspecified

8 Unspecified

Input positivefor the timeinformation(RS422 level)

Output positivefor the timeinformation(RS422 level)

Unspecified Unspecified

NOTE

The CLK1/TOD1 and CLK2/TOD2 interfaces can be configured so that they can work in one of thepreceding five working modes.

Table 2-17 lists the pins of the PHONE interface.

Table 2-17 Pins of the PHONE interface

Front View Pin Usage

18 24 3567

1 to 3 Unspecified

4 RING

5 TIP

6 to 8 Unspecified

Table 2-18 lists the pins of the FE1 interface to FE4 interface.

Table 2-18 Pins of the FE1 interface to FE4 interface

Front View Pin Usage

18 24 3567

1 Positive of twisted pair 1

2 Negative of twisted pair 1

3 Positive of twisted pair 2

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Front View Pin Usage

4 Undefined

5 Undefined

6 Negative of twisted pair 2

7 Undefined

8 Undefined

Table 2-19 list the pins of the OUT1 IN1 and OUT2 IN2 interfaces.

Table 2-19 Pins of the GE optical interfaces

Interface on the FrontPanel

InterfaceType

Usage

Opticalinterface

IN1 to IN2 LC When a two-fiber bidirectional optical module isused, this interface is used as an input interfacefor the GE optical signal.When a single-fiber bidirectional optical moduleis used, this interface is not used.

OUT1 toOUT2

LC When a two-fiber bidirectional optical module isused, this interface is used as an output interfacefor the GE optical signal.When a single-fiber bidirectional optical moduleis used, this interface is used as an input/outputinterface for the GE optical signal.

NOTEThe SFP interface should be used with an optical module.

l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left andright sides of the optical module. Each interface uses one fiber, which is used to transmit or receiveservice signals.

l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the leftside of the optical module. This optical interface uses only one fiber, which is used to transmit andreceive service signals at the same time.

Table 2-20 Pins of the Anea 96 interface

Front View Connector Pin Usage Connector Pin Usage

1 R x 1 25 T x 1

2 26

3 R x 2 27 T x 2

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Front View Connector Pin Usage Connector Pin Usage

4 28

5 R x 3 29 T x 3

6 30

7 R x 4 31 T x 4

8 32

9 R x 5 33 T x 5

10 34

11 R x 6 35 T x 6

12 36

13 R x 7 37 T x 7

14 38

15 R x 8 39 T x 8

16 40

17 R x 9 41 T x 9

18 42

19 R x 10 43 T x 10

20 44

21 R x 11 45 T x 11

22 46

23 R x 12 47 T x 12

24 48

49 R x 13 73 T x 13

50 74

51 R x 14 75 T x 14

52 76

53 R x 15 77 T x 15

54 78

55 R x 16 79 T x 16

56 80

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2.3.5 Valid SlotsTwo slots house one CXPG/CXPH. The CXPG/CXPH can be housed in slots 1 and 2.

2.3.6 Board Configuration ReferenceThe CXPG/CXPH can be configured through the U2000.

You can use the U2000 to set the following parameters for the CXPG/CXPH:

l Ethernet interface

l PDH interface

l External time interface

l Phase-locked source output by External clock

For details on the parameters, see D Board Configuration Parameters.

2.3.7 Technical SpecificationsThe technical specifications of the CXPG cover the interface specifications, board dimensions,weight, and power consumption.

Interface Specifications

The interface specifications of the CXPG are as follows:

l For the specifications of the FE electrical interface, see Table 2-21.

l For the specifications of the GE optical interface, see Table 2-22.

l For the specifications of the E1 interface, see Table 2-25.

Table 2-21 Specifications of the FE electrical interface

Item Specification Requirement

FE electrical interface

Interface rate 100 Mbit/s.

RJ-45 electrical interfacespecification

Complies with IEEE 802.3 and enterpriseregulations.

Table 2-22 Technical specifications of the GE optical interface

Item Specification

Opticalinterface type

Two-fiber bidirectional interface Single-fiberbidirectionalinterface

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Item Specification

1000BASE-SX(0.5 km)

1000BASE-LX(10 km)

1000BASE-VX(40 km)

1000BASE-ZX(80 km)

1000BASE-CWDM(80 km)

1000BASE-BX(10 km)

Fiber type Multi-mode Single-mode Single-mode Single-mode Single-mode Single-mode

Workingwavelengthrange (nm)

770 to 860 1270 to 1360 1260 to 1360 1500 to 1580 For details, seewavelengthallocation of1000BASE-CWDMopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of1000BASE-BX opticalinterfaces andrelated opticalmodule code.

Meanlaunchedoptical power(dBm)

-9.5 to 0 -11 to -3 -5 to 0 -2 to 5 0 to 5 -9 to -3

Receiversensitivity(dBm)

-17 -19 -22 -22 -28 -19.5

Minimumoverload(dBm)

0 -3 -3 -3 -9 -3

Minimumextinctionratio (dB)

9 9 9 9 8.2 6

Opticalmodule code

34060286 3406047334060290

34060298 3406036034060324

For details, seewavelengthallocation of1000BASE-CWDMopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of1000BASE-BX opticalinterfaces andrelated opticalmodule code.

NOTEFor details of the optical module, see 4.2 Optical Module Labels.

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Table 2-23 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code

SN Optical modulecode

Wavelength (nm) SN Opticalmodule code

Wavelength (nm)

1 34060483 1464.5 to 1477.5 5 34060478 1544.5 to 1557.5

2 34060481 1484.5 to 1497.5 6 34060476 1564.5 to 1577.5

3 34060479 1504.5 to 1517.5 7 34060477 1584.5 to 1597.5

4 34060482 1524.5 to 1537.5 8 34060480 1604.5 to 1617.5

Table 2-24 Wavelength allocation of 1000BASE-BX optical interfaces and related optical module code

Item Local Remote

Optical module code 34060470 34060475

Transmitter wavelength (nm) 1260 to 1360 1480 to 1500

Receiver wavelength (nm) 1480 to 1500 1260 to 1360

Table 2-25 Specifications of the E1 interface

Item Specification Requirement

Nominal bit rate (kbit/s) 2048

Interface impedance 75 ohms (CXPG)120 ohms (CXPH)

Interface code HDB3

Pulse waveform at the output interface Complies with ITU-T G.703

Attenuation tolerance of the inputinterface at the point with a frequencyof 1024 kHz (dB)

0 to 6

Anti-interference capability of the inputinterface

Complies with ITU-T G.703

Input jitter tolerance Complies with ITU-T G.823

Output jitter Complies with ITU-T G.823

Other Specifications

Board dimensions (mm): 20.3 (H) x 226.0 (D) x 388.4 (W)

Board weight (kg): 1.32

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Power consumption (W): 46.8

2.4 EF8TThis section describes the EF8T, which is an interface board with eight FE electrical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.

2.4.1 Version DescriptionThe functional version of the EF8T is TND1.

2.4.2 Functions and FeaturesThe EF8T mainly accesses 8 x FE electrical signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

2.4.3 Working Principle and Signal FlowThe EF8T mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.

2.4.4 Front PanelOn the front panel of the EF8T, there are indicators and interfaces.

2.4.5 Valid SlotsThe EF8T can be housed in any of slots 3 - 4 in the slot area.

2.4.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8T.

2.4.7 Technical SpecificationsThe technical specifications of the EF8T include the interface specifications, board dimensions,weight, and power consumption.

2.4.1 Version DescriptionThe functional version of the EF8T is TND1.

2.4.2 Functions and FeaturesThe EF8T mainly accesses 8 x FE electrical signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

Table 2-26 lists the functions and features of the EF8T.

Table 2-26 Functions and features of the EF8T

Function and Feature Description

Basic function Supports eight FE electrical interfaces. Accesses 8 x FE electricalsignals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

Supports the inband DCN. By default, the DCN function isenabled at the first four ports. In addition, this function can bedisabled or enabled manually.

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Function and Feature Description

Supports the hot swappable function.

Detects the temperature and voltage of the board.

Interface function Type of the loopback at the port PHY-layer inloopMAC-layer outloop

Automatic loopback release at theport

Supported

LAG Intra-board LAG Supported

Inter-board LAG Supported

Black list and white list ofMAC addresses

Supported

Clock Synchronous Ethernet Supported

SSM protocol Supported

IEEE 1588V2 protocol Supported

1588 ACR clock Supported

2.4.3 Working Principle and Signal FlowThe EF8T mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.

Figure 2-6 shows the block diagram for the functions of the EF8T.

Figure 2-6 Block diagram for the functions of the EF8T

Access and convergence

module

8 x FE electrical signals Service bus

Control driver

module

Management bus

Service bus

Clock module

Power supply module

-48 V/-60 V

1.2 V

3.3 V

Clock signals

Backplane

Clock signals

PIUEach module on the board

Each module on the board-48 V/-60 V

PIU

Clock signals

CXP

CXP

CXP

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NOTE

As shown in Figure 2-6, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

Access and Convergence ModuleThis module performs the following functions:

l Accesses 8 x FE electrical signals.

l Buffers FE signals to avoid packet loss.

l Provides flow control frames to control the number of packets.

l Processes the IEEE 1588V2 packets.

Control Driver ModuleThis module performs the following functions:

l Detects the system status through the management bus.– Detects any fault of the system control board.

– Detects whether board is loosened from the slot.

– Detects the voltage and temperature.

l Realizes the hot swappable function of the board.

Clock ModuleThis module performs the following functions:

l Provides the working clock for each module on the board.

l Supports the synchronous Ethernet and the SSM protocol.

l Supports the IEEE 1588V2 protocol.

l Supports the 1588 ACR clock.

Power Supply ModuleThis module performs the following functions:

l Accesses two -48 V DC or -60 V DC power supplies.

l Supplies 3.3 V and 1.2 V power for the EF8T.

2.4.4 Front PanelOn the front panel of the EF8T, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-7 shows the appearance of the front panel of the EF8T.

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Figure 2-7 Font panel of the EF8T

IndicatorThe following indicators are present on the front panel of the EF8T:

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LINK indicator, green, which indicates the connection status of the port

l ACT indicator, yellow, which indicates the data transceiving status of the port

NOTE

There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicatorare present above each FE service interface.

For details on meanings of indicators, see B Indicators.

InterfaceTable 2-27 lists the types and usage of the interfaces on the EF8T.

Table 2-27 Types and usage of interfaces on the EF8T

Interface onthe FrontPanel

InterfaceType

Usage Pin Corresponding Cable

FE1 - FE8 RJ-45 Input/output interfacesfor FE electrical signals

For details, seeTable 2-28.

For details, see5.4.1 EthernetCables.

NOTEThe FE1 to FE8 interfaces support auto-adaptation to a straight-through network cable or a crossovernetwork cable.

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Table 2-28 Pins of the RJ-45 connector of the EF8T

Front View Pin Usage

18 24 3567

1 Positive of twisted pair 1

2 Negative of twisted pair 1

3 Positive of twisted pair 2

4 Unspecified

5 Unspecified

6 Negative of twisted pair 2

7 Unspecified

8 Unspecified

2.4.5 Valid SlotsThe EF8T can be housed in any of slots 3 - 4 in the slot area.

2.4.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8T.

You can use the U2000 to set the following parameter for the EF8T:

Ethernet interface

For details on the parameters, see D Board Configuration Parameters.

2.4.7 Technical SpecificationsThe technical specifications of the EF8T include the interface specifications, board dimensions,weight, and power consumption.

Table 2-29 lists the specifications of the electrical interfaces of the EF8T.

Table 2-29 Specifications of interfaces on the EF8T

Item Specification

FE electrical signal interface rate 100 Mbit/s

RJ-45 electrical interfacespecification

Complies with IEEE 802.3 and enterprise regulations.

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.53

Power consumption (W): 9.0

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2.5 EF8FThis section describes the EF8F, which is an interface board with eight FE optical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.

2.5.1 Version DescriptionThe functional version of the EF8F is TND1.

2.5.2 Functions and FeaturesThe EF8F mainly accesses 8 x FE optical signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

2.5.3 Working Principle and Signal FlowThe EF8F mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.

2.5.4 Front PanelOn the front panel of the EF8F, there are indicators and interfaces.

2.5.5 Valid SlotsThe EF8F can be housed in any of slots 3 - 4 in the slot area.

2.5.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8F.

2.5.7 Technical SpecificationsThe technical specifications of the EF8F include the interface specifications, board dimensions,weight, and power consumption.

2.5.1 Version DescriptionThe functional version of the EF8F is TND1.

2.5.2 Functions and FeaturesThe EF8F mainly accesses 8 x FE optical signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

Table 2-30 lists the functions and features of the EF8F.

Table 2-30 Functions and features of the EF8F

Function and Feature Description

Basic function Supports eight FE optical interfaces. Accesses 8 x FE opticalsignals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

Supports the inband DCN. By default, the DCN function isenabled at the first four ports. In addition, this function canbe disabled or enabled manually.

Supports the hot swappable function.

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Function and Feature Description

Detects the temperature and voltage of the board.

Interface function Type of the loopback at theport

PHY-layer inloopMAC-layer outloop

Automatic loopback releaseat the port

Supported

LAG Intra-board LAG Supported

Inter-board LAG Supported

Black list and white list ofMAC addresses

Supported

Clock Synchronous Ethernet Supported

SSM protocol Supported

IEEE 1588V2 protocol Supported

1588 ACR clock Supported

2.5.3 Working Principle and Signal FlowThe EF8F mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.

Figure 2-8 shows the block diagram for the functions of the EF8F.

Figure 2-8 Block diagram for the functions of the EF8F

Access and convergence

module

8 x FE optical signals Service bus

Control driver

module

Management bus

Service bus

Clock module

Power supply module

-48 V/-60 V

1.2 V

3.3 V

Clock signals

Backplane

Clock signals

PIUEach module on the board

Each module on the board -48 V/-60 VPIU

Clock signals

CXP

CXP

CXP

NOTE

As shown in Figure 2-8, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

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Access and Convergence ModuleThis module performs the following functions:

l Accesses 8 x FE optical signals.

l Buffers FE signals to avoid packet loss.

l Provides flow control frames to control the number of packets.

l Processes the IEEE 1588V2 packets.

Control Driver ModuleThis module performs the following functions:

l Detects the system status through the management control bus.– Checks whether any fault occurs on the system control board.– Detects whether board is loosened from the slot.– Detects the voltage and temperature.

l Realizes the hot swappable function of the board.

Clock ModuleThis module performs the following functions:

l Provides the working clock for each module on the EF8F.

l Supports the synchronous Ethernet and the SSM protocol.

l Supports the IEEE 1588V2 protocol.

l Supports the 1588 ACR clock.

Power Supply ModuleThis module performs the following functions:

l Accesses two - 48 V DC or - 60 V DC power supplies.

l Supplies 3.3 V and 1.2 V power for the EF8F.

2.5.4 Front PanelOn the front panel of the EF8F, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-9 shows the appearance of the front panel of the EF8F.

Figure 2-9 Font panel of the EF8F

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Indicators

The following indicators are present on the front panel of the EF8F:

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LINK1 to LINK8 indicators, green, which indicate the connection status of the port

For details on meanings of indicators, see B Indicators.

Interfaces

Eight SFP interfaces are present on the EF8F. Table 2-31 lists the types and usage of theinterfaces.

Table 2-31 Interfaces of the EF8F

Interfaceon theFrontPanel

InterfaceType

Usage CorrespondingFiber

IN1 - IN8 LC When a two-fiber bidirectional opticalmodule is used, this interface is used asan input interface for the FE opticalsignal.When a single-fiber bidirectionaloptical module is used, this interface isnot used.

For details, see 5.1.1Fiber Types.

OUT1 -OUT8

LC When a two-fiber bidirectional opticalmodule is used, this interface is used asan output interface for the FE opticalsignal.When a single-fiber bidirectionaloptical module is used, this interface isused as an input/output interface for theFE optical signal.

NOTEThe SFP interface should be used with an optical module.

l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left andright sides of the optical module. Each interface uses one fiber, which is used to transmit or receiveservice signals.

l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the leftside of the optical module. This optical interface uses only one fiber, which is used to transmit andreceive service signals at the same time.

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2.5.5 Valid SlotsThe EF8F can be housed in any of slots 3 - 4 in the slot area.

2.5.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8F.

You can use the U2000 to set the following parameter for the EF8F:

Ethernet interface

For details on the parameters, see D Board Configuration Parameters.

2.5.7 Technical SpecificationsThe technical specifications of the EF8F include the interface specifications, board dimensions,weight, and power consumption.

Table 2-32 lists the specifications of the optical interfaces of the EF8F.

Table 2-32 Performance specifications of the FE optical interface

Item Specification

Optical interfacetype

Two-fiber bidirectional interface Single-fiber bidirectional interface

100BASE-FX(15 km)

100BASE-FX(40 km)

100BASE-FX(80 km)

100BASE-BX(10 km)

100BASE-BX(40 km)

Fiber type Single-mode Single-mode Single-mode Single-mode Single-mode

Workingwavelengthrange (nm)

1261 to 1360 1263 to 1360 1480 to 1580 For details, seewavelengthallocation of100BASE-BXopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of100BASE-BXopticalinterfaces andrelated opticalmodule code.

Mean launchedoptical power(dBm)

-15 to -8 -5 to 0 -5 to 0 -15 to -8 -5 to 0

Receiversensitivity(dBm)

-28 -34 -34 -28.2 -30

Minimumoverload (dBm)

-8 -10 -10 -8 -10

Minimumextinction ratio(dB)

8.2 10 10 6.6 10

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Item Specification

Optical modulecode

3406027634060307

3406028134060308

3406028234060309

For details, seewavelengthallocation of100BASE-BXopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of100BASE-BXopticalinterfaces andrelated opticalmodule code.

NOTEFor details of the optical module, see 4.2 Optical Module Labels.

Table 2-33 Wavelength allocation of 100BASE-BX optical interfaces and related optical module code

Item Local Remote

Optical module code(10 km)

34060363 34060364

Optical module code(40 km)

34060328 34060329

Transmitter wavelength (nm) 1260 to 1360 1480 to 1580

Receiver wavelength (nm) 1480 to 1580 1260 to 1360

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.55

Power consumption (W): 12.8

2.6 EG2This section describes the EG2, which is an interface board with two GE optical interfaces, withregard to the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.6.1 Version DescriptionThe functional version of the EG2 is TND1.

2.6.2 Functions and FeaturesThe EG2 mainly accesses 2 x GE signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

2.6.3 Working Principle and Signal FlowThe EG2 mainly consists of the interface conversion module, control driving module, clockmodule, and power supply module.

2.6.4 Front Panel

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On the front panel of the EG2, there are indicators and interfaces.

2.6.5 Valid SlotsThe EG2 can be housed in any of slots 3 to 4 in the slot area.

2.6.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EG2.

2.6.7 Technical SpecificationsThe technical specifications of the EG2 include the interface specifications, board dimensions,weight, and power consumption.

2.6.1 Version DescriptionThe functional version of the EG2 is TND1.

2.6.2 Functions and FeaturesThe EG2 mainly accesses 2 x GE signals, and processes the services with the CXPA/CXPB/CXPG/CXPH.

Table 2-34 lists the functions and features of the EG2.

Table 2-34 Functions and Features of the EG2

Function and Feature Description

Basic function Supports two GE optical interfaces. Accesses 2 x GE signals,and processes the services with the CXPA/CXPB/CXPG/CXPH.

Supports the inband DCN. By default, the DCN function isenabled at the two ports. In addition, this function can bedisabled or enabled manually.

Supports the hot swappable function.

Detects the temperature and voltage of the board.

Interface function Type of the loopback at theport

PHY-layer inloop andoutloopMAC-layer outloop

Automatic loopback releaseat the port

Supported

LAG Intra-board LAG Supported

Inter-board LAG Supported

Black list and white list ofMAC addresses

Supported

Clock Synchronous Ethernet Supported

SSM protocol Supported

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Function and Feature Description

IEEE 1588V2 protocol Supported

1588 ACR clock Supported

2.6.3 Working Principle and Signal FlowThe EG2 mainly consists of the interface conversion module, control driving module, clockmodule, and power supply module.

Figure 2-10 shows the block diagram for the functions of the EG2.

Figure 2-10 Block diagram for the functions of the EG2

Interface conversion

module

2 x GE signals Service bus Control driver

module

Management bus

Service bus

Clock module

Power supply module

-48 V/-60 V

1.2 V

3.3 V

Clock signals

Backplane

Clock signals

PIUEach module on the board

Each module on the board

CXP

-48 V/-60 VPIU

Clock signals

CXP

CXP

NOTE

As shown in Figure 2-10, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

Interface Conversion Module

This module performs the following functions:

l Accesses 2 x GE services in two directions.

l Supports ESFP optical interfaces and GE colored optical interfaces. Select a proper opticalinterface for single-mode or multi-mode transmission over a specified distance.

Control Driving Module

This module performs the following functions:

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l Detects the system status through the management bus.– Detects any fault of the system control board.

– Detects whether board is loosened from the slot.

– Detects the voltage and temperature.

l Realizes the hot swappable function of the board.

Clock moduleThis module performs the following functions:

l Provides the working clock for each module on the EG2.

l Supports the synchronous Ethernet and the SSM protocol.

l Supports the IEEE 1588V2 protocol.

l Supports the 1588 ACR clock.

Power Supply ModuleThis module performs the following functions:

l Accesses two -48 V DC or -60 V DC power supplies.

l Supplies 3.3 V or 1.2 V power for each module on the EG2.

2.6.4 Front PanelOn the front panel of the EG2, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-11 shows the appearance of the front panel of the EG2.

Figure 2-11 Font panel of the EG2

IndicatorsThe following indicators are present on the front panel of the EG2.

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LINK1 to LINK2 indicators, green, which indicate the connection status of the port

l ACT1 to ACT2 indicators, yellow, which indicate the data transceiving status of the port

For details on meanings of indicators, see B Indicators.

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InterfacesTwo SFP interfaces are present on the EFG2. Table 2-35 lists the types and usage of the interfaceson the EG2.

Table 2-35 Types and usage of optical interfaces on the EG2

Interface on theFront Panel

InterfaceType

Usage Corresponding Fiber

Opticalinterface

IN1,IN2

LC When a two-fiber bidirectional opticalmodule is used, this interface is used as aninput interface for the GE optical signal.When a single-fiber bidirectional opticalmodule is used, this interface is not used.

For details,see 5.1.1Fiber Types.

OUT1,OUT2

LC When a two-fiber bidirectional opticalmodule is used, this interface is used as anoutput interface for the GE optical signal.When a single-fiber bidirectional opticalmodule is used, this interface is used as aninput/output interface for the GE opticalsignal.

NOTEThe SFP interface should be used with an optical module.

l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left andright sides of the optical module. Each interface uses one fiber, which is used to transmit or receiveservice signals.

l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the leftside of the optical module. This optical interface uses only one fiber, which is used to transmit andreceive service signals at the same time.

2.6.5 Valid SlotsThe EG2 can be housed in any of slots 3 to 4 in the slot area.

2.6.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EG2.

You can use the U2000 to set the following parameter for the EG2:

Ethernet interface

For details on the parameters, see D Board Configuration Parameters.

2.6.7 Technical SpecificationsThe technical specifications of the EG2 include the interface specifications, board dimensions,weight, and power consumption.

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Table 2-36 list the specifications of the interfaces on the EG2.

Table 2-36 Technical specifications of the GE optical interface

Item Specification

Opticalinterface type

Two-fiber bidirectional interface Single-fiberbidirectionalinterface

1000BASE-SX(0.5 km)

1000BASE-LX(10 km)

1000BASE-VX(40 km)

1000BASE-ZX(80 km)

1000BASE-CWDM(80 km)

1000BASE-BX(10 km)

Fiber type Multi-mode Single-mode Single-mode Single-mode Single-mode Single-mode

Workingwavelengthrange (nm)

770 to 860 1270 to 1360 1260 to 1360 1500 to 1580 For details, seewavelengthallocation of1000BASE-CWDMopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of1000BASE-BX opticalinterfaces andrelated opticalmodule code.

Meanlaunchedoptical power(dBm)

-9.5 to 0 -11 to -3 -5 to 0 -2 to 5 0 to 5 -9 to -3

Receiversensitivity(dBm)

-17 -19 -22 -22 -28 -19.5

Minimumoverload(dBm)

0 -3 -3 -3 -9 -3

Minimumextinctionratio (dB)

9 9 9 9 8.2 6

Opticalmodule code

34060286 3406047334060290

34060298 3406036034060324

For details, seewavelengthallocation of1000BASE-CWDMopticalinterfaces andrelated opticalmodule code.

For details, seewavelengthallocation of1000BASE-BX opticalinterfaces andrelated opticalmodule code.

NOTEFor details of the optical module, see 4.2 Optical Module Labels.

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Table 2-37 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code

SN Optical modulecode

Wavelength (nm) SN Opticalmodule code

Wavelength (nm)

1 34060483 1464.5 to 1477.5 5 34060478 1544.5 to 1557.5

2 34060481 1484.5 to 1497.5 6 34060476 1564.5 to 1577.5

3 34060479 1504.5 to 1517.5 7 34060477 1584.5 to 1597.5

4 34060482 1524.5 to 1537.5 8 34060480 1604.5 to 1617.5

Table 2-38 Wavelength allocation of 1000BASE-BX optical interfaces and related optical module code

Item Local Remote

Optical module code 34060470 34060475

Transmitter wavelength (nm) 1260 to 1360 1480 to 1500

Receiver wavelength (nm) 1480 to 1500 1260 to 1360

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.52

Power consumption (W): 5.9

2.7 ML1/ML1AThis section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regardto the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

NOTE

The ML1 and ML1A have the same functions and features except for the matched impedance (ML1: 75ohms E1; ML1A: 120 ohms E1).

2.7.1 Version DescriptionThe functional version of the ML1/ML1A is TND1.

2.7.2 Functions and FeaturesThe ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1/ML1A canaccess a maximum of 16 x E1 signals, supports flexible configuration of different services oneach port, and is hot swappable.

2.7.3 Working Principle and Signal FlowThe ML1/ML1A mainly consists of the control module, line-side processing module, system-side processing module, backplane interface module, clock module, and power supply module.

2.7.4 Front PanelOn the front panel of the ML1/ML1A, there are indicators and interfaces.

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2.7.5 Valid SlotsThe ML1/ML1A can be housed in any of slots 3 - 4.

2.7.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the ML1/ML1A.

2.7.7 Technical SpecificationsThe technical specifications of the TND1ML1/TND1ML1A include the interface specifications,dimensions, weight, and power consumption.

2.7.1 Version DescriptionThe functional version of the ML1/ML1A is TND1.

2.7.2 Functions and FeaturesThe ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1/ML1A canaccess a maximum of 16 x E1 signals, supports flexible configuration of different services oneach port, and is hot swappable.

Table 2-39 lists functions and features of the ML1/ML1A .

Table 2-39 Functions and features of the ML1/ML1A

Function and Feature Remarks

Basic functions Accesses and processes 16 x E1 signals and supports the ATME1, IMA, CES, and ML-PPP protocols.

Supports the in-band DCN. By default, the DCN function isenabled at the first and the sixteenth E1 ports. In addition, thisfunction can be disabled or enabled manually.

Fractional E1 Supports the CES services and IMA services at 64 kbit/s level.

PRBS Supports the PRBS function in framed or unframed mode ofan E1 port in the receive/transmit direction.

ATM/IMA Number of supported IMAgroups/supported ATM E1 services

8

Maximum number of E1links or 64 kbit/s level serialports in each IMA group

16

Dynamically enables or disables the IMA group, restarts theIMA group protocol, and dynamically adds or deletes theIMA group members.

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Function and Feature Remarks

Supported traffic types CBRUBRUBR+rt-VBRnrt-VBR

Number of supported ATMconnections(VPC and VCC included)

256 remote connections128 local connections

Number of supported ATMservices

64

Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N≤32) or 1-to-1 format.

Encapsulates the ATM cells to the PW in the concatenationand non-concatenation modes. The number of PWconnections that support the cell concatenation is 64, and themaximum number of concatenated cells is 31.

ATM OAM on the UNI sideand NNI side

Supports the CC test.

Supports the LB test.

CES Number of supported CESservices

16

Supported emulation mode CESoPSNSAToP

Supports the timeslot compression function. Provides the idle64 kbit/s timeslot suppression function for the CES servicesin the CESoPSN mode to save the transmission bandwidth.

Supported clock modes Retiming modeSelf-adaptation mode

The jitter compensation buffer time of the CES service can beset. The jitter buffer time ranges from 0.375 ms to 16 ms, andthe step value is 0.125 ms.

The packet loading time of the CES service can be set. Theencapsulation buffer time ranges from 0.125 ms to 3 ms, andthe step value is 0.125 ms.

ML-PPP Number of supported ML-PPP groups

7

Maximum number of linkssupported by each ML-PPPgroup

16

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Function and Feature Remarks

Functions as the NNI interface.

2.7.3 Working Principle and Signal FlowThe ML1/ML1A mainly consists of the control module, line-side processing module, system-side processing module, backplane interface module, clock module, and power supply module.

Figure 2-12shows the block diagram for the working principle of the ML1/ML1A.

Figure 2-12 Block diagram for the working principle of the ML1/ML1A

Backplane

Backplane interface module

System-side processing module

Service bus

Serial management bus

-48 V/-60 V

-48 V/-60 V

1.2 V

1.26 V2.5 VTo each module

16 x E1 signals Line-side processing

module

3.3 V

Clock signals

Power supply module

Clock module

Control module

Clock signals

Management bus

3.3 V

CXP

CXP

CXPTo each module

Service bus

Service bus

Management bus

NOTE

As shown in Figure 2-12, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

In Transmit DirectionThe ML1/ML1A first distributes the signals in Ethernet packets from the backplane to differentprotocol processing chips according to the service types. The system-side processing moduledecapsulates the concatenated services and buffers the services in queues. Then, this moduleschedules the egress queues according to the service types, processes and converts the services,and finally sends the services to the line-side processing module. The line-side processingmodule performs coding, dejitter, pulse shaping, and line driving for the services, and finallysends the services to E1 interfaces.

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In Receive DirectionThe line processing module performs impedance match, signal equalization, signal levelconversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, thesignals are sent into the system-side processing module, which frames the signals, encapsulatesthe IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sendsthe signals in Ethernet packets to the backplane interface module.

Line-Side Processing ModuleIn the receive channel, this module performs impedance match, signal equalization, electricallevel conversion, clock data recovery, dejitter, and decoding to signals. In the transmit channel,this module performs encoding, dejitter, pulse shaping, and line driving to signals.

System-Side Processing ModuleThis module frames 16 x E1 signals, runs the CES, IMA, and ML-PPP protocols, and performsPWE3 encapsulation.

Backplane Interface ModuleThe service bus receives or transmits service signals.

Control ModuleThis module controls the reading and writing on the chip, resets the chip, and detects faults inthe chip.When used with the CXPA/CXPB/CXPG/CXPH, this module controls the board.

Clock ModuleThis module provides various clock signals for the board to operate normally, detects clocks,and selects the line recovery clock.

Power Supply ModuleThis module converts the -48 V DC/-60 V DC voltage to DC voltages required by each moduleon the board. In addition, this module supplies 3.3 V power to the ML1/ML1A through thebackplane.

2.7.4 Front PanelOn the front panel of the ML1/ML1A, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-13 shows the appearance of the front panel of the ML1.

Figure 2-13 Front panel of the ML1

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Figure 2-14 shows the appearance of the front panel of the ML1A.

Figure 2-14 Front panel of the ML1A

IndicatorsThe following indicators are present on the front panel of the ML1/ML1A:

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

InterfacesThere is one Anea 96 interface on the front panel of the ML1/ML1A. Table 2-40 lists the typeand usage of the interface. For cables corresponding to the interfaces, see 5.4.2 75-Ohm 16 xE1 Cablesand 5.4.3 120-Ohm 16 x E1 Cables.

Table 2-40 Type and usage of the interface on the front panel of the ML1

Interfaceon theFrontPanel

InterfaceType

Usage

ML1 ML1A

1 - 16 Anea 96 75-ohm interface, which is used totransmit or receive the first tosixteenth channels of E1 services.

120-ohm interface, which isused to transmit or receive thefirst to sixteenth channels ofE1 services.

Table 2-41 lists the pins of the Anea 96 interface.

Table 2-41 Pins of the Anea 96 interface

Front View Connector Pin Usage Connector Pin Usage

1 R x 1 25 T x 1

2 26

3 R x 2 27 T x 2

4 28

5 R x 3 29 T x 3

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Front View Connector Pin Usage Connector Pin Usage

6 30

7 R x 4 31 T x 4

8 32

9 R x 5 33 T x 5

10 34

11 R x 6 35 T x 6

12 36

13 R x 7 37 T x 7

14 38

15 R x 8 39 T x 8

16 40

17 R x 9 41 T x 9

18 42

19 R x 10 43 T x 10

20 44

21 R x 11 45 T x 11

22 46

23 R x 12 47 T x 12

24 48

49 R x 13 73 T x 13

50 74

51 R x 14 75 T x 14

52 76

53 R x 15 77 T x 15

54 78

55 R x 16 79 T x 16

56 80

2.7.5 Valid SlotsThe ML1/ML1A can be housed in any of slots 3 - 4.

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2.7.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the ML1/ML1A.

You can use the U2000 to set the following parameters for the ML1/ML1A:

l PDH interface

l Spare timeslot recovery value

For details on the parameters, see D Board Configuration Parameters.

2.7.7 Technical SpecificationsThe technical specifications of the TND1ML1/TND1ML1A include the interface specifications,dimensions, weight, and power consumption.

Table 2-42 lists the specifications of the interfaces on the ML1/ML1A.

Table 2-42 Specifications of the interfaces on the ML1/ML1A

Item Specification Requirement

Nominal bit rate (kbit/s) 2048

Interface impedance 75 ohms (ML1)120 ohms (ML1A)

Interface code HDB3

Pulse waveform at the outputinterface

Complies with ITU-T G.703

Attenuation tolerance of the inputinterface at the point with afrequency of 1024 kHz (dB)

0 to 6

Anti-interference capability of theinput interface

Complies with ITU-T G.703

Input jitter tolerance Complies with ITU-T G.823

Output jitter Complies with ITU-T G.823

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.56

Power consumption (W): 13.1

2.8 CD1This section describes the CD1, which is a 1 x channelized STM-1 service processing board, interms of the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

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2.8.1 Version DescriptionThe functional version of the CD1 is TND1.

2.8.2 Functions and FeaturesThe CD1 accesses 1 x channelized STM-1 services, and supports the intra-board LMSPprotection.. When used with the CXPA/CXPB/CXPG/CXPH, the CD1 processes the servicesignals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the service type can beflexibly configured.

2.8.3 Working Principle and Signal FlowThe CD1 consists of the SDH processing module, line processing module, data processingmodule, management module, clock module, and power supply module.

2.8.4 Front PanelOn the front panel of the CD1, there are indicators and interfaces.

2.8.5 Valid SlotsThe CD1 can be housed in any of the two slots, that is, slots 3 and 4.

2.8.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the CD1.

2.8.7 Technical SpecificationsThe technical specifications of the CD1 cover the interface specifications, board dimensions,weight, and power consumption.

2.8.1 Version DescriptionThe functional version of the CD1 is TND1.

2.8.2 Functions and FeaturesThe CD1 accesses 1 x channelized STM-1 services, and supports the intra-board LMSPprotection.. When used with the CXPA/CXPB/CXPG/CXPH, the CD1 processes the servicesignals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the service type can beflexibly configured.

Table 2-43 lists functions and features of the CD1.

Table 2-43 Functions and features of the CD1

Function andFeature

Remarks

Basic function Service interfaces on thefront panel

Supports two channelized STM-1optical interfacesa.

Fractional E1 Supports the CES services and IMA services at 64 kibt/s level.

Interface function Automatic shutdownfunction of the laser at theport

Supported

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Function andFeature

Remarks

Type of the loopback at theport

Inloop at an STM-1 portOutloop at an STM-1 portInloop in a VC-12 channelOutloop in a VC-12 channel

Automatic loopback releaseat the port

Supported

All the VC-12 timeslots of each CD1 interface support the DCNfunction. By default, the DCN function of only the first, seventeenth,thirty-third, and forty-ninth VC-12 timeslots of each optical interfacecan be enabled.Manually enables or disables the DCN function of the VC-12timeslots of the optical interface on the CD1.

PRBS Supports the PRBS function in unframed mode of a VC-12 channelin the receive/transmit direction.

ATM/IMA Number of supported ATME1 services

32

Number of supported IMAgroups

32

Maximum number ofVC-12 timeslots or serialports in each IMA group

63

Dynamically enables or disables the IMA group, restarts the IMAgroup protocol, and dynamically adds or deletes the IMA groupmembers.

Supported traffic type CBRUBRUBR+rt-VBRnrt-VBR

Number of supported ATMconnections(VPC and VCC included)

256 remote connections128 local connections

Number of supported ATMservices

64

Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N≤32) or 1-to-1 format.

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Function andFeature

Remarks

Encapsulates the ATM cells to the PW in the concatenation and non-concatenation modes. The number of PW connections that support thecell concatenation is 64, and the maximum number of concatenatedcells is 31.

ATM OAM on the UNIsideand NNI side

Supports the CC test

Supports the LB test.

CES Number of supported CESservicesb

63

Supported emulation mode CESoPSNSAToP

Supports the timeslot compression function. Provides the idle 64 kbit/s timeslot suppression function for the CES services in the CESoPSNmode to save the transmission bandwidth.

Supported clock mode Retiming modeSelf-adaptation mode

The jitter compensation buffer time of the CES service can be set. Thejitter buffer time ranges from 0.375 ms to 16 ms, and the step valueis 0.125 ms.

The packet loading time of the CES service can be set. Theencapsulation buffer time ranges from 0.125 ms to 3 ms, and the stepvalue is 0.125 ms.

ML-PPP Number of supported ML-PPP groups

7

Maximum number of linkssupported by each ML-PPPgroup

16

Functions as the NNI interface.

LMSP protection Supports the 1+1 LMSP and 1:1 LMSP protection schemes.

Extraction andinsertion of the S1byte

Supported

SSM protocol Supported

NOTEa: The second channelized STM-1 interface on the front panel cannot be used to carry services, and it canbe used for only the intra-board LMSP protection.

b: The CD1 board does not support the intra-board CES local services.

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2.8.3 Working Principle and Signal FlowThe CD1 consists of the SDH processing module, line processing module, data processingmodule, management module, clock module, and power supply module.

Figure 2-15 shows the block diagram for working principle of the CD1.

Figure 2-15 Block diagram for the working principle of the CD1

SDH processing

module

Line processing

module

Data processing

module

Management module

Clock module

Power supply module

Backplane

Service signal

Service signal

Service signal

CXP

CXP

-48V/-60V

PIU

PIU

-48V/-60V

Management bus

Management busManagement busManagement bus

3.3V

1.2V

.

.

.

.

.

.

Channelized STM-1

Stand-by channelized

STM-1

Line clocksLine clocks

System clocksCXP

CXP

NOTE

As shown in Figure 2-15, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

Receive DirectionIn the receive direction, the SDH processing module accesses 1 x channelized STM-1 servicesthrough the interface on the front panel. This module decapsulates the VC-12 timeslots from theSTM-1 signals, recovers the E1 signals, processes the overhead bytes, pointers, and alarmsignals, and sends the processed signals to the line processing module. Then, the line processingmodule rearranges the E1 frames, processes the rearranged signals according to the service type,and sends the signals to the data processing module for PWE3 encapsulation and PW scheduling.Finally, the signals are sent to the CXPA/CXPB/CXPG/CXPH through the interface on thebackplane.

Transmit DirectionIn the transmit direction, the data processing module receives the signals from the CXPA/CXPB/CXPG/CXPH, identifies the signals, performs the PWE3 decapsulation, and then sendsthe signals to the line processing module. The line processing module processes various signals,schedules queues, and sends the processed signals to the SDH processing module. The SDHprocessing module maps the E1 signals to the VC-12 timeslots, multiplexes the VC-12 timeslotsto the STM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, andsends out the STM-1 signals through the interface on the front panel.

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SDH Processing ModuleThis module performs the following functions:

l In the receive direction, this module accesses 1 x channelized STM-1 signals, decapsulatesthe VC-12 timeslots from the STM-1 signals, obtains the E1 signals by demapping theVC-12 timeslots, and processes the overhead bytes, pointers, and alarm signals.

l In the transmit direction, this module receives the E1 signals from the line processingmodule, maps the signals to the VC-12 timeslots, multiplexes the VC-12 timeslots toSTM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and sendsout the 1 x channelized STM-1 signals through the interface on the backplane.

l When the service fails, this module realizes the LMSP protection. Thus, the service isswitched.

l This module extracts and recovers the line clocks.

Line Processing ModuleThis module performs the following functions:

l In the receive direction, this module receives the signals from the SDH processing module,rearranges the frames of the E1 signals, performs processing for various services such assetup and deletion of the IMA link, creation of the ML-PPP group, extraction of protocolpackets in the ML-PPP services, and suppression of timeslots of the CES services. Then,the processed signals are sent to the data processing module.

l In the transmit direction, this module receives the signals from the data processing module,processes various services, and sends the processed signals to the SDH processing module.

Data Processing ModuleThis module performs the following functions:

l In the receive direction, this module obtains the corresponding PW channel information ofeach E1 service, performs the PWE3 encapsulation and PW scheduling, and sends theprocessed signals to the CXPA/CXPB/CXPG/CXPH through the interface on thebackplane.

l In the transmit direction, this module receives the signals from the CXPA/CXPB/CXPG/CXPH, identifies different service types, and performs the PWE3 decapsulation and servicescheduling.

l In the case of the ATM E1 or IMA services, this module performs the VP/VC switchingfor the ATM cells, and processes the concatenated cells during the PWE3 encapsulation ordecapsulation.

Management ModuleWhen used with the CXPA/CXPB/CXPG/CXPH, this module manages and controls eachmodule on the CD1.

Clock ModuleThis module performs the following functions:

l Processes the line clocks.

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l Accesses and processes the system clock from the CXPA/CXPB/CXPG/CXPH, andprovides the working clock to each module on the CD1.

l Supports the SSM protocol.

Power Supply ModuleThis module performs the following functions:

l Accesses two -48 V/-60 V DC power supplies.

l Supplies the working power for each module on the CD1.

2.8.4 Front PanelOn the front panel of the CD1, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-16 shows the appearance of the front panel of the CD1.

Figure 2-16 Appearance of the front panel of the CD1

IndicatorsThe following indicators are present on the front panel of the CD1:

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LOS1 and LOS2 indicators, red, green, or orange, which indicate the port status

For details on indications of indicators, see B Indicators.

InterfacesTable 2-44 lists the amount, types, and usage of the interfaces on the CD1.

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Table 2-44 Interfaces on the CD1

Interface onthe FrontPanel

InterfaceType

Usage CorrespondingFiber

IN1 to IN2 LC When a two-fiber bidirectional opticalmodule is used, this interface is used asan input interface for the STM-1 opticalsignal.When a single-fiber bidirectional opticalmodule is used, this interface is not used.

For details, see5.1.1 Fiber Types.

OUT1 toOUT2

LC When a two-fiber bidirectional opticalmodule is used, this interface is used asan output interface for the STM-1 opticalsignal.When a single-fiber bidirectional opticalmodule is used, this interface is used asan input/output interface for the STM-1optical signal.

NOTEThe SFP interface should be used with an optical module.

l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left andright sides of the optical module. Each interface uses one fiber, which is used to transmit or receiveservice signals.

l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the leftside of the optical module. This optical interface uses only one fiber, which is used to transmit andreceive service signals at the same time.

2.8.5 Valid SlotsThe CD1 can be housed in any of the two slots, that is, slots 3 and 4.

2.8.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the CD1.

You can use the U2000 to configure the following parameters for the CD1.

l J0

l J1

l J2

l C2

l V5

l SDH interface

l Automatic laser shutdown

l Spare timeslot recovery value

For details on the parameters, see D Board Configuration Parameters.

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2.8.7 Technical SpecificationsThe technical specifications of the CD1 cover the interface specifications, board dimensions,weight, and power consumption.

Table 2-45 lists the specifications of interfaces on the CD1.

Table 2-45 Technical specifications of the STM-1 optical interface

Item Specification

Nominal bit rate(kbit/s)

155520

Optical interfacetype

Two-fiber bidirectional interface Single-fiber bidirectional interface

S-1.1(15 km)

L-1.1(40 km)

L-1.2(80 km)

S-1.1(15 km)

L-1.1(40 km)

Fiber type Single-mode Single-mode Single-mode Single-mode Single-mode

Workingwavelengthrange (nm)

1261 to 1360 1263 to 1360 1480 to 1580 For details, seewavelengthallocation ofsingle-fiberbidirectionaloptical interfaceand relatedoptical modulecode.

For details, seewavelengthallocation ofsingle-fiberbidirectionaloptical interfaceand relatedoptical modulecode.

Mean launchedoptical power(dBm)

-15 to -8 -5 to 0 -5 to 0 -15 to -8 -5 to 0

Receiversensitivity(dBm)

-28 -34 -34 -28.2 -30

Minimumoverload (dBm)

-8 -10 -10 -8 -10

Minimumextinction ratio(dB)

8.2 10 10 6.6 10

Optical modulecode

3406027634060307

3406028134060308

3406028234060309

For details, seewavelengthallocation ofsingle-fiberbidirectionaloptical interfaceand relatedoptical modulecode.

For details, seewavelengthallocation ofsingle-fiberbidirectionaloptical interfaceand relatedoptical modulecode.

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Item Specification

NOTEFor details of the optical module, see 4.2 Optical Module Labels.

Table 2-46 Wavelength allocation of single-fiber bidirectional interface optical interface and related optical modulecode

Item Local Remote

Optical module code(15 km)

34060363 34060364

Optical module code(40 km)

34060328 34060329

Transmitter wavelength (nm) 1260 to 1360 1480 to 1580

Receiver wavelength (nm) 1480 to 1580 1260 to 1360

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Board weight (kg): 0.52

Power consumption (W): 16.4

2.9 ADS2A/ADS2BThis section describes the ADS2A/ADS2B, a 2-channel ADSL service interface board, in termsof the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.

NOTE

The ADS2A and ADS2B have the same functions, except for supporting different modes. The ADS2Asupports the Annex A mode and the ADS2B supports the Annex B mode. The following refers the ADS2Aand ADS2B uniformly as ADS2.

2.9.1 Version DescriptionThe functional version of the ADS2 is TND1.

2.9.2 Functions and FeaturesUsed with the CXPA/CXPB/CXPG/CXPH, the ADS2 can process the asymmetrical digitalsubscriber line (ADSL) services.

2.9.3 Working Principle and Signal FlowThe ADS2 mainly consists of the service access module, interface converting module, clockmodule, and power supply module.

2.9.4 Front PanelOn the front panel of the ADS2, there are indicators and interfaces.

2.9.5 Valid Slots

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The ADS2 can be housed in any of slots 3 - 4.

2.9.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the ADS2.

2.9.7 Technical SpecificationsThe technical specifications of the ADS2A/ADS2B cover the performance specifications, boarddimensions, weight, and power consumption.

2.9.1 Version DescriptionThe functional version of the ADS2 is TND1.

2.9.2 Functions and FeaturesUsed with the CXPA/CXPB/CXPG/CXPH, the ADS2 can process the asymmetrical digitalsubscriber line (ADSL) services.

Table 2-47 lists the functions and features of the ADS2.

Table 2-47 Functions and Features of the ADS2

Function and Feature Description

Basic Function Provides two ADSL interfaces and accesses 2 x ADSL signals.

Supports PVC pair setting for ports (eight PVC for each port).

Detects the temperature and voltage of the board.

Supports the hot swappable function.

Application scenario The ADS2 is applied in the offload scenario. On the access side,the OptiX PTN 910 performs ATM PWE3 emulation for theHSDPA service flow. Then, the emulated service isencapsulated in the tunnel required by the WMS network.Finally, the ADS2 performs ATM adaptation for the service.When entering the ADSL network, the encapsulated service istransported to the opposite equipment, then decapsulated, andfinally transported to the RNC node.

Compliant norms ITU-T G.994

ITU-T G.992.1 (G.dmt), Annex A, B

ITU-T G.992.2 (G.lite), Annex A, B

ANSI T1.413

ITU-T G.992.3 (ADSL2), Annex A, B

ITU-T G.992.5 (ADSL2+), Annex A, B

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2.9.3 Working Principle and Signal FlowThe ADS2 mainly consists of the service access module, interface converting module, clockmodule, and power supply module.

Figure 2-17 shows the block diagram for the working principle of the ADS2.

Figure 2-17 Block diagram for the working principle of the ADS2Backplane

Clock module

Interface converting and control module

Logic control module

Parallel/serial converting

module

Service bus

Service bus

Serial management bus

Status signal

Service access module

Two-channel ADSL signals

Line driver

ADSL transceiver

Clock signalsTo each module

Management bus

Power supply module

1.2 V2.5 V3.3 V5 V

-48V/-60V

-48V/-60V

PIU

PIU

Clock signalsCXP

CXP

CXP

CXP

NOTE

As shown in Figure 2-17, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

In the Transmit Direction

The CXPA/CXPB/CXPG/CXPH sends the service signals to the ADS2. The parallel/serialconverting module converts and sends the signals to the logic control unit, which processes thesignals. The ADSL transceiver unit of the service access module adapts the service signals intothe ADSL service. Then, the line driver amplifies the ADSL service and outputs it through theinterface.

In the Receive Direction

The ADSL interface accesses the ADSL signals. Then, the ADSL transceiver unit of the serviceaccess module stripes the ATM AAL5 adaptation layer from the ADSL signals and outputsservice signals. The logic control module processes the signals, and then sends the signals to thebackplane through the parallel/serial converting module.

Service Access Modulel The ADSL transceiver unit strips the ATM AAL5 adaptation layer from the ADSL service

accessed from the interface and then outputs the service.

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l The ADSL transceiver unit performs ATM AAL5 adaptation and encapsulation for theservice sent by the interface converting and control module and finally outputs the ADSLservice.

l The line driver unit amplifies the signals to be transmitted.

Interface Converting and Control ModuleThis module performs parallel/serial conversion for transporting the service between the systemcontrol board and the local board.

The system control board controls and manages the board through the serial management bus.In addition, the logic control unit detects alarms and reports them to the CXPA/CXPB/CXPG/CXPH through the serial management bus.

Clock ModuleThe clock module provides working clock signals to each module.

Power Supply ModuleThis module provides DC voltages required by each module on the board.

2.9.4 Front PanelOn the front panel of the ADS2, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-18 and Figure 2-19 show the appearance of the front panel of the ADS2.

Figure 2-18 Appearance of the front panel of the ADS2A

Figure 2-19 Appearance of the front panel of the ADS2B

Indicatorsl STAT indicator, red, green, or orange, which indicates the working status

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l STAT indicator, red, green, or orange, which indicates the working status

l LINK1 and LINK2 indicators, green, which indicate the port connection status.

For details on indications of indicators, see B Indicators.

Interfaces

Table 2-48 lists the types of the interfaces on the ADS2 and their respective usage.

Table 2-48 Types and usage of the interfaces on the ADS2

Interface on theFront Panel

Interface Type Usage CorrespondingCable

ADSL1, ADSL2 RJ-11 Accesses two channels ofADSL services.

For details, see 5.4.4xDSL Cables.

Table 2-49 lists the pins of the ADSL1 and ADSL2 interfaces.

Table 2-49 Pins of the ADSL1 and ADSL2 interface on the ADS2

Front View Pin No. Usage

6 5 4 3 2 1

1 Unspecified

2 Unspecified

3 RING

4 TIP

5 Unspecified

6 Unspecified

2.9.5 Valid SlotsThe ADS2 can be housed in any of slots 3 - 4.

2.9.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the ADS2.

You can use the U2000 to configure the following parameters for the ADS2.

ADSL Interface

For details on the parameters, see D Board Configuration Parameters.

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2.9.7 Technical SpecificationsThe technical specifications of the ADS2A/ADS2B cover the performance specifications, boarddimensions, weight, and power consumption.

Table 2-50 and Table 2-51 list the performance specifications of the ADS2A/ADS2B.

Table 2-50 Performance specifications of the ADS2A

Interface Max. Upstream Rate Max. DownstreamRate

TransmissionDistance

ADSL standard 0.896 Mbit/s 8 Mbit/s 5.5 km

ADSL2 1.2 Mbit/s 15 Mbit/s 5.5 km

ADSL2+ 1.2 Mbit/s 24 Mbit/s 5.5 km

Table 2-51 Performance specifications of the ADS2B

Interface Max. Upstream Rate Max. DownstreamRate

TransmissionDistance

ADSL standard 0.896 Mbit/s 8 Mbit/s 4 km

ADSL2 1.2 Mbit/s 15 Mbit/s 4 km

ADSL2+ 1.2 Mbit/s 24 Mbit/s 4 km

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.54

ADS2A Power consumption (W): 10.5

ADS2B Power consumption (W): 10.4

2.10 SHD4This section describes the SHD4, a 4-channel G.SHDSL service interface board, in terms of theversion, functions, features, working principle, front panel, valid slots, and technicalspecifications.

2.10.1 Version DescriptionThe functional version of the SHD4 is TND1.

2.10.2 Functions and FeaturesUsed with the CXPA/CXPB/CXPG/CXPH, the SHD4 can process the G.991.2 single-pair high-speed digital subscriber line (G.SHDSL) service.

2.10.3 Working Principle and Signal Flow

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The SHD4 mainly consists of the service access module, interface converting module, clockmodule, and power supply module.

2.10.4 Front PanelOn the front panel of the SHD4, there are indicators, and interfaces.

2.10.5 Valid SlotsThe SHD4 can be housed in any of slots 3 - 4.

2.10.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the SDH4.

2.10.7 Technical SpecificationsThe technical specifications of the SHD4 cover the performance specifications, boarddimensions, weight, and power consumption.

2.10.1 Version DescriptionThe functional version of the SHD4 is TND1.

2.10.2 Functions and FeaturesUsed with the CXPA/CXPB/CXPG/CXPH, the SHD4 can process the G.991.2 single-pair high-speed digital subscriber line (G.SHDSL) service.

Table 2-52 lists the functions and features of the SHD4.

Table 2-52 Functions and Features of the SHD4

Function and Feature Description

Basic function Provides four G.SHDSL interfaces and accesses 4 x G.SHDSLsignals.

Supports the ATM mode and the EFM mode.

The outgoing lines of the four G.SHDSL interfaces support theM-Pair binding of lines. In addition, M can be 1, 2, 3, or 4.

Supports the G.SHDSL load sharing protection.

Supports the hot swappable function.

Clock Supplies the G.SHDSL line clock for CXPA/CXPB/CXPG/CXPH as system clock.

Application scenario The SHD4 is applied in the offload scenario. On the access side,the OptiX PTN 910 performs ATM PWE3 emulation for theHSDPA service flow. Then, the emulated service isencapsulated in the tunnel required by the WMS network.Finally, the SHD4 performs ATM adaptation for the service.When entering the xDSL network, the encapsulated service istransported to the opposite equipment, then decapsulated, andfinally transported to the RNC node.

Compliant norms ETSI SDSL (ETSI TS 101 524 V 1.2.1)

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Function and Feature Description

ETSI SDSL.bis (ETSI TS 101 524 V 1.2.2)

ITU G.shdsl (ITU-T G.991.2)

ITU G.shdls.bis (ITU-T G.991.2 (2004))

ITU G.hs (ITU-T G.994.1)

IEEE 802.3ah clause 61

2.10.3 Working Principle and Signal FlowThe SHD4 mainly consists of the service access module, interface converting module, clockmodule, and power supply module.

Figure 2-20 shows the block diagram for the working principle of the SHD4.

Figure 2-20 Block diagram for the working principle of the SHD4Backplane

Interface converting and control module

Logic control

unit

Service bus

Management bus

Service bus

Serial management bus

Status signal

Parallel/serial converting

module

Power supply module

1.2 V1.5 V3.3 V

Service access module

Service encapsulation and bundling

module

Clock signals

4 x G.SHDSL signals

Signal voltage

and performs protection

module

To each module

Clock moduleEach module of the board

-48V/-60V

-48V/-60V

PIU

PIU

Clock signalsCXP

CXP

CXP

CXP

NOTE

As shown in Figure 2-20, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

In the Transmit Direction

The CXPA/CXPB/CXPG/CXPH sends the service signals to the parallel/serial convertingmodule and then to the logic control unit, which processes the service signals. Finally, the serviceencapsulation and bundling module decapsulates the service signals and outputs the G.SHDSLservice.

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In the Receive DirectionThe service board accesses the G.SHDSL signals and the service access module transforms thesignal voltage and performs protection for the signals. Then, the service encapsulation andbundling module encapsulates and bundles the signals, adjusts the signal rate, frames the signals,and then sends the signals to the logic control module, which processes the service signals.Finally, the parallel/serial converting module converts and sends the service signals to theCXPA/CXPB/CXPG/CXPH.

Service Access Modulel The service access module transforms the signal voltage and performs protection for the

access signals. Then, the service encapsulation and bundling module bundles four channelsof G.SHDSL signals, strips the ATM AAL5 adaptation layer, and finally outputs the servicesignals.

l The interface converting and control module sends the service to the service encapsulationand bundling module, which then performs ATM AAL5 adaptation and encapsulation, andfinally outputs the G.SHDSL service.

Interface Converting and Control ModuleThis module performs parallel/serial conversion for transporting the service between the systemcontrol board and the local board.

The system control board controls and manages the board through the serial management bus.In addition, the logic control unit detects alarms and reports them to the CXPA/CXPB/CXPG/CXPH through the serial management bus.

Clock ModuleThe clock module provides working clock for each module on the SHD4.

Power Supply ModuleThis module provides DC voltages required by each module on the board.

2.10.4 Front PanelOn the front panel of the SHD4, there are indicators, and interfaces.

Appearance of the Front PanelFigure 2-21 shows the appearance of the front panel of the SHD4.

Figure 2-21 Appearance of the front panel of the SHD4

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Indicatorsl STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LINK1/LINK2/LINK3/LINK4 indicators, green, which indicate the port connection status.

For details on indications of indicators, see B Indicators.

InterfacesTable 2-53 lists the types of the interfaces on the SHD4 and their respective usage.

Table 2-53 Types and usage of the interfaces on the SHD4

Interfaceon theFront Panel

InterfaceType

Usage CorrespondingCable

SHDSL1 -SHDSL4

RJ-11 Accesses the first 4 x G.SHDSLservices.

For details, see 5.4.4xDSL Cables.

Table 2-54 lists the pins of theSHDSL1 - SHDSL4 interfaces.

Table 2-54 Pins of the SHDSL1 - SHDSL4 interfaces on the SHD4

Front View Pin No. Usage

6 5 4 3 2 1

1 Unspecified

2 Unspecified

3 TIP

4 RING

5 Unspecified

6 Unspecified

2.10.5 Valid SlotsThe SHD4 can be housed in any of slots 3 - 4.

2.10.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the SDH4.

You can use the U2000 to configure the following parameters for the SHD4.

G.SHDSL Interface

For details on the parameters, see D Board Configuration Parameters.

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2.10.7 Technical SpecificationsThe technical specifications of the SHD4 cover the performance specifications, boarddimensions, weight, and power consumption.

Table 2-55 lists the performance specifications of the SHD4.

Table 2-55 Performance specifications of the SHD4

Interface Max.UpstreamRate

Max.DownstreamRate

Max. Four-LineBundling Rate

Max.TransmissionDistance

G.SHDSL 5.7 Mbit/s 5.7 Mbit/s 23 Mbit/s 5.25 km

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)

Weight (kg): 0.60

Power consumption (W): 7.4

2.11 SHD4IThis section describes the SHD4I, a 4-channel SHDSL service interface board that supports theIMA mode, in terms of the version, functions, features, working principle, front panel, validslots, and technical specifications.

2.11.1 Version DescriptionThe functional version of the SHD4I is TND1.

2.11.2 Functions and FeaturesThe SHD4I can access four channels of G.SHDSL signals encapsulated in the IMA format whenit is used with the CXPA/CXPB/CXPG/CXPH.

2.11.3 Working Principle and Signal FlowThe SHD4I mainly consists of the service access module, interface converting and controlmodule, IMA processing module, clock module, and power supply module.

2.11.4 Front PanelOn the front panel of the SHD4I, there are indicators and interfaces.

2.11.5 Valid SlotsThe SHD4I can be housed in slot 3 or slot 4.

2.11.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the SHD4I.

2.11.7 Technical SpecificationsThe technical specifications of the SHD4I cover the interface specifications, board dimensions,weight, and power consumption.

2.11.1 Version DescriptionThe functional version of the SHD4I is TND1.

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2.11.2 Functions and FeaturesThe SHD4I can access four channels of G.SHDSL signals encapsulated in the IMA format whenit is used with the CXPA/CXPB/CXPG/CXPH.

Table 2-56 lists the functions and features of the SHD4I.

Table 2-56 Functions and Features of the SHD4I

Function andFeature

Description

Basic Function Provides four G.SHDSL interfaces to access four channels ofG.SHDSL signals.

Accesses the service signals encapsulated in the IMA format andsupports one IMA group.

Provides the G.SHDSL load sharing protection in the IMAencapsulation mode.

Supports the network timing recovery (NTR) function.

Supports the hot-swap function.

Compliant norms ETSI SDSL (ETSI TS 101 524 V 1.2.1)

ETSI SDSL.bis (ETSI TS 101 524 V 1.2.2)

ITU G.shdsl (ITU-T G.991.2)

ITU G.shdls.bis (ITU-T G.991.2 (2004))

ITU G.hs (ITU-T G.994.1)

2.11.3 Working Principle and Signal FlowThe SHD4I mainly consists of the service access module, interface converting and controlmodule, IMA processing module, clock module, and power supply module.

Figure 2-22 shows the block diagram for the working principle of the SHD4I.

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Figure 2-22 Block diagram for the working principle of the SHD4I

Service access module

Interface converting and control module

IMA processing module

Power supply module

Clock module

4 x G.SHDSL signals IMA service signals

IMA service signals

ATM cells

4 x NTR clock signalsClock signals

To each module on the SHD4I Working clock signals

Management and control bus

Management and control bus

Service signals

Serial management bus

Status signal bus

-48 V/-60 V

-48 V/-60 V3.3 V1.8 V1.5 V1.2 V

CXP

CXP

CXP

CXP

PIU

PIU

To each module on the SHD4I

Backplane

NOTE

As shown in Figure 2-22, the CXP on the backplane indicates the system control, cross-connect andprotocol processing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

In the Receive Direction

The RJ-11 interfaces access the G.SHDSL signals to the service access module. Then, the serviceaccess module works with the IMA processing module to multiplexes the service signals, andsends the ATM cells to the interface converting and control module. The interface convertingand control module decapsulates the ATM frames, converts the parallel signals to serial signals,converges the serial signals to one channel service signal, and finally sends the service signal tothe backplane.

In the Transmit Direction

The interface converting and control module receives the service signal from the backplane,converts the serial signal to parallel signal, encapsulates the signals in the ATM frame format,and then sends the ATM frames to the service access module. The service access moduleprocesses the ATM cells and work with the IMA processing module to inversely multiplexesthe ATM signals as IMA signals. Finally, the service access module sends the packets to theG.SHDSL interfaces.

Service Access Module

This module accesses the service packets in different modes according to the encapsulation modeof the G.SHDSL interfaces. In addition, this module has the thunder protection function.

l In the receive direction, this module converts the serial packets to parallel packets, andsends the parallel packets to the interface converting and control module.

l In the transmit direction, this module receives the IMA service signals from the interfaceconverting and control module, converts the serial IMA service signals to parallel IMA

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service signals, and finally sends the parallel IMA service signals to the G.SHDSLinterfaces.

l In addition, this module extracts the NTR clock signals from the G.SHDSL service signalsreceived and sends the clock signals to the clock module.

Interface Converting and Control ModuleThis module converges the G.SHDSL service signals to one channel service signal and workswith the CXPA/CXPB/CXPG/CXPH to manage and control the SHD4I.

l In the receive direction, this module receives the IMA service signals from the serviceaccess module, converts the IMA service signals, and sends the service signals to the IMAprocessing module, which multiplexes the service signals . Then, this module receives theATM cells from the IMA processing module, decapsulates the ATM frames, converts theparallel signals to serial signals, converges the signals to one channel service signal, andfinally sends the service signal to the backplane.

l In the transmit direction, this module receives the service signal from the backplane,converts the serial signal to parallel signal, encapsulates the service signal into ATMframes, and sends the ATM cells to the IMA processing module, which inverselymultiplexes the ATM signals. Then, this module receives IMA signals from the IMAprocessing module and finally sends the IMA signals to the service access module.

l In addition, this module works with the CXPA/CXPB/CXPG/CXPH to manage and controleach module on the SHD4I.

IMA Processing ModuleThis module performs the following functions:

l In the receive direction, this module receives the IMA service signals from the interfaceconverting and control module, multiplexes the service signals as ATM signals, and finallysends the ATM signals to the interface converting and control module, which convergesthe signals.

l In the transmit direction, this module receives the service signals from the backplane afterthe interface converting and control module processes the service signals. Then, this moduleinversely multiplexes the ATM signals and sends the IMA service signals to the interfaceconverting and control module.

Clock ModuleThis module performs the following functions:

l Selects a clock source from the four channels of NTR clock signals and uploads the clocksignals to the CXPA/CXPB/CXPG/CXPH.

l Provides working clock signals for each module on the SHD4I board.

Power Supply ModuleThis module provides the following DC voltages for the modules on the SHD4I board:

l 3.3 V

l 1.8 V

l 1.5 V

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l 1.2 V

2.11.4 Front PanelOn the front panel of the SHD4I, there are indicators and interfaces.

Appearance of the Front PanelFigure 2-23 shows the appearance of the front panel of the SHD4I.

Figure 2-23 Appearance of the front panel of the SHD4I

IndicatorThe following indicators are present on the front panel of the SHD4I:

l STAT indicator, red, green, or orange, which indicates the working status

l SRV indicator, red, green, or orange, which indicates the service status

l LINK1, LINK2, LINK3 and LINK4 indicators, green, which indicate the port connectionstatus.

For details on indications of indicators, see B Indicators.

InterfaceTable 2-57 lists the types of the interfaces on the SHD4I and their respective usage.

Table 2-57 Types and usage of the interfaces on the SHD4I

Interface on theFront Panel

InterfaceType

Usage CorrespondingCable

SHDSL1-SHDSL4

RJ-11 Input and output G.SHDSLsignals.

For details, see 5.4.4xDSL Cables.

Table 2-58 lists the pins of the SHDSL1-SHDSL4 interfaces.

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Table 2-58 Pins of the SHDSL1 - SHDSL4 interfaces on the SHD4I

Front View Pin No. Usage

6 5 4 3 2 1

1 Unspecified

2 Unspecified

3 TIP

4 RING

5 Unspecified

6 Unspecified

2.11.5 Valid SlotsThe SHD4I can be housed in slot 3 or slot 4.

2.11.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the SHD4I.

You can use the U2000 to configure the following parameters for the SHD4I.

G.SHDSL Interface

For details on the parameters, see D Board Configuration Parameters.

2.11.7 Technical SpecificationsThe technical specifications of the SHD4I cover the interface specifications, board dimensions,weight, and power consumption.

Table 2-59 lists the specifications of the interfaces of the SHD4I.

Table 2-59 Specifications of the interfaces of the SHD4I

Interface Max.Upstream Rate(Mbit/s)

Max.DownstreamRate (Mbit/s)

Max. Rate ofFour BundledInterfaces(Mbit/s)

Max.TransmissionDistance (km)

G.SHDSL 2.3 2.3 9.2 5.25

Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.82 (W)

Board weight (kg): 0.60

Power consumption (W): 7.5

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2.12 PIUThis section describes the PIU, a power input unit, in terms of the version, functions, features,working principle, front panel, valid slots, and technical specifications.

2.12.1 Version DescriptionThe functional version of the PIU is TNC1.

2.12.2 Functions and FeaturesThe PIU, a power access board, supports the functions and features such as power access, powerprotection, lightning protection detection, and information reporting.

2.12.3 Working Principle and Signal FlowThe PIU mainly consists of the lighting protection and failure detection module, communicationunit module, and board in-position module.

2.12.4 Front PanelOn the front panel of the PIU, there are indicators and power supply interfaces.

2.12.5 Valid SlotsThe PIU can be housed in slot 5 in the chassis.

2.12.6 Technical SpecificationsThe technical specifications of the PIU cover the board dimensions, weight, power consumption,and input voltage.

2.12.1 Version DescriptionThe functional version of the PIU is TNC1.

2.12.2 Functions and FeaturesThe PIU, a power access board, supports the functions and features such as power access, powerprotection, lightning protection detection, and information reporting.

Table 2-60 lists functions and features of the PIU.

Table 2-60 Functions and features of the PIU

Function and Feature Description

Power access One PIU accesses two -48 V DC (or -60 V DC) power supplies forthe equipment.

Power protection The PIU protects the power supply against overcurrent and shortcircuit. In this way, the overcurrent is prevented from shockingboards and components on them.

Lightning protection The PIU protects the equipment against lightning and reports analarm if the protection fails.

Power backup The two DC power supplies back up each other.

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2.12.3 Working Principle and Signal FlowThe PIU mainly consists of the lighting protection and failure detection module, communicationunit module, and board in-position module.

Figure 2-24 shows the block diagram for the working principle of the PIU.

Figure 2-24 Block diagram for the working principle of the PIU

Lightning protection and failure detection module

-48 V/-60 V

Communication

Board in-position module

Backplane

Inter-board communication bus CXP

CXP

-48 V/-60 V

Board in-position signals

Lightning protection failure alarm signals

Each board

Each board

Lightning protection failure alarm signals

Lightning protection and failure detection module

NOTE

In Figure 2-24, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

Lighting Protection and Failure Detection Module

This module protects the equipment against lightning and detects the failure of the anti-lightningcircuit. If the lightning protection fails, the PIU reports the alarm signals to the CXPA/CXPB/CXPG/CXPH.

Communication Unit Module

This module has the function of reporting the board manufacturing information, PCB versioninformation, and alarm signals about the lightning protection failure.

Board In-Position Module

This module reports the board in-position signals to the CXPA/CXPB/CXPG/CXPH.

2.12.4 Front PanelOn the front panel of the PIU, there are indicators and power supply interfaces.

Appearance of the Front Panel

Figure 2-25 shows the appearance of the front panel of the PIU.

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Figure 2-25 Appearance of the front panel of the PIU

Indicators

The following indicator is present on the front panel of the PIU.

PWRA/PWRB, green, which indicates the power supply status. When PWRA/PWRB is on andgreen, it indicates that power is accessed.

For details on indications of indicators, see B Indicators.

Interfaces

The PIU accesses two power supplies. Table 2-61 lists the types of the interfaces on the PIUand their respective usage. For cable corresponding to the interfaces, see 5.2 -48 V Power SupplyCable.

Table 2-61 Types and usage of the interfaces on the PIU

Interface on the Front Panel Usage

NEG1(-) -48 V power input interface

RTN1(+) BGND power input interface

NEG2(-) -48 V power input interface

RTN2(+) BGND power input interface

Label

Operation warning label: indicates the following precaution, which should be taken for removalor insertion of the PIU board.

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CAUTIONMultiple power supplies are accessed for the equipment. When powering off the equipment,make sure that these power supplies are disabled.Do not remove or insert the board with power on.

2.12.5 Valid SlotsThe PIU can be housed in slot 5 in the chassis.

2.12.6 Technical SpecificationsThe technical specifications of the PIU cover the board dimensions, weight, power consumption,and input voltage.

Table 2-62 lists the technical specifications of the PIU.

Table 2-62 Technical specifications of the PIU

Item Technical Specification

Board dimensions (mm) 41.4 (H) x 224.8 (D) x 21.0 (W)

Weight (kg) 0.12

Power consumption (W) 0.5

Input voltage (V) -38.4 to -72.0

2.13 FANThis section describes the FAN, a fan board, in terms of the version, functions, features, workingprinciple, front panel, valid slots, and technical specifications.

2.13.1 Version DescriptionThe functional version of the FAN is TNC1.

2.13.2 Functions and FeaturesThe FAN is used to adjust the fan rotating speed, detect and report status of fans.

2.13.3 Working Principle and Signal FlowThe FAN mainly consists of the start-delay module, communication unit module, intelligent fanspeed adjustment module, and board in-position module.

2.13.4 Front PanelOn the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels.

2.13.5 Valid SlotsThe FAN can be housed in slot 6 in the chassis.

2.13.6 Technical Specifications

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The technical specifications of the FAN cover the board dimensions, weight, powerconsumption, and input voltage.

2.13.1 Version DescriptionThe functional version of the FAN is TNC1.

2.13.2 Functions and FeaturesThe FAN is used to adjust the fan rotating speed, detect and report status of fans.

The functions and features of the FAN are as follows:

l Accesses one 12 V power supply for driving three fans that each consumes 6 W power.

l Provides start-delay for the power supply of the fans and protects fans againstovercurrent.

l Intelligently adjusts the rotating speed of fans to ensure proper heat dissipation of thesystem.

l Reports information about the fan rotating speed, environment temperature, alarms, versionnumber, and board in-position information.

l Provides alarm indicators.

2.13.3 Working Principle and Signal FlowThe FAN mainly consists of the start-delay module, communication unit module, intelligent fanspeed adjustment module, and board in-position module.

Figure 2-26shows the block diagram for the working principle of the FAN.

Figure 2-26 Block diagram for the working principle of the FAN

Fans x 3

12 V power shut signals

12V

Inter-board communication bus

Board in-position module

PWM signals

Communication unit module

Start-delay module CXP

Fan-speed signals

Fan in-position signals

12 V

12 V

12 V

CXP

CXP

CXP

CXPIntelligent fan speed adjustment module

PWM driver module

Fan-speed reporting module

Backplane

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NOTE

In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX PTN 910, the CXP indicates the CXPA/CXPB/CXPG/CXPH.

Start-delay ModuleThis module has the function of provides start-delay to the power supply for fans and protectsfans against overcurrent.

Communication Unit ModuleThis module reports the board manufacturing information, PCB version, and environmenttemperature information. In addition, this module provides 12 V power shut signals to the start-delay module.

Intelligent Fan Speed Adjustment ModuleThis module reports information about the fan rotating speed to the CXPA/CXPB/CXPG/CXPH and adjusts the fan rotating speed according to the three pulse-width modulation (PWM)signals received from the CXPA/CXPB/CXPG/CXPH. The PWM signal of one fan is isolatedfrom that of another.

Board In-Position ModuleThis module reports the board in-position signals to the CXPA/CXPB/CXPG/CXPH.

2.13.4 Front PanelOn the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels.

Appearance of the Front PanelFigure 2-27 shows the appearance of the front panel of the FAN.

Figure 2-27 Appearance of the front panel

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Indicators

The following indicators are present on the front panel of the FAN:

FAN indicator, red or green, which indicates status of fans.

For details on indications of indicators, see B Indicators.

Anti-Static Wrist Strap Jack

The anti-static wrist strap should be connected to this jack for proper grounding of the humanbody.

Handle

The handle is used for pushing the FAN into or pulling the FAN out of the chassis during boardreplacement.

Label

The following labels are present on the front panel of the FAN:

l ESD protection label, which indicates that the equipment is static-sensitive.

l Fan warning label, which says that do not touch the fan leaves before the fan stops rotating.

2.13.5 Valid SlotsThe FAN can be housed in slot 6 in the chassis.

2.13.6 Technical SpecificationsThe technical specifications of the FAN cover the board dimensions, weight, powerconsumption, and input voltage.

Table 2-63 lists the technical specifications of the FAN.

Table 2-63 Technical specifications of the FAN

Item Technical Specification

Board dimensions (mm) 42.0 (H) x 217.6 (D) x 28.5 (W)

Weight (kg) 0.20

Power consumption (W) 2.3 W

Working voltage (V) 12 V DC power

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3 Filler Panel

About This Chapter

A filler panel is used to cover any idle slot in a chassis.

3.1 Functions and FeaturesA filler panel can be used to perform electromagnetic shielding, keep out foreign substances,and ensure proper ventilation.

3.2 Appearance and Valid SlotsThere is no indicator or interface on a filler panel.

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3.1 Functions and FeaturesA filler panel can be used to perform electromagnetic shielding, keep out foreign substances,and ensure proper ventilation.

Main functions of a filler panel are as follows:

l Performs electromagnetic shielding and ensures that the chassis meets the requirement ofelectromagnetic radiation.

l Prevents foreign substances from getting into the chassis.

l Prevents internal voltage from being exposed.

l Ensures proper ventilation of cooling current inside the chassis.

3.2 Appearance and Valid SlotsThere is no indicator or interface on a filler panel.

AppearanceFigure 3-1 shows the appearance of a filler panel.

Figure 3-1 Appearance of a filler panel

Valid SlotsA filler panel can be housed in any of slots 3-4 of a chassis.

3 Filler PanelOptiX PTN 910

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4 Pluggable Optical Modules

About This Chapter

Optical interface boards for the OptiX PTN 910 use the enhanced small form-factor pluggable(eSFP) optical module.

The eSFP optical module, which is a protocol-independent optical transceiver applicable tooptical communication, implements O/E and E/O conversion for signals, and supports query ofinformation such as the transceiver performance and manufacturer.

4.1 Appearance and ApplicationThe eSFP optical module can be inserted in GE, FE, and STM-1 optical interfaces.

4.2 Optical Module LabelsOptical module labels, attached on back of the optical modules, are used to distinguish differenttypes of optical modules.

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4.1 Appearance and ApplicationThe eSFP optical module can be inserted in GE, FE, and STM-1 optical interfaces.

AppearanceFigure 4-1 shows the appearance of the eSFP optical module.

Figure 4-1 Appearance of the eSFP optical module

ApplicationTable 4-1 lists the boards where the eSFP optical module is applicable.

Table 4-1 Boards where the eSFP optical module is applicable

Board Type Board Name

GE optical interface board EG2, CXPG/CXPH

FE optical interface board EF8F

STM-1 optical interface board CD1

4.2 Optical Module LabelsOptical module labels, attached on back of the optical modules, are used to distinguish differenttypes of optical modules.

Figure 4-2 shows the optical module labels.

Figure 4-2 Optical module label

1.25G-80km-1550nm34060360

Optical module code

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As shown in Table 4-2, different types of optical modules have different codes.

Table 4-2 Codes and types of optical modules

OpticalModule Code

OpticalInterfaceType

Optical Module BasicInformation

MappingBoard

34060286 1000BASE-SX(0.5 km)

Optical Transceiver, eSFP, 850 nm,2.125 Gbit/s (Multi rate), LC, Multi-mode, 0.5 km

CXPG/CXPHEG2

34060473 1000BASE-LX(10 km)

Optical transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC, Single-mode, 10 km

34060290 1000BASE-LX(10 km)

Optical Transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC ( - 40 to 85), Single-mode, 10 km

34060298 1000BASE-VX(40 km)

Optical Transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC, Single-mode, 40 km

34060360 1000BASE-ZX(80 km)

Optical Transceiver, eSFP, 1550 nm,1.25 Gbit/s, LC, Single-mode, 80 km

34060324 1000BASE-ZX(80 km)

Optical Transceiver, eSFP, 1550 nm,1.25 Gbit/s, LC (-40 to 85), Single-mode, 80 km

34060483 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1471 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

CXPG/CXPHEG2

34060481 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1491 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060479 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1511 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060482 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1531 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060478 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1551 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

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OpticalModule Code

OpticalInterfaceType

Optical Module BasicInformation

MappingBoard

34060476 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1571 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060477 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1591 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060480 1000BASE-CWDM(80 km)

Optical transceiver, eSFP, 1611 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km

34060276 100BASE-FX/S-1.1(15 km)

Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 15 km

EF8FCD1

34060307 100BASE-FX/S-1.1(15 km)

Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 15 km

34060281 100BASE-FX/L-1.1(40 km)

Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 40 km

34060308 100BASE-FX/L-1.1(40 km)

Optical Transceiver, eSFP, 1310 nm,STM1 LC, Single-mode, 40 km

34060282 100BASE-FX/L-1.2(80 km)

Optical Transceiver, eSFP, 1550 nm,STM1, LC, Single-mode, 80 km

34060309 100BASE-FX/L-1.2(80 km)

Optical Transceiver, eSFP, 1550 nm,STM1, LC, Single-mode, 80 km

34060475 1000BASE-BX(10 km)

Optical Transceiver, eSFP, Tx 1490nm/Rx 1310 nm, 1.25 Gbit/s, LC,Single-mode, 10 km

CXPG/CXPHEG2

34060470 1000BASE-BX(10 km)

Optical Transceiver, eSFP, Tx 1310nm/Rx 1490 nm, 1.25 Gbit/s, LC,Single-mode, 10 km

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OpticalModule Code

OpticalInterfaceType

Optical Module BasicInformation

MappingBoard

34060364 100BASE-BX(10 km)/S-1.1(15 km)

Optical Transceiver, eSFP, Tx 1550nm/Rx 1310 nm, STM1, LC, Single-mode, 15 km

EF8FCD1

34060363 100BASE-BX(10 km)/S-1.1(15 km)

Optical Transceiver, eSFP, Tx 1310nm/Rx 1550 nm, STM1, LC, Single-mode, 15 km

34060329 100BASE-BX(40 km)/L-1.1(40 km)

Optical Transceiver, eSFP, Tx 1550nm/Rx 1310 nm, STM1, LC, Single-mode, 40 km

34060328 100BASE-BX(40 km)/L-1.1(40 km)

Optical Transceiver, eSFP, Tx 1310nm/Rx 1550 nm, STM1, LC, Single-mode, 40 km

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5 Fibers and Cables

About This Chapter

This chapter describes various fibers and cables used on the equipment, including fibers, powercables, grounding cables, service cables, management cables, clock cables, and alarm cables.

5.1 FibersThis section describes the types of fibers and fiber connectors.

5.2 -48 V Power Supply CableThe OptiX PTN 910 uses 1 U DC connectors to receive external power.

5.3 Protection Grounding CablesProtection grounding cables are used to ground the OptiX PTN 910.

5.4 Service CablesThe service cables include Ethernet cables, 75-ohm 16 x E1 cables, 120-ohm 16 x E1 cables,and telephone wires.

5.5 Management CablesOn the OptiX PTN 910, Ethernet cables are used to input and output NM signals.

5.6 Clock CablesThe clock cables used on the OptiX PTN 910 include external clock cables and 120-to-75-ohmclock cables.

5.7 Alarm Input/Output CablesOn the OptiX PTN 910, the RJ-45 connectors are used to input the alarm signals from the externalequipment and output the local alarm signals to the equipment that monitors all the alarms.

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5.1 FibersThis section describes the types of fibers and fiber connectors.

5.1.1 Fiber TypesSingle-mode fibers or multi-mode fibers can be used on the OptiX PTN 910.

5.1.2 Fiber ConnectorsThe fiber connectors of the LC/PC, FC/PC, and SC/PC types are applicable to the OptiX PTN910.

5.1.1 Fiber TypesSingle-mode fibers or multi-mode fibers can be used on the OptiX PTN 910.

Table 5-1 lists the types of fibers used on the OptiX PTN 910.

Table 5-1 Types of Fiber

Usage Connector 1

Connector 2

Fiber Available Length

To interconnectoptical interfaces onthe OptiX PTNequipment

LC/PC LC/PC 2 mm single-mode fiber

0.5 m, 1.5 m, 3 m, 6 m, 10m, 15 m, 20 m, 30 m

2 mm multi-mode fiber

3 m, 5 m, 10 m, 20 m, 30 m

To interconnect thelocal equipment withthe ODFTo interconnect thelocal equipment withother equipment

LC/PC FC/PC 2 mm single-mode fiber

0.8 m, 2.7 m, 5 m, 7 m, 10m, 15 m, 20 m, 25 m, 30 m,50 m

2 mm multi-mode fiber

10 m, 20 m, 30 m

LC/PC SC/PC 2 mm single-mode fiber

3 m, 5 m, 10 m, 15 m, 20 m,25 m, 30 m, 50 m

2 mm multi-mode fiber

10 m, 20 m

Select proper fiber connectors and fibers of proper length according to the site survey.

5.1.2 Fiber ConnectorsThe fiber connectors of the LC/PC, FC/PC, and SC/PC types are applicable to the OptiX PTN910.

Table 5-2 lists the types and usage of the fiber connectors applicable to the equipment.

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Table 5-2 Usage and types of fiber connectors

Type Description Usage

LC/PC Plug-in square fiber connector/protruding polished

Used at the optical interfaces on all theboards on the OptiX PTN equipment

FC/PC Round fiber connector/protrudingpolished

Used at the client-side ODF or the opticalinterfaces on other equipment

SC/PC Square fiber connector/protrudingpolished

LC/PC Fiber ConnectorFigure 5-1 shows the appearance of the LC/PC fiber connector.

Figure 5-1 LC/PC fiber connector

Only axial operations instead of rotation is required to insert or remove the LC/PC fiberconnector. To insert or remove an LC/PC fiber connector, do as follows:

l To insert the fiber jumper into the LC/PC connector, align the head of the fiber jumper withthe optical interface and then push the fiber jumper with proper force into the connector.

l To remove the LC/PC fiber jumper, press the clip first, push the fiber connector inwardslightly, and then pull out the connector.

FC/PC Fiber ConnectorFigure 5-2 shows the appearance of the FC/PC fiber connector.

Figure 5-2 FC/PC fiber connector

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To insert or remove an FC/PC fiber connector, do as follows:

l To insert the fiber jumper into the FC/PC connector, align the head of the fiber jumper withthe optical interface on the optical interface board carefully, to avoid any damage to theinternal ceramic pipe. After inserting the fiber jumper to the bottom of the optical interface,clockwise rotate the external screw to tighten the fiber jumper into the optical interface.

l To remove the fiber jumper, first anticlockwise rotate the external screw of the opticalinterface. When the screw is loosened, remove the fiber jumper with proper force from theoptical interface.

SC/PC Fiber ConnectorFigure 5-3 shows the appearance of the SC/PC fiber connector.

Figure 5-3 SC/PC fiber connector

To insert or remove an SC/PC fiber connector, do as follows.

l To insert the fiber jumper into the SC/PC connector, align the head of the fiber jumper withthe optical interface and then push the fiber jumper with proper force into the connector.

l To remove the fiber jumper, press the clip first, push the fiber connector inward slightly,and then pull out the connector.

5.2 -48 V Power Supply CableThe OptiX PTN 910 uses 1 U DC connectors to receive external power.

Power cables need to be produced on site. The power cables are made of 1U DC connectors,single cord end terminals, and wires. Figure 5-4 shows the appearance of a power cable. Thetechnical specifications of the power cable are listed in Table 5-3.

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Figure 5-4 Appearance of the power cable

1U DC connector

Single cord end terminal

Power cable

Table 5-3 Technical specifications of the power cable

Item Wire Related Parameter Terminal Related Parameter

2.5 mm2

power cableand terminal

Electronic/Electric wire, 450 V/750V, H07Z, K, 2.5 mm2, blue/black green, fire resistant cablewith low smoke and no halogen

Bare crimp terminal, single cord endterminal, 2.5 mm2, 12.5 A, tin plating, 8mm deep, blue

NOTE

In the case of the OptiX PTN 910 equipment, there are following limitations on mapping relations betweenthe cable length and the cross-sectional area.

If the cross-sectional area is 2.5 mm2, the maximum cable length is 50 m.

5.3 Protection Grounding CablesProtection grounding cables are used to ground the OptiX PTN 910.

Protection grounding cables are made of wires and OT terminals. Figure 5-5 shows theappearance of a protection grouding cable. The technical specifications of the protectiongrounding cable are listed in Table 5-4.

Figure 5-5 Appearance of the protection grounding cable

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Table 5-4 Technical specifications of the power cable and protection grounding cable

Wire Related Parameter Terminal Related Parameter

Electronic/Electric wire, 450 V/750 V, H07Z,K, 2.5 mm2, yellow green, fire resistant cablewith low smoke and no halogen

Bare crimp terminal, OT, 2.5 mm2, M4, tinplating, pre-insulated ring terminal,16-14AWG, blue

NOTE

In the case of the OptiX PTN 910 equipment, there are following limitations on mapping relations betweenthe cable length and the cross-sectional area.

If the cross-sectional area is 2.5 mm2, the maximum cable length is 50 m.

5.4 Service CablesThe service cables include Ethernet cables, 75-ohm 16 x E1 cables, 120-ohm 16 x E1 cables,and telephone wires.

5.4.1 Ethernet CablesOn the OptiX PTN 910, Ethernet cables are used to input and output Ethernet service signals.

5.4.2 75-Ohm 16 x E1 CablesOn the OptiX PTN 910, Anea96 connectors are used to input and output 75-ohm E1 signals.

5.4.3 120-Ohm 16 x E1 CablesOn the OptiX PTN 910, Anea96 connectors are used to input and output 120-ohm E1 signals.

5.4.4 xDSL CablesOn the OptiX PTN 910, the telephone wires with RJ-11 connectors are used to input and outputADSL and G.SHDSL service signals.

5.4.1 Ethernet CablesOn the OptiX PTN 910, Ethernet cables are used to input and output Ethernet service signals.

Ethernet cables are also referred to as network cables and can be classified into straight throughnetwork cables and crossover network cables according to the connection sequence of the coppercores in the cables.

The Ethernet service interfaces on the equipment are adaptive to the straight through networkcables and crossover network cables. Hence, you can connect either type of the network cablesto the Ethernet service interfaces as required.

Ethernet cables need to be made on site.

StructureFigure 5-6 shows the appearance of the network cable.

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Figure 5-6 Appearance of the network cable

RJ-45 connectors are used at both ends of a network cable. Figure 5-7 shows an RJ-45 connectorand Figure 5-8 shows the structure of the network cable.

Figure 5-7 RJ-45 connector

PIN#1PIN#8

Figure 5-8 Structure of the network cable

Label 1Main label Label 2

W

X1 X2

8

1

8

1

RJ-45 network interface connector Ethernet

cable

NOTE

For a crossover cable, pins 1 and 2 of the RJ-45 connector at one end must be cross-connected to pins 3and 6 of the RJ-45 connector at the other end respectively.

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Pin AssignmentTable 5-5 lists the pin assignment of the network cable connector.

Table 5-5 Pin assignment of the network cable connector

Straight Through Cable Crossover Cable

Connector X1Pin

Connector X2Pin

Color Relation

Connector X1Pin

Connector X2Pin

Color Relation

X1.1 X2.1 White-orange

Twistedpair

X1.1 X2.3 White-orange

Twistedpair

X1.2 X2.2 Orange X1.2 X2.6 Orange

X1.3 X2.3 White-green

Twistedpair

X1.3 X2.1 White-green

Twistedpair

X1.6 X2.6 Green X1.6 X2.2 Green

X1.4 X2.4 Blue Twistedpair

X1.4 X2.4 Blue Twistedpair

X1.5 X2.5 White-blue

X1.5 X2.5 White-blue

X1.7 X2.7 White-brown

Twistedpair

X1.7 X2.7 White-brown

Twistedpair

X1.8 X2.8 Brown X1.8 X2.8 Brown

Technical SpecificationsTable 5-6 lists the technical specifications of the network cable. For the technical specificationsof connector X1/X2, see Figure 5-8 and Figure 5-6.

Table 5-6 Technical specifications of the network cable

Item Specification

ConnectorX1/X2

Network Interface Connector, 8-Bit 8PIN, Shielded, Crystal ModelConnector

Cable type Twisted-Pair Cable, 100ohm,Category 5e, 0.52mm, 24AWG, 8Cores,4Pairs, PANTONE 430U

Number ofcores

Eight

5.4.2 75-Ohm 16 x E1 CablesOn the OptiX PTN 910, Anea96 connectors are used to input and output 75-ohm E1 signals.

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At one end of the 75-ohm 16 x E1 cable, the Anea96 connector is used to connect the 75-ohmE1 electrical interface on the board; the other end is connected to the digital distribution frame(DDF). Make the connector as required on site.

StructureFigure 5-9 shows the appearance of the 75-ohm 16 x E1 cable and Figure 5-10 shows thestructure of the cable.

Figure 5-9 Appearance of the 75-ohm 16 x E1 cable

Figure 5-10 Structure of the 75-ohm 16 x E1 cable

Main label

1W

X1 A

View A

Pos .1

Pos.96Cable Connector, Anea, 96PIN,

Female Connector

Pin AssignmentTable 5-7 lists the pin assignment of the 75-ohm 16 x E1 cable connector.

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Table 5-7 Pin assignment of the 75-ohm E1 cable connector

Connector Pin

Cable Remarks Connector Pin

Cable Remarks

Core Serial No. Core Serial No.

1 Tip 1 R0 25 Tip 2 T0

2 Ring 26 Ring

3 Tip 3 R1 27 Tip 4 T1

4 Ring 28 Ring

5 Tip 5 R2 29 Tip 6 T2

6 Ring 30 Ring

7 Tip 7 R3 31 Tip 8 T3

8 Ring 32 Ring

9 Tip 9 R4 33 Tip 10 T4

10 Ring 34 Ring

11 Tip 11 R5 35 Tip 12 T5

12 Ring 36 Ring

13 Tip 13 R6 37 Tip 14 T6

14 Ring 38 Ring

15 Tip 15 R7 39 Tip 16 T7

16 Ring 40 Ring

17 Tip 17 R8 41 Tip 18 T8

18 Ring 42 Ring

19 Tip 19 R9 43 Tip 20 T9

20 Ring 44 Ring

21 Tip 21 R10 45 Tip 22 T10

22 Ring 46 Ring

23 Tip 23 R11 47 Tip 24 T11

24 Ring 48 Ring

49 Tip 25 R12 73 Tip 26 T12

50 Ring 74 Ring

51 Tip 27 R13 75 Tip 28 T13

52 Ring 76 Ring

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Connector Pin

Cable Remarks Connector Pin

Cable Remarks

Core Serial No. Core Serial No.

53 Tip 29 R14 77 Tip 30 T14

54 Ring 78 Ring

55 Tip 31 R15 79 Tip 32 T15

56 Ring 80 Ring

Shell External braid shielding layer

Technical Specifications

Table 5-8 Technical specifications of the 75-ohm 16 x E1 cable

Item Specification

Cable Trunk Cable, 75ohm, 16E1, 1.6mm,Anea 96F-I,SYFVZP75-1.1/0.26*32(S), +45deg

Connector Cable Connector, Anea, 96PIN, Suite Of Female Connector AndShielding Case, IDC Type, For 28-30 AWG Solid Wire, 1 A

Cable type Coaxial Cable, SYFVZP-MC 75-1-1*32, 75 ohm, 12.40 mm, 1.1mm, 0.26 mm, Pantone Warm Gray 1U, Only for OEM

Diameter of theshielding layer -diameter of the internalinsulation layer -diameter of the internalconductor

12.4 mm - 1.6 mm - 0.26 mm

Number of cores 32

Available length 5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, 50 m

5.4.3 120-Ohm 16 x E1 CablesOn the OptiX PTN 910, Anea96 connectors are used to input and output 120-ohm E1 signals.

At one end of the a 120-ohm 16 x E1 cable, the Anea96 connector is used to connect the 120-ohm E1 electrical interface on the board; the other end is connected to the DDF. Make theconnector as required on site.

StructureFigure 5-11 shows the appearance of the 120-ohm 16 x E1 cable and Figure 5-12 shows thestructure of the cable.

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Figure 5-11 Appearance of the 120-ohm 16 x E1 cable

Figure 5-12 Structure of the 120-ohm 16 x E1 cable

Main label

1W

X1 A

View A

Pos .1

Pos.96Cable Connector, Anea, 96PIN,

Female Connector

Pin assignmentTable 5-9 lists the pin assignment of the 120-ohm 16 x E1 cable connector.

Table 5-9 Pin assignment of the 120-ohm E1 cable connector

Connector Pin

Cable Remarks Connector Pin

Cable Remarks

Core Relationship

Core Relationship

1 White Twistedpair

R0 25 White Twistedpair

T0

2 Blue 26 Orange

3 White Twistedpair

R1 27 White Twistedpair

T1

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Connector Pin

Cable Remarks Connector Pin

Cable Remarks

Core Relationship

Core Relationship

4 Green 28 Brown

5 White Twistedpair

R2 29 Red Twistedpair

T2

6 Grey 30 Blue

7 Red Twistedpair

R3 31 Red Twistedpair

T3

8 Orange 32 Green

9 Red Twistedpair

R4 33 Red Twistedpair

T4

10 Brown 34 Grey

11 Black Twistedpair

R5 35 Black Twistedpair

T5

12 Blue 36 Orange

13 Black Twistedpair

R6 37 Black Twistedpair

T6

14 Green 38 Brown

15 Black Twistedpair

R7 39 Yellow Twistedpair

T7

16 Grey 40 Blue

17 White Twistedpair

R8 41 White Twistedpair

T8

18 Blue 42 Orange

19 White Twistedpair

R9 43 White Twistedpair

T9

20 Green 44 Brown

21 White Twistedpair

R10 45 Red Twistedpair

T10

22 Grey 46 Blue

23 Red Twistedpair

R11 47 Red Twistedpair

T11

24 Orange 48 Green

49 Red Twistedpair

R12 73 Red Twistedpair

T12

50 Brown 74 Grey

51 Black Twistedpair

R13 75 Black Twistedpair

T13

52 Blue 76 Orange

53 Black Twistedpair

R14 77 Black Twistedpair

T14

54 Green 78 Brown

55 Black Twistedpair

R15 79 Yellow Twistedpair

T15

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Connector Pin

Cable Remarks Connector Pin

Cable Remarks

Core Relationship

Core Relationship

56 Grey 80 Blue

Shell External braid shielding layer

Technical Specifications

Table 5-10 Technical specifications of the 120-ohm 16 x E1 cable

Item Specification

Cable Trunk Cable, 120 ohm, 16E1, 0.4 mm, Anea 96F,120CC32P0.4P430U(S), +45deg

Connector Cable Connector, Anea, 96PIN, Suite Of Female Connector AndShielding Case, IDC Type, For 24-26 AWG Solid Wire - 1 A

Cable type Twisted-Pair Cable, 120 ohm, SEYVP, 0.4 mm, 26AWG, 32Pairs,Pantone 430U

Core diameter of theinner conductor

0.4 mm

Number of cores 32 twisted pairs

Available length 5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, 50 m

5.4.4 xDSL CablesOn the OptiX PTN 910, the telephone wires with RJ-11 connectors are used to input and outputADSL and G.SHDSL service signals.

The connectors at both ends of the telephone wire are RJ-11 connectors.

StructureFigure 5-13 shows the structure of the telephone wire used as an xDSL cable.

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Figure 5-13 Structure of the telephone wire

6

1

6

1

1 Main label

W

X2X1

15 m

1. Telephone wire RJ-11 crystal connector

Pin AssignmentTable 5-11 lists the pin assignment of the ADSL cable connector and Table 5-11 lists the pinassignment of the G.SHDSL cable connector.

Table 5-11 Pin assignment of the ADSL cable connector (RJ-11)

Connector X1 Connector X2 Description

X1.1 X2.1 Unspecified

X1.2 X2.2 Unspecified

X1.3 X2.3 Ring

X1.4 X2.4 Tip

X1.5 X2.5 Unspecified

X1.6 X2.6 Unspecified

Table 5-12 Pin assignment of the G.SHDSL cable connector

Connector X1 Connector X2 Description

X1.1 X2.1 Unspecified

X1.2 X2.2 Unspecified

X1.3 X2.3 Tip

X1.4 X2.4 Ring

X1.5 X2.5 Unspecified

X1.6 X2.6 Unspecified

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Technical Specifications

Table 5-13 lists the technical specifications of the xDSL cable (telephone wire).

Table 5-13 Technical specifications of the xDSL cable

Item Specification

RJ-11 Connector X1/X2

Network Interface Connector, 6-Bit 4PIN, Crystal ModelConnector, Matching 26-28AWG

Cable Electronic and Power Cable, 150 V,UL20251, 28AWG, Black, 1 A,2 Cores Telephone Cable

Number of cores 2

Available length 15 m

5.5 Management CablesOn the OptiX PTN 910, Ethernet cables are used to input and output NM signals.

The management cables for the OptiX PTN 910 include Ethernet cables and orderwire telephonewires.

l Ethernet cables are classified into straight through cables and crossover cables, and areused for communication between the equipment and the NMS computer. Both the NMinterface and 64 kbit/s data-synchronization interface on the equipment are adaptive to astraight through cable or a crossover cable.

Ethernet Cables

Figure 5-14 shows an RJ-45 connector used at the end of the Ethernet cable.

When the cable is connected to the ETH/OAM interface, the pin assignment of the RJ-45connector is as listed in Table 5-14; when the cable is connected to the EXT/F1 interface, thepin assignment of the RJ-45 connector is as listed in Table 5-15.

Table 5-16 lists the technical specifications of the Ethernet cable.

Figure 5-14 RJ-45 connector

PIN#1PIN#8

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Table 5-14 Pin assignment of the RJ-45 connector (ETH/OAM)

Connector Pin

Color Relation Usage

1 White-orange Twisted pair Transmit positive of the NM interface

2 Orange Transmit negative of the NM interface

3 White-green Twisted pair Receive positive of the NM interface

6 Green Receive negative of the NM interface

4 Blue Twisted pair Grounding end of the NM serial interface

5 White-blue Receive end of the NM serial interface

7 White-brown Twisted pair Unspecified

8 Brown Transmit end of the NM serial interface

Table 5-15 Pin assignment of the RJ-45 connector (EXT/F1)

ConnectorPin

Color Relation Usage

1 White-orange Twisted pair Transmit positive of the extended Ethernetinterface

2 Orange Transmit negative of the extended Ethernetinterface

3 White-green Twisted pair Receive positive of the extended Ethernetinterface

6 Green Receive negative of the extended Ethernetinterface

4 Blue Twisted pair Transmit positive of the 64 kbit/ssynchronous data interface

5 White-blue Transmit negative of the 64 kbit/ssynchronous data interface

7 White-brown Twisted pair Receive positive of the 64 kbit/ssynchronous data interface

8 Brown Receive negative of the 64 kbit/ssynchronous data interface

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Table 5-16 Technical specifications of the Ethernet cable

Item Specification

Connector Network Interface Connector, 8-Bit 8PIN, Shielded, Crystal ModelConnector

Cable type Twisted-Pair Cable, 100ohm,Category 5e, 0.52mm, 24AWG, 8Cores,4Pairs, PANTONE 430U

Number of cores Eight

5.6 Clock CablesThe clock cables used on the OptiX PTN 910 include external clock cables and 120-to-75-ohmclock cables.

5.6.1 External Clock CablesOn the OptiX PTN 910, the external clock cables with RJ-45 connectors are used to input andoutput the external clock or time signals.

5.6.2 Clock Bridging CableOn the OptiX PTN 910, the 120-to-75-ohm clock cable is used as the clock bridging cable.

5.6.1 External Clock CablesOn the OptiX PTN 910, the external clock cables with RJ-45 connectors are used to input andoutput the external clock or time signals.

The external clock cables can be connected to the CLK1/TOD1 and CLK2/TOD2 interfaces onthe OptiX PTN 910.

StructureFigure 5-15 shows the structure of the RJ-45 connector used on the external clock cable.

Figure 5-15 Structure of the RJ-45 Connector

PIN#1PIN#8

Pin AssignmentThe external clock cables must be made on the equipment installation site. When the CLK1/TOD1 and CLK2/TOD2 interfaces are used as external clock interfaces, the pin assignment of

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the RJ-45 connector is as listed in Table 5-17; when the CLK1/TOD1 and CLK2/TOD2interfaces are used as external time interfaces, the pin assignment of the RJ-45 connector is aslisted in Table 5-18.

Table 5-17 Pin assignment of the RJ-45 connector (external clock mode)

ConnectorPin

Color Relation Description

1 White-orange Twisted pair Receive negative of CLK

2 Orange Receive positive of CLK

3 White-green Twisted pair Unspecified

6 Green Unspecified

4 Blue Twisted pair Transmit negative of CLK

5 White-blue Transmit positive of CLK

7 White- brown Twisted pair Unspecified

8 Brown Unspecified

Table 5-18 Pin assignment of the RJ-45 connector (external time mode)

Connector Pin

Color Relation Description

1PPS + TimeInformation Mode

DCLS Mode

1 White-orange Twisted pair Unspecified Unspecified

2 Orange Unspecified Unspecified

3 White-green Twisted pair Negative of 1PPSsignals

Negative of DCLSsignals

6 Green Positive of 1PPSsignals

Positive of DCLSsignals

4 Blue Twisted pair Grounding terminal Grounding terminal

5 White-blue Grounding terminal Grounding terminal

7 White-brown Twisted pair Negative of timeinformation

Unspecified

8 Brown Positive of timeinformation

Unspecified

Technical SpecificationsTable 5-19 lists the technical specifications of the external clock cable.

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Table 5-19 Technical specifications of the external clock cable

Item Specification

Connector Network Interface Connector, 8-Bit 8PIN, Crystal Model Connector

Cable type Twisted-Pair Cable, 100 ohm, Category 5e, 0.52 mm, 24AWG, 8 Cores, 4Pairs, PANTONE 430U

Number ofcores

Eight

5.6.2 Clock Bridging CableOn the OptiX PTN 910, the 120-to-75-ohm clock cable is used as the clock bridging cable.

Structure

Figure 5-16 shows the structure of the 120-to-75-ohm clock bridging cable.

Figure 5-16 Structure of the clock bridging cable

RJ-45 connector

Main label Heat-shrink tube

120-ohm or 75-ohm conversion

connector Label

View A

18

30 m

W1

W2

W3

W4

W5A

X1

Heat-shrink tube

Heat-shrink tube

Pin Assignment

Table 5-20 lists the pin assignment of the clock bridging cable connector.

Table 5-20 Pin assignment of the clock bridging cable connector

120-Ohm Cable 75-Ohm Cable

Connector Pin Color Relation Core No.

X1.1 Orange Twisted pair W1

X1.2 White

X1.4 Blue Twisted pair W2

X1.5 White

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120-Ohm Cable 75-Ohm Cable

Connector Pin Color Relation Core No.

X1.3 Green Twisted pair W3

X1.6 White

X1.7 White Twisted pair W4

X1.8 Brown

Technical SpecificationsTable 5-21 lists the technical specifications of the clock bridging cable.

Table 5-21 Technical specifications of the clock bridging cable

Item Specification

Cable Single Cable, 120 ohm To 75 ohm Clock Cable, 30 m, MP8-II,120CC4P0.4P430U(S)+4*SYV75-2/0.34(S)

Connector X1type

Network Interface Connector,8-Bit 8PIN, Crystal Model Connector

120-ohm cabletype

Twisted-Pair Cable, 120 ohm, SEYVP, 0.4 mm, 26AWG, 4Pairs, Pantone430U

75-ohm cabletype

Coaxial Cable, SYV-75-2-2(4.0Z)-1/0.34 mm, OD3.9 mm, Double-LayerCopper Braid Shielded

Cable length 30 m

5.7 Alarm Input/Output CablesOn the OptiX PTN 910, the RJ-45 connectors are used to input the alarm signals from the externalequipment and output the local alarm signals to the equipment that monitors all the alarms.

At one end of the alarm input/output cable, the RJ-45 connector is used to connect to the ALMI/ALMO interface on the equipment; at the other end, a connector (made as required on site) isused to connect to the external equipment or the equipment that monitors all the alarms.

StructureFigure 5-17 shows the structure of the alarm input/output cable.

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Figure 5-17 Structure of the alarm input/output cable

Main label

W

X1

8

1

RJ-45 Connector

Pin Assignment

Table 5-22 lists the pin assignment of the alarm input/output alarm cable connector.

Table 5-22 Pin assignment of the alarm input/output cable connector

ConnectorPin

Color Relation Description

1 White-orange Twisted pair Alarm input 1

2 Orange Ground for alarm input 1

3 White-green Twisted pair Alarm input 2

6 Green Ground for alarm input 2

4 Blue Twisted pair Alarm input 3

5 White-blue Ground for alarm input 3

7 White- brown Twisted pair Alarm output positive

8 Brown Alarm output negative

Technical Specifications

Table 5-23 lists the technical specifications of the alarm input/output cable.

Table 5-23 Technical specifications of the alarm input/output cable

Item Specification

Connector X1 Network Interface Connector, 8-Bit 8PIN, Crystal Model Connector

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Item Specification

Cable type Twisted-Pair Cable, 100 ohm, Category 5e, 0.52 mm, 24AWG, 8 Cores, 4Pairs, PANTONE 430U

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A Safety Labels

The equipment has various safety labels. This section describes the suggestions and locationsof these safety labels.

Label DescriptionThere are labels on the chassis and boards. See Table A-1.

Table A-1 Label description

Figure Type Description

ESD protection label The label suggests the electrostatic-sensitive equipment.

Chassis grounding label The label indicates the position of thegrounding terminal. When the equipmentis installed in a 19-inch cabinet, it isrecommended that you use the groundingterminal specified in this label.

Chassis grounding label The label indicates the position of thegeneral grounding terminal. When theequipment is installed in a cabinet ratherthan a 19-inch cabinet, it is recommendedthat you use the grounding terminalspecified in this label.

Fan warning label The label suggests that do not touch the fanleaves when the fan is rotating.

!

Operation warning label The label indicates the precaution thatshould be taken for operations on the PIUboard. For details, see Label

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Figure Type Description

合格证/QUALIFICATION CARD

华为技术有限公司 中国制作MADE IN CHINAHUAWEI TECHNOLOGIES CO.,LTD.

HUAWEI

Qualification label The equipment is qualified.

OptiX PTN 910电源额定值 POWER RATING: -48--60V;3.2A

Class 1 Laser Product

N14036

华为技术有限公司 中国制造

HUAWEI TECHNOLGIES CO.,LTD. MADE IN CHINA

Product nameplate label The label suggests the product name andcertification.

Label PositionFigure A-1 shows positions of labels on the chassis.

Figure A-1 Label position

合格证/QUALIFICATION CARD

华为技术有限公司 中国制作MADE IN CHINAHUAW EI TECHNOLOGIES CO.,LTD.

HUAWEI

!

华为技术有限公司 中国制造

HUAWEI TECHNO LG IES CO .,LTD . MADE IN CHINA

OptiX PTN 910POWER RATING: -48--60V;3.2A电源额定值

Class 1 Laser Product

N14036

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B Indicators

This section describes the names of various indicators and their indications.

Index of Indicators

For boards and their indicators, see Boards and Their Indicators.

For board status indicators, see:

l Description of the Board Status Indicator (STAT)

l Description of the Program Running Indicator (PROG)

l Description of the Synchronization Status Indicator (SYNC)

l Description of the Service Status Indicator (SRV)

l Description of the Power Supply Status Indicator (PWRA/PWRB)

l Description of the Fan Status Indicator (FAN)

For service port status indicators, see:

l Description of the Service Port Transmitting/Receiving Status Indicator (ACT)

l Description of the Port Status Indicator of the CXPA/CXPB/CXPG/CXPH/EF8T(LINK)

l Description of the Port Connection and Data Transmitting/Receiving StatusIndicators of the CXPG/CXPH (L/A)

l Description of the EF8F/EG2 Port Connection Status Indicator (LINK)

l Description of the CD1 Port Status Indicator (LOS1/LOS2)

l Description of the Port Status Indicators of the ADS2 (LINK1 and LINK2)

l Description of the Port Status Indicators of the SHD4/SHD4I (LINK1, LINK2,LINK3, and LINK4)

For system alarm indicators, see:

l Description of the Critical Alarm Indicator (CRIT)

l Description of the Major Alarm Indicator (MAJ)

l Description of the Minor Alarm Indicator (MIN)

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For combination of indicators in different start statuses on the system control board, seeDescription of the Start Status Indicator Combination on the System Control Board.

Boards and Their Indicators

Board Indicator

CXPA/CXPB STAT, PROG, SYNC, SRV, CRIT, MAJ, MIN, LINK, ACT

CXPG/CXPH STAT, PROG, SYNC, SRV, CRIT, MAJ, MIN, L/A1, L/A2,LINK, ACT

EF8T STAT, SRV, LINK, ACT

EF8F STAT, SRV, LINK1 - LINK8

EG2 STAT, SRV, LINK1, LINK2, ACT1, ACT2

ML1/ML1A STAT, SRV

CD1 STAT, SRV, LOS1, LOS2

ADS2A/ASD2B STAT, SRV, LINK1, LINK2

SHD4 STAT, SRV, LINK1, LINK2, LINK3, LINK4

SHD4I STAT, SRV, LINK1, LINK2, LINK3, LINK4

PIU PWRA, PWRB

FAN FAN

Description of the Board Status Indicator (STAT)

Status Indication

On (green) The board is working normally.

On (red) The board hardware is faulty.

On (orange) The interface board is not loaded with the logic.

Off l No power is input.

l The board is not running.

Description of the Program Running Indicator (PROG)

Status Indication

On (green) l The board software is being initialized.

l The board software is normally initialized, and the boardsoftware is running normally.

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Status Indication

On (red) l The memory self-check fails.

l The board software or the logic file is lost.

l Loading of the board software fails.

On for 100 ms and off for100 ms alternately (green)

Loading of the board software is in process.

On for 300 ms and off for300 ms alternately (green)

The BIOS is guiding the upper-layer software.

On for 100 ms and off for100 ms alternatively (red)

The BIOS self-check fails.

Off No power is input.

Description of the Synchronization Status Indicator (SYNC)Status Indication

On (green) l The clock works in free-run mode and the system clockpriority list is not set. By default, the system clock prioritylist contains only internal sources.

l The clock works in locked mode and is tracing a clock sourceother than the internal sources in the priority list.

l The system clock is working in time synchronization mode,and the PTP time and system clock are in the tracing state.

On (red) l The system clock priority list is set. All the clock sources,however, are lost except for the internal clock sources. Theclock works in holdover mode or free-run mode.

l The system clock is working in time synchronization mode,but no synchronization source is available. The system clockand PTP time are working in holdover or free-run mode.

Description of the Service Status Indicator (SRV)Status Indication

On (green) Services are running normally and no service-related alarmoccurs (including the situation where the board is activated butnot configured with services).

On (red) A critical or major service-related alarm occurs.

On (orange) A minor or remote service-related alarm occurs.

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Status Indication

Off l No power is input.

l The board is not running.

Description of the Power Supply Status Indicator (PWRA/PWRB)Status Indication

On (green) Power is accessed.

Off l No power is accessed.

l The power supply poles are inversely connected.

Description of the Fan Status Indicator (FAN)Status Indication

On (green) The fans are working normally.

On (red) The fans are working abnormally.

Off l The fans are not powered.

l No fan is installed.

Description of the Service Port Transmitting/Receiving Status Indicator (ACT)Status Indication

Blinking (orange) The data interface is transmitting or receiving data.

Off The data interface is not transmitting or receiving data.

Description of the Port Status Indicator of the CXPA/CXPB/CXPG/CXPH/EF8T(LINK)

Status Indication

On (green) The physical port connection is normal.

Off physical port connection fails.

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Description of the Port Connection and Data Transmitting/Receiving StatusIndicators of the CXPG/CXPH (L/A)

Status Indication

On (green) The connection at the physical port is normal.

Blinking (orange) The connection at the physical port is normal,and data is received or transmitted at the port.

Off The physical connection fails.

Description of the EF8F/EG2 Port Connection Status Indicator (LINK)Status Indication

On (green) The physical connection of the port is normal.

Off The physical connection of the port is faulty.

Description of the CD1 Port Status Indicator (LOS1/LOS2)Status Indication

On (green) The signal at the port is normal.

On (red) The signal at the port is lost.

Off The optical module is offline.

Description of the Port Status Indicators of the ADS2 (LINK1 and LINK2)Status Indication

On (green) Physical connections at the service port are normal and links areactivated.

On for 300 ms and off for300 ms alternately (green)

l The board software is normally initialized

l No service is accessed.

On for 100 ms and off for100 ms alternately (green)

Service connections are being activated.

Off Cables at the service port are not connected.

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Description of the Port Status Indicators of the SHD4/SHD4I (LINK1, LINK2,LINK3, and LINK4)

Status Indication

On (green) l Physical connections at the service port are normal and linksare activated.

l The board software is being initialized.

On for 300 ms and off for300 ms alternately (green)

Service connections are being activated.

Description of the Critical Alarm Indicator (CRIT)Status Indication

On (red) Critical alarms are generated in the equipment.

Off No critical alarms are generated in the equipment.

Description of the Major Alarm Indicator (MAJ)Status Indication

On (orange) Major alarms are generated in the equipment.

Off No major alarms are generated in the equipment.

Description of the Minor Alarm Indicator (MIN)Status Indication

On (yellow) Minor alarms are generated in the equipment.

Off No minor alarms are generated in the equipment.

Description of the Start Status Indicator Combination on the System Control BoardFrom power on to normal running, the system control board goes through various status. TableB-1 shows the indicator combination corresponding to these statuses.

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Table B-1 Start status indicator combination

SN Status Indicator

STAT PROG SRV

1 The system control board is notpowered on.

Off Off Off

2 The BIOS is being started. Off Green Off

3 The BIOS is started, and guidesand loads the board software.

Off Blinking(green)

Off

4 The upper-layer software is beinginitialized.

Green Green Off

5 The upper-layer softwareinitialization is complete, but thesystem control board is notrunning.

Green Green Off

6 The system control board isrunning.

Green Green Always ona

NOTEa: When the system control board is running, the SRV indicator may be in red, orange, or green. Whenservices are normal, the indicator is green. For other statuses of the indicator, see Description of theService Status Indicator (SRV).

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C Power Consumption and Weight

This chapter lists the power consumption and weight of each board used for the OptiX PTN910.

Table C-1 lists the power consumption and weight of boards.

Table C-1 Power consumption and weight

Board Weight (kg) Power Consumption (W)

CXPA/CXPB 1.25 43.9

CXPG/CXPH 1.32 46.8

EF8T 0.53 9

EF8F 0.55 12.8

EG2 0.52 5.9

ML1/ML1A 0.56 13.1

CD1 0.52 16.4

ADS2A/ADS2B 0.54 10.5(ADS2A)10.4(ADS2B)

SHD4 0.60 7.4

SHD4I 0.60 7.5

PIU 0.12 0.5

FAN 0.2 2.3

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D Board Configuration Parameters

You can use the U2000 to configure each parameter of the interface boards, cross-connect andsystem control board.

Parameters of the Interface Board

The configurable parameters of the interface boards are the Ethernet interface, PDH interface,ADSL interface, G.SHDSL interface, SDH interface, path configuration, J0, J1, J2, C2, V5,automatic laser shutdown (ALS), and spare timeslot recovery value.

l The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer3 attributes, advanced attributes and flow control. To configure an Ethernet interface,configure the physical parameters, link layer parameters, network layer parameters andflow control schemes.

l The attributes of a PDH interface cover the general attributes, Layer 3 attributes andadvanced attributes. To configure an E1 interface, configure the physical parameters,network layer parameters, signal frame format, clock mode and loopback scheme.

l The attributes of an ADSL interface cover the general attributes, VPI/VCI of the interface,and enabling status of the tunnel at the virtual interface

l The attributes of a G.SHDSL interface cover the general attributes, the interface mode(ATM mode,,IMA mode and EFM mode included).

l The attributes of an SDH interface cover the general attributes, Layer 2 attributes, Layer 3attributes and advanced attributes. To configure an SDH interface, configure the physicalparameters, link layer parameters and network layer parameters.

l The attributes of the path configuration cover the VC12 frame format and frame mode ofa channelized SDH interface.

l The J0 byte is continually transmitted to carry section access point identifiers, accordingto which the receive end verifies the constant connection to the intended transmit end. It isrecommended to set the J0 byte to "0".

l The J1 byte is the path tracing byte. The transmit end successively transmits the higherorder access point identifiers, according to which the receive end verifies the constantconnection to the intended transmit end. When detecting mismatch of the J1 bytes, thereceive end inserts the HP_TIM alarm in the corresponding path.

l The J2 byte is a VC-12 path tracing byte. The transmit end successively transmits the lowerorder access point identifiers based on the negotiation of the two ends. According to these

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access point identifiers, the receive end verifies the constant connection to the intendedtransmit end in this path.

l The C2 byte is the signal label byte, which indicates the multiplexing structure of the VCframes and the payload property. The received C2 should be consistent with the transmittedC2. If the C2 bytes are mismatched, the local end inserts the HP_SLM alarm in thecorresponding VC-4 path.Table D-1 lists the mapping relation between the service type and setting of the C2.

Table D-1 Mapping relation between the service type and C2 byte

Input Service Type C2 Byte (in Hex)

TUG structure 02

ATM mapping 13

HDLC, PPP framed signal mapping 16

Unequipped 00

l As a path status and signal identification byte, the V5 byte detects the bit error and indicates

the remote fault and failure in the lower order path. Table D-2 lists the mapping relationbetween the service type and V5 byte.

Table D-2 Mapping relation between the service type and V5 byte

Input Service Type V5 Byte (in Hex)

Asynchronization 02

Unequipped or supervisory unequipped 00

l To configure the ALS is to set the parameters of the optical interface.

l To ensure the valid utilization of the path, the spare timeslots are eliminated when thesignals are encapsulated into the network. In this way, the TDM frame is partially stuffed.To recover the TDM frame at the service sink, the spare timeslots eliminated duringencapsulation are added again.

Parameters of the Cross-Connect and System Control Board

The configurable parameters of the cross-connect and system control board board are theenvironment monitor interface, the external time interface and the phase-locked source outputby external clock.

You can set the relay control mode and enable or disable the major alarm relay and critical alarmrelay to configure the environment monitor interface.

You can set the basic Attribute, BMC, and Cable Transmitting Distance to configure the externaltime interface.

You can set the output mode, output timeslot, output threshold, failure condition and failureaction of the 2M phase-locked source external clock

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For details, see OptiX PTN 910 Configuration Guide and the U2000 Online Help.

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E Glossary

A

Administrator A user who has authority to access all the Management Domains of the EMLCoreproduct. He has access to the whole network and to all the management functionalities.

Alarm A message reported when a fault is detected by a device or by the network managementsystem during the process of polling devices. Each alarm corresponds to a recoveryalarm. After a recovery alarm is received, the status of the corresponding alarm changesto cleared.

alarm cable The cable for generation of visual or audio alarms.

APS See Automatic Protection Switching

AsynchronousTransfer Mode

A data transfer technology based on cell, in which packets allocation relies on channeldemand. It supports fast packet switching to achieve efficient utilization of networkresources. The size of a cell is 53 bytes, which consist of 48-byte payload and 5-byteheader.

ATM See Asynchronous Transfer Mode

Automatic ProtectionSwitching

Automatic Protection Switching (APS) is the capability of a transmission system todetect a failure on a working facility and to switch to a standby facility to recover thetraffic.

B

backup A periodic operation performed on the data stored in the database for the purposes ofdatabase recovery in case that the database is faulty. The backup also refers to datasynchronization between active and standby boards.

bandwidth A range of transmission frequencies that a transmission line or channel can carry in anetwork. In fact, it is the difference between the highest and lowest frequencies thetransmission line or channel. The greater the bandwidth, the faster the data transfer rate.

BER See Bit Error Rate

binding strap The binding strap is 12.7 mm wide, with one hook side (made of transparentpolypropylene material) and one mat side (made of black nylon material).

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bit error An incompatibility between a bit in a transmitted digital signal and the correspondingbit in the received digital signal.

Bit Error Rate Bit error rate. Ratio of received bits that contain errors. BER is an important index usedto measure the communications quality of a network.

breaker A breaker is a device that connects/disconnects power to a circuit.

bundling An optional multiplexing operation, whereby more than one user message may be carriedin the same SCTP packet.

C

Cable distribution plate A component which is used to arrange the cables in order.

cable tie The tape used to bind the cables.

CE See Customer Edge

CES See Circuit Emulation Service

Circuit EmulationService

A function with which the E1/T1 data can be transmitted through ATM networks. At thetransmission end, the interface module packs timeslot data into ATM cells. These ATMcells are sent to the reception end through the ATM network. At the reception end, theinterface module re-assigns the data in these ATM cells to E1/T1 timeslots. The CEStechnology guarantees that the data in E1/T1 timeslots can be recovered to the originalsequence at the reception end.

client A device that sends requests, receives responses, and obtains services from the server.

Customer Edge A part of BGP/MPLS IP VPN model. It provides interfaces for direct connection to theService Provider (SP) network. A CE can be a router, switch, or host.

D

Data CommunicationNetwork

A communication network used in a TMN or between TMNs to support the DataCommunication Function (DCF).

DCN See Data Communication Network

DDF See Digital Distribution Frame

diamond-shaped nut A type of nut that is used to fasten the wiring frame to the cabinet.

Digital DistributionFrame

A type of equipment used between the transmission equipment and the exchange withtransmission rate of 2 to 155 Mbit/s to provide the functions such as cables connection,cable patching, and test of loops that transmitting digital signals.

E

E-AGGR Ethernet-Aggregation

E-LAN See Ethernet LAN

ejector lever A lever for removing circuit boards from an electronic chassis.

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electromagneticcompatibility

Electromagnetic compatibility is the condition which prevails when telecommunicationsequipment is performing its individually designed function in a common electromagneticenvironment without causing or suffering unacceptable degradation due to unintentionalelectromagnetic interference to or from other equipment in the same environment.[NTIA]

ElectroStatic Discharge The sudden and momentary electric current that flows between two objects at differentelectrical potentials caused by direct contact or induced by an electrostatic field.

EMC See electromagnetic compatibility

ESD See ElectroStatic Discharge

Ethernet A technology complemented in LAN. It adopts Carrier Sense Multiple Access/CollisionDetection. The speed of an Ethernet interface can be 10 Mbit/s, 100 Mbit/s, 1000 Mbit/s or 10000 Mbit/s. The Ethernet network features high reliability and easy maintaining..

Ethernet LAN Ethernet LAN. A L2VPN service type that is provided for the user Ethernet in differentdomains over the PSN network. For the user Ethernet, the entire PSN network serves asa Layer 2 switch.

ETSI See European Telecommunications Standards Institute

EuropeanTelecommunicationsStandards Institute

A standards-setting body in Europe. Also the standards body responsible for GSM.

F

fault A failure to implement the function while the specified operations are performed. A faultdoes not involve the failure caused by preventive maintenance, insufficiency of externalresources and intentional settings.

frame A frame, starting with a header, is a string of bytes with a specified length. Frame lengthis represented by the sampling circle or the total number of bytes sampled during a circle.A header comprises one or a number of bytes with pre-specified values. In other words,a header is a code segment that reflects the distribution (diagram) of the elements pre-specified by the sending and receiving parties.

G

GE See Gigabit Ethernet

Gigabit Ethernet GE adopts the IEEE 802.3z. GE is compatible with 10 Mbit/s and 100 Mbit/s Ethernet.Itruns at 1000Mbit/s. Gigabit Ethernet uses a private medium, and it does not supportcoaxial cables or other cables. It also supports the channels in the bandwidth mode. IfGigabit Ethernet is, however, deployed to be the private bandwidth system with a bridge(switch) or a router as the center, it gives full play to the performance and the bandwidth.In the network structure, Gigabit Ethernet uses full duplex links that are private, causingthe length of the links to be sufficient for backbone applications in a building and campus.

guide rail Components to guide, position, and support plug-in boards.

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H

hot standby A mechanism of ensuring device running security. The environment variables andstorage information of each running device are synchronized to the standby device. Whenthe faults occur on the running device, the standby device can take over the services inthe faulty device in automatic or manual way to ensure the normal running of the entiresystem.

HSB See hot standby

I

IEC See International Electrotechnical Commission

IEEE See Institute of Electrical and Electronics Engineers

IMA See Inverse Multiplexing over ATM

Institute of Electricaland ElectronicsEngineers

A society of engineering and electronics professionals based in the United States butboasting membership from numerous other countries. The IEEE focuses on electrical,electronics, computer engineering, and science-related matters.

InternationalElectrotechnicalCommission

The International Electrotechnical Commission (IEC) is an international and non-governmental standards organization dealing with electrical and electronical standards.

InternationalTelecommunicationUnion -TelecommunicationStandardization Sector

An organization that coordinates standards for telecommunications on behalf of theInternational Telecommunication Union (ITU). It is based in Geneva, Switzerland. Priorto 1992, the ITU-T was known as the International Telegraph and TelephoneConsultative Committee (CCITT, from the French name "Comit¨| consultatifinternational t¨|l¨|phonique et t¨|l¨|graphique").

Internet Protocol The TCP/IP standard protocol that defines the IP packet as the unit of information sentacross an internet and provides the basis for connectionless, best-effort packet deliveryservice. IP includes the ICMP control and error message protocol as an integral part. Theentire protocol suite is often referred to as TCP/IP because TCP and IP are the twofundamental protocols. IP is standardized in RFC 791.

Inverse Multiplexingover ATM

Inverse Multiplexing over ATM. The ATM inverse multiplexing technique involvesinverse multiplexing and de-multiplexing of ATM cells in a cyclical fashion among linksgrouped to form a higher bandwidth logical link whose rate is approximately the sum ofthe link rates. This is referred to as an IMA group.

IP See Internet Protocol

ITU-T See International Telecommunication Union - Telecommunication StandardizationSector

L

L3VPN Layer3 Virtual Private Network

Label Switching Router The Label Switching Router (LSR) is the basic element of MPLS network. All LSRssupport the MPLS protocol. The LSR is composed of two parts: control unit andforwarding unit. The former is responsible for allocating the label, selecting the route,creating the label forwarding table, creating and removing the label switch path; the latterforwards the labels according to groups received in the label forwarding table.

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LAN See Local Area Network

Laser A component that generates directional optical waves of narrow wavelengths. The laserlight has better coherence than ordinary light. The fiber system takes the semi-conductorlaser as the light source.

LB See Loopback

link A network communications channel consisting of a circuit or transmission path and allrelated equipment between a sender and a receiver. A link is used to connect signalingpoints (SPs) and signaling transfer points (STPs) and transmit signaling messages.

LMSP Linear Multiplex Section Protection

Local Area Network A network formed by the computers and workstations within the coverage of a few squarekilometers or within a single building. It features high speed and low error rate. Ethernet,FDDI, and Token Ring are three technologies used to implement a LAN. Current LANsare generally based on switched Ethernet or Wi-Fi technology and running at 1,000 Mbit/s (that is, 1 Gbit/s).

Loopback A troubleshooting technique that returns a transmitted signal to its source so that thesignal or message can be analyzed for errors.

Lower subrack The subrack close to the bottom of the cabinet when a cabinet contains several subracks.

LSR See Label Switching Router

M

Maintenance Point Maintenance Point (MP) is one of either a MEP or a MIP.

Merge Point Merge Point. The LSR where one or more backup tunnels rejoin the path of the protectedLSP downstream of the potential failure. The same LSR may be both an MP and a PLRsimultaneously.

MP See Merge Point

MP See Maintenance Point

MPLS See Multi-Protocol Label Switch

Multi-Protocol LabelSwitch

A technology that uses short tags of fixed length to encapsulate packets in different linklayers, and provides connection-oriented switching for the network layer on the basis ofIP routing and control protocols. It improves the cost performance and expandability ofnetworks, and is beneficial to routing.

N

N63E cabinet A cabinet which is 600 mm in width and 300 mm in depth, compliant with the standardsof the ETSI.

NE See network element

network element A network element (NE) contains both the hardware and the software running on it. OneNE is at least equipped with one system control board which manages and monitors theentire network element. The NE software runs on the system control board.

Network to NetworkInterface

This is an internal interface within a network linking two or more elements.

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NNI See Network to Network Interface

O

OAM See Operation, Administration and Maintenanc

ODF See Optical Distribution Frame

Operation,Administration andMaintenanc

Operation, Administration and Maintenance. A group of network support functions thatmonitor and sustain segment operation, activities that are concerned with, but not limitedto, failure detection, notification, location, and repairs that are intended to eliminate faultsand keep a segment in an operational state and support activities required to provide theservices of a subscriber access network to users/subscribers.

Optical DistributionFrame

A frame which is used to transfer and spool fibers.

P

packet 1. A sequence of binary digits including data and call control signals that is switched asa composite whole. The data, call control signals, and possibly error control information,are arra nged in a specific format. 2. A short block of data of fixed length and destinationinformation. It is the information transmission unit of the packet switching network. Themaximum length of the information packet reaches 8000 bit. The information packet canbe tranfered from one metwork to another network. 3. Data packets and local packets.Logical grouping of information that includes a header containing control informationand (usually) user data. Packets are most often used to refer to network layer units ofdata.

Packet over SDH/SONET

A MAN and WAN technology that provides point-to-point data connections. The POSinterface uses SDH/SONET as the physical layer protocol, and supports the transport ofpacket data (such as IP packets) in MAN and WAN.

PCB See Printed Circuit Board

PDU See Power Distribution Unit

PDU Protocol Data Unit

Point-to-Point Protocol A protocol on the data link layer, provides point-to-point transmission and encapsulatesdata packets on the network layer. It is located in layer 2 of the IP protocol stack.

POS See Packet over SDH/SONET

Power DistributionUnit

The power distribution unit performs AC or DC power distribution.

PPP See Point-to-Point Protocol

Printed Circuit Board A board used to mechanically support and electrically connect electronic componentsusing conductive pathways, tracks, or traces, etched from copper sheets laminated ontoa non-conductive substrate.

Pseudo wire An emulated connection between two PEs for transmitting frames. The PW is establishedand maintained by PEs through signaling protocols. The status information of a PW ismaintained by the two end PEs of a PW.

PTN Packet Transport Network

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PW See Pseudo wire

R

Radio NetworkController

A device used in the RNS to control the usage and integrity of radio resources.

RNC See Radio Network Controller

route A route is the path that network traffic takes from its source to its destination. In a TCP/IP network, each IP packet is routed independently. Routes can change dynamically.

S

SDH See Synchronous Digital Hierarchy

signal cable Common signal cables cover the E1cable, network cable, and other non-subscriber signalcable.

Synchronous DigitalHierarchy

SDH is a transmission scheme that follows ITU-T G.707, G.708, and G.709. It definesthe transmission features of digital signals such as frame structure, multiplexing mode,transmission rate level, and interface code. SDH is an important part of ISDN and B-ISDN. It interleaves the bytes of low-speed signals to multiplex the signals to high-speedcounterparts, and the line coding of scrambling is only used only for signals. SDH issuitable for the fiber communication system with high speed and a large capacity sinceit uses synchronous multiplexing and flexible mapping structure.

T

T63 cabinet A cabinet which is 600 mm in width and 300 mm in depth, compliant with the standardsof the ETSI.

TPS See Tributary Protection Switch

Tributary ProtectionSwitch

Tributary protection switching, a function provided by the equipment, is intended toprotect N tributary processing boards through a standby tributary processing board.

Tunnel A channel on the packet switching network that transmits service traffic between PEs.In VPN, a tunnel is an information transmission channel between two entities. The tunnelensures secure and transparent transmission of VPN information. In most cases, a tunnelis an MPLS tunnel.

U

Upload An operation to report some or all configuration data of an NE to the T2000. Theconfiguration data then covers the configuration data stored at the T2000 side.

Upper subrack The subrack close to the top of the cabinet when a cabinet contains several subracks.

upward cabling Cables or fibres connect the cabinet with other equipment from the top of the cabinet.

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V

Virtual Local AreaNetwork

A logical grouping of two or more nodes which are not necessarily on the same physicalnetwork segment but which share the same IP network number. This is often associatedwith switched Ethernet.

VLAN See Virtual Local Area Network

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