p channel mosfet:

8/3/2019 P Channel MOSFET:

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P-channel MOSFET:

Threshold voltage Vt is negative


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Circuit Symbol for P-channel MOSFET:

a) Circuit symbol for the p-channel

enhancement-type MOSFET

(b) Modified symbol with an

arrowhead on the source lead.

(c) Simplified circuit symbol for the

case where the source is connected tothe body.

(d)

(d) PMOS symbol used in digital

circuits.


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vGSvGS-Vt (linear or triode region)

vDSvGS-Vt (saturation)


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)1(21)()( 2

= DSDSGSoxpD vvVtv

LWCi

Where, rDS is linear resistance.

If vDSvGS-Vt (Saturation region )from equation (1)

)2(2

)()(

2

=Vtv

L

WCi GSoxpD

If vDS>vGS-Vt (triode region ):

If |vDS| is sufficiently small, we obtain iD-VDS characteristic near origin:

)()(

1' VtvL

Wk

ivr

GSpD

DSDS

==

DSGSpD vVtvL

Wki ))((' =

On verge of saturation: replace VGS-Vt=VDS in either region equation

(as shown by dashed line)

2)(

2

DSoxpD

v

LWCi =


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Complimentary MOS or CMOS:


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Table 4.1

Large-signal equivalent-circuit model of an n-channel and p-

channel MOSFET operating in the saturation region:


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Design an amplifier of gain 30 v/v

Choose the device

Set DC bias

Choose a circuit topology

Design

Analyse

Re-design

Aim


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Where to bias? Max gain-------MAX IDRD------------MAX ID

Min distortion

ID= f (VGS)------SATURATION REGION

Max current, ID captures variations of VGS faithfully

ID= F (VGS, VDS)-----------LINEAR REGION

Min current, ID

varies with VGS

, VDS

---(extra

variation)


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Transfer characteristics

VVVV

mAKR

VVI

KRletVV

VVVV

oVtGSQ

D

DSDDD

DDS

tDD

816.1816.01

333.018

410

18,4

1,10

=+=+=

=

=

=

==

==


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Output characteristicload line

)(, ID

DDDDDSO

vfiwhere

iRVvv

=

==

)1

(

1

D

DS

DD

DDD

R

slopewithlineloadofequation

vRR

Vi

=

=


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Example 4.8.

vGS1=1.891-1.816=0.075V=75mV

vGS2=1.816-1.741=0.075V=75mV


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Example 4.8. At vGS=1.891V , iD=0.397mA

At vGS=1.816V , iD=0.333mAAt vGS=1.741V , iD=0.275mA

iD1=0.397-0.333

=0.064mAiD2=0.333-0.275

=0.058mA

This Shows non-linearity.At vGS=1.891V , Vo=2.85V

At vGS=1.816V , Vo=4V

At vGS=1.741V , Vo=5.05V Vo1=4-2.85=1.15V

Vo2=5.05-4=1.05V

This shows non- linearity.


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Operation as a Switch:

When vI


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Selecting an appropriate location for bias point Q:


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Bias point Q1, too close to VDD: (RD too small)

does not leave sufficient room for positive signal swing atthe drain

occurs when vgs decreases further

can amplify only positive input cycles.

output signal will be distorted

Bias point Q2 is too close to the boundary of the triode

region: (RD too Large)

might not allow for sufficient negative signal swing

occurs when vgs increased further

can amplify only negative input cycles

p channel mosfet:

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