pf correction using sepic

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POWER FACTOR CORRECTION BY SEPIC CONVERTER A PROJECT REPORT Submitted by SOUMYA DASH – 0911014029 In partial fulfilment for award of degree Of BACHELOR OF TECHNOLOGY IN ELECTRICAL AND ELECTRONICS ENGINEERING UNDER THE GUIDANCE OF ALOK KUMAR MISHRA INSTITUTE OF TECHNICAL EDUCATION & RESEARCH SIKSHA ‘O’ ANUSANDHAN UNIVERSITY: ORISSA April - 2013 1

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Page 1: PF correction using SEPIC

POWER FACTOR CORRECTION BY SEPIC CONVERTER

A PROJECT REPORT

Submitted by

SOUMYA DASH – 0911014029

In partial fulfilment for award of degree

Of

BACHELOR OF TECHNOLOGY

IN

ELECTRICAL AND ELECTRONICS ENGINEERING

UNDER THE GUIDANCE OF

ALOK KUMAR MISHRA

INSTITUTE OF TECHNICAL EDUCATION & RESEARCH

SIKSHA ‘O’ ANUSANDHAN UNIVERSITY: ORISSA

April - 2013

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SIKSHA ‘O’ ANUSANDHAN UNIVERSITY: ORISSA

BONAFIDE CERTIFICATE

Certified that this project report “POWER FACTOR CORRECTION USING SEPIC CONVERTER” is

the bonafide work of “SOUMYA DASH” who carried out the project work under my supervision.

SIGNATURE: SIGNATURE:

PROF. PRAVAT KUMAR ROUT ALOK KUMAR MISHRA

HEAD OF DEPARTMENT SUPERVISOR

Electrical and electronics engineering, Assistant professor,

Department of EEE,ITER, Electrical and electronics engineering

SOA University, Deaprtment of EEE, ITER

Bhubaneswar-751030 SOA University,

Bhubaneswar-751030

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ACKNOWLEDGEMENT

I avail this opportunity to express my deep sense of gratitude and sincere thanks to Alok Kumar Mishra, Asst. Professor,

Electronics and Electrical Engineering Department, Institute of Technical Education and Research for invaluable guidance

rendered to me during the course of my work. His constant encouragement and painstaking efforts have been the sole

endeavors to bring my dissertation work in present form.

I thank all the teaching and non teaching staff members of the department who have contributed directly or indirectly in

successful completion of my dissertation work.

I am extremely grateful to friends and well-wishers for their candid help, meaningful suggestions and persistent

encouragement given to me at different stages of my work.

Finally, I would like to say that I am indebted to my parents for everything that they have given to me. I thank them for the

sacrifices they made so that I could grow up in a learning environment. They have always stood by me in everything I have

done, providing constant support, encouragement and love.

Soumya Dash

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ABSTRACT

Power electronic devices with front-end rectifier are widely used in industry,

commerce and transportation, which generate current harmonics, produce power

pollution and result in low power factor. Though there are several proposed

solutions to this, SEPIC converter was the most successful one. But the

conventional SEPIC converters suffer from high switching losses. Hence in this

project, a new modified SEPIC converter is proposed to achieve unity power

factor at the mains side with greater efficiency. The switching loss is reduced by

applying soft switching topology i.e. zero voltage switching (ZVS). A prototype will

be designed, analyzed and implemented along with required software

simulations to establish the thought.

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LIST OF TABLES

Table Table Description PageNo.

7.1 rule base for working of FIS

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LIST OF FIGURES

Figure No. Description PageNo.

2.1 relation between voltage, current ,power and 10

average power.

2.2 relation between the three powers 10

2 peak current control scheme 12

2.3 average current control scheme 14

2.4 Hysterisis current control scheme 15

3.1 circuit describing the effect of harmonics on power 19

Factor

3.2 waveform describing the pulsed nature of input line 19

current

4.1 Schematic diagram of sepic converter 22

4.2 Circuit describing the mode 1 operation 24

Of sepic converter

4.3 Circuit describing mode 2 operation of 25

Sepic converter

5.1 (a) Basic buck boost type PFC 32

5.1 (b) Series connected buck-boost type PFC circuit 33

5.1 (c) Cuk topology 33

5.1 (d) Sepic topology 34

5.2 Operating sequences: electrical configuration 35

when Q is turned-on (a), when Q is turned-off

while D in on (b), when Q and D arc both off(c).

5.3 Reactive component settings 39

5.4 circuit of closed loop control 41

6.1 simulation model of ideal sepic converter 47

6.2 & 6.3 Output 48

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6.4 Simulation model of sepic (open loop) converter 49

6.5 Output waveform - input current and voltage 50

6.6 Output waveform – output voltage 51

6.7 FFT analysis 51

6.9 Simulation model of sepic (closed loop) converter 52

6.10 output-output voltage 53

6.11 output current 53

6.12 waveform of input current and voltage 54

6.13 FFT analysis 54

6.14 closed loop control with load disturbance 55

6.16 waveform of input voltage and current 56

6.17 waveform of output voltage 57

6.18 FFT analysis 57

6.19 closed loop control with reference change 58

6.20 waveform of input voltage and current 59

6.21 waveform of output voltage 60

6.22 FFT analysis 60

6.23 Closed loop control with supply change 61

6.24 waveform of input voltage and current 62

6.25 waveform of output voltage 62

6,26 FFT analysis 63

6.27 circuit diagram of average current control 64

For power factor correction

6.28 waveform for average current control 64

6.29 simulation of average current control 66

6.30 waveform of input current and voltage 67

6.31 waveform of output voltage 67

6.32 FFT analysis 68

6.33 simulation of average current control by closed loop 69

6.34 waveform for input voltage and current 70

6.35 waveform for output voltage 70

6.36 FFT analysis 71

6.37 simulation model of power factor correction using 73

Sepic converter with three phase supply

6.38 waveform for input current and voltage 74

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6.39 waveform for output voltage 74

6.40 FFT analysis 75

7.1 diagram describing the fuzzy control system 77

7.2 diagram representing various membership functions 79

7.3 FIS editor 81

7.4 Membership Function for Voltage Error 82

7.5 Membership Function of Change in error 82

7.6 Membership function of change in frequency 83

7.7 (a) Rule editor 83

7.7(b) Rule viewer 84

7.8 simulation of the circuit for power factor correction 84

Using fuzzy logic controller

7.9 output waveform for input current and voltage 85

7.10 waveform for output voltage 85

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TABLE OF CONTENTS

CHAPTER TITLE PAGE NO.

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CHAPTER-1

INTRODUCTION

Power electronic devices with front-end rectifier are widely used in industry, commerce and transportation,

which generate current harmonics, produce power pollution and result in low power factor. Therefore, there are

international harmonic standards (such as: IEC-1000 and IEC-555) to confine power pollution. In order to meet

the requirements of the standards, the input current waveforms of a device have to be shaped by a PFC to

eliminate current harmonics and improve power factor.

The PFCs can be briefly classified into two types. One is passive PFC, the other is active one. Passive-

type PFC is mainly constructed by inductors and capacitors. Low efficiency, heavy weight and large volume are

its major disadvantages. Besides, power factor merely is improved to around 0.8. For active type, active switch,

diode and energy-stored component are used to achieve near unity power factor, of which topologies have Buck,

Boost, Buck-Boost, Cuk, and SEPIC. The Buck-type PFC can obtain an output voltage smaller than ac input

voltage. However, only a power factor of 0.95 is met. The Boost structure attains better power factor correction

feature but its output voltage is higher than ac-side voltage and power components withstand high voltage

stresses. The Buck-Boost PFC can obtain an output voltage magnitude either larger or smaller than the input.

Nevertheless, there is a polarity reversal on the output and an isolation driver for active switch is required.

Among the Cuk, and SEPIC PFC topologies, the SEPIC type possesses better performance in total harmonics

distortion (THD), efficiency and power factor correction. In this project I have designed a SEPIC converter to

improve the input power factor.

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CHAPTER-2

BASIC PRINCIPLES OF THE PROJECT

There are several ways to define power factor of a load. It is the cosine of the phase angel (Φ) between the load

voltage and load current.

Fig 2.1

It is also the ratio of the real power or true power to the apparent power of the load.

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Fig 2.2

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2.1 NEED FOR POWER FACTOR CORRECTION:

The power drawn by a load from AC Mains depends not only on mains Voltage and current but also on the power

factor of the load.

Power drawn by a single phase load, W=VICosΦ

Where, V = Mains Voltage across the load

I =Load current

CosΦ=Power factor of the load i.e. the Cosine of the phase angle between the load voltage and load current.

As our supply mains voltage is maintained constant, power drawn by the load only depends on the load

current and power factor from the above equation , it is clear that for a particular load if the power falls,

the load current increases which results in higher current from supply mains and higher line loss.

Higher line loss reduces the transmission efficiency. Power electronic devices with front end

rectifier which is widely used in industry takes high pulsating current from mains and produces severe

current harmonics. This causes line pollution and reduces the power factor. Hence in order to meet the

international standards we must prevent the line harmonics and improve the power factor. That is why

there always a need of power factor correction and power factor correction circuit.

3.3 VARIOUS METHODS FOR POWER FACTOR CORRECTION :

There are two types of power factor correction (PFC) circuits. One is passive power factor correction

circuit and the other is active power factor correction circuit. Passive-type PFC is mainly constructed

by inductors and capacitors. Low efficiency, heavy weight and large volume are its major

disadvantages. Besides, power factor merely is improved to around 0.8. For active type, active

switch, diode and energy-stored component are used to achieve near unity power factor,

of which topologies have Buck, Boost, Buck-Boost, Cuk, ZETA, SEPIC and Fly back.

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2.2 REVIEW OF PFC CONTROL TECHNIQUES:

2.2.1 peak current control:

The basic scheme of the peak current controller is shown in Fig.2, together with a

typical input current waveform.

As we can see, the switch is turned on at constant frequency by a clock signal,

and is turned off when the sum of the positive ramp of the inductor current (i.e. the

switch current) and an external ramp (compensating ramp) reaches the sinusoidal

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current reference. This reference is usually obtained by multiplying a scaled replica of

the rectified line voltage v g times the output of the voltage error amplifier, which sets

the current reference amplitude. In this way, the reference signal is naturally

synchronized and always proportional to the line voltage, which is the condition to

obtain unity power factor.

As Fig.2 reveals, the converter operates in Continuous Inductor Current Mode

(CICM); this means that devices current stress as well as input filter requirements

are reduced. Moreover, with continuous input current, the diodes of the bridge

can be slow devices (they operate at line frequency). On the other hand, the hard

turn-off of the freewheeling diode increases losses and switching noise, calling

for a fast device.

Advantages and disadvantages of the solution are summarized hereafter.

Advantages :

Constant switching frequency;

Only the switch current must be sensed and this can be accomplished by a current

transformer, thus avoiding the losses due to the sensing resistor;

No need of current error amplifier and its compensation network;

Possibility of a true switch current limiting.

Disadvantages :

Presence of sub harmonic oscillations at duty cycles greater than 50%, so a compensation

ramp is needed;

Input current distortion which increases at high line voltages and light load and is worsened

by the presence of the compensation ramp [4-5];

Control more sensitive to commutation noises

2.1.2 Average current control:

Another control method, which allows a better input current waveform, is the average current

control represented in Fig.2.3 [4,7-10]. Here the inductor current is sensed and filtered by a

current error amplifier whose output drives a PWM modulator. In this way the inner current loop

tends to minimize the error between the average input current ig and its reference. This latter is

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obtained in the same way as in the peak current control. The converter works in CICM, so the

same considerations done with regard to the peak current control can be applied.

Fig 2.3

Advantages :

Constant switching frequency;

No need of compensation ramp;

Control is less sensitive to commutation noises, due to current filtering;

Better input current waveforms than for the peak current control since, near the zero crossing

of the line voltage, the duty cycle is close to one, so reducing the dead angle in the input current.

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Disadvantages :

A current error amplifier is needed and its conpensation network design must take into

account the different converter operating points during the line cycle.

Inductor current must be sensed;

2.1.3 Hysteresis control:

This type of control in which two sinusoidal current references IP,ref, IV,ref are

generated, one for the peak and the other for the valley of the inductor current.According to this

control technique, the switch is turned on when the inductor current goes below the lower

reference IV,ref and is turned off when the inductor current goes above the upper reference

IP,ref, giving rise to a variable frequency control .Also with this control technique the converter

works in CICM.

Fig 2.4

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Advantages :

No need of compensation ramp;

Low distorted input current waveforms.

Disadvantages :

Variable switching frequency;

Inductor current must be sensed;

Control sensitive to commutation noises

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CHAPTER-3

HARMONIC DISTORTION AND

POWER FACTOR CORRECTION

3.1 INTRODUCTION:

One of the causes of low power factor is also related to the total harmonic distortion that is

caused by the non linear loads like rectifiers or in other words when we draw current from the

A.C mains , the line current that is drawn has some harmonic components in it. Due to this

the net power factor of the resultant is very low due to which many problems arise.

In case of the electrical power system, loads with low power factor draws more current than

loads with high power factor for the same amount of useful power transferred. The higher

currents increase the energy lost in the distribution system, and require larger wires and other

equipment. Because of the costs of larger equipment and wasted energy, electrical utilities

will usually charge a higher cost to industrial or commercial customers where there is a low

power factor. Power factors below 1.0 require a utility to generate more than the minimum

volt-amperes necessary to supply the real power (watts). This increases generation and

transmission costs. For example, if the load power factor were as low as 0.7, the apparent

power would be 1.4 times the real power used by the load. Line current in the circuit would

also be 1.4 times the current required at 1.0 power factor, so the losses in the circuit would be

doubled (since they are proportional to the square of the current). Alternatively all

components of the system such as generators, conductors, transformers, and switchgear

would be increased in size (and cost) to carry the extra current.

3.2 Some of the important definitions related to this topic are:

HARMONICS: A harmonic is a sinusoidal component of the periodic wave or quantity having a

frequency that is an integral multiple of the fundamental frequency. An A.C periodic

voltage or current can be represented by a fourier series of the pure sinusoidal waves

which contains the basic or fundamental frequency and iots multiples called

harmonics.

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HARMONIC DISTORTION:

It refers to the distortion factor of the voltage or current waveform with respect to the

pure sine wave.

DISTORTION FACTOR:

It is the ratio of the root mean square of the harmonic component to the root mean

square value of the fundamental quantity, expressed as a percentage of the

fundamental.

TOTAL HARMONIC DISTORTION:

This term is commonly used to define the voltage or the current distortion factor.

3.3 TOTAL HARMONIC DISTORTION:

Harmonic distortion is divided into two classes, voltage distortion and current distortion.

Since the voltage is common to all the loads in the system, any voltage distortion will result

in a corresponding current distortion assuming the source impedance is very low. On the

other hand current distortion results in voltage distortion only to the extent that the source

impedance provides a common coupling impedance.

The effects of the harmonic currenst from non linear loads are not widely

understood. Due to the low impedance of most power systems, the power system can

generally absorb significant amount of harmonic currents without converting then into

unacceptable voltage distortion levels.

3.4 SOURCES OF NON UNITY POWER FACTOR AND HARMONIC

DISTORTION:

Linear reactive loads draw power from the reactive source which is at the same frequency of

the power system. For the general linear passive network having voltage v=Vm sinwt and

resulting current i= Im sin(wt+Ө) then the instantaneous power is defined by P=vi and the

average value of power is P=0.5 Vm Im cos Ө. Here phase angle Ө defines the power factor

in linear systems.

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Non linear loads generally do not cause reactive power to flow at the fundamental

line frequency. They can however draw high RMS current and can add to distribution system

losses for a given load. The non linear nature of these loads then draws non pure sine wave

currents thus causing harmonics of the fundamental current to be present. Since harmonics

distortion is caused by non linear elements connected to the power system, any device with

non linear characteristics will cause harmonic distortion.

Switched mode power supplies, uninterruptible power supplies and electronic light

ballasts may have low power factor and can generate harmonic distortion. This is not because

they are high frequency switching converters but rather because the input stage is usually a

low cost rectifier/ capacitor filter.

Fig 3.1

In this type of loads, causes current to be drawn from the AC line when the AC voltage is

higher than the rectified voltage of the input filter capacitor.

Fig 3.2

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The input filter capacitor is then charged to the peak of the line minus some voltage drop

from semi from the semiconductors and internal and external source impedances.

The non linear loads reduce power factor not because of the phase shift of the

fundamental current with respect to the voltage but because higher RMS current caused by

the pulsed nature of the input current. That is, the power is taken from the source only during

a short period of time near the peak of the voltage wave. Since total power factor is defined

as the real power divided by the product of the rms line voltage and current, the higher line

current reduces power factor.

Harmonic power factor is related to harmonic distortion and can be calculated by

the equation :

Power factor=1/(1+THD)2

The total harmonic distortion can be calculated by the following formula:

THD= ( I 12+ I2

2+…+ I n2 )/n

So more the total harmonic distortion, less will be the total power factor.

3.4EFFECT ON POWER FACTOR NETWORK AND CONNECTED EQUIPMENTS:

The effects of harmonic distortion vary with the application. The degree to which the

harmonics can be tolerated is determined by the susceptibility of the load to them. The

presence of harmonic currents or voltages produces magnetic and electric fields that may

impair the satisfactory performance of communication systems susceptible to the disturbance

by virtue of their proximity. The disturbance is a function of both amplitude and frequency of

the harmonic components.

Metering and instrumentation are affected by the harmonic components. Induction

disk devices such as watt hour meters normally see only the fundamental current, but

erroneous operation resulting in positive and negative errors are possible with harmonic

distortion present , depending on the type of meters and harmonics involved.

Power systems are affected in various ways and the extent of the influence is

application and configuration dependent. Three common configurations to power load are

a) Single phase (120V AC or 220 V AC phase to neutral)

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b) Single phase loads connected phase to phase

c) Three phase connected loads

It is possible to eliminate harmonics in the design of the product using active or

passive means and products are available with power factor correction . passive harmonic

distortion correction filters are available also which remove the harmonics. This can be done

by the inductor-capacitor filters. The drawback with this technique is they require large

reactive components and the filters are tuned to filter a specific frequency ad hence become

less effective as component values change over time.

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CHAPTER-4

BASIC SEPIC Converter

4.1 INTRODUCTION:

Single-ended primary-inductor converter (SEPIC) is a type of DC-DC converter that allows

the electrical potential (voltage) at its output to be greater than, less than, or equal to that at its

input; the output of the SEPIC is controlled by the duty cycle of the control transistor. A

SEPIC is similar to a traditional buck-boost converter, but has advantages of having non-

inverted output (the output voltage is of the same polarity as the input voltage), the isolation

between its input and output (provided by a capacitor in series), and true shutdown mode:

when the switch is turned off, its output drops to 0 V. SEPICs are useful in applications in

which a battery voltage can be above and below that of the regulator's intended output. For

example, a single lithium ion battery typically discharges from 4.2 volts to 3 volts; if other

components require 3.3 volts, then the SEPIC would be effective.

Figure 4.1: Schematic of SEPIC

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4.2 Circuit operation:

The schematic diagram for a basic SEPIC is shown in Figure2. 1. As with other switched mode power supplies (specifically DC-to-DC converters), the SEPIC exchanges energy between the capacitors and inductors in order to convert from one voltage to another. The amount of energy exchanged is controlled by switch S1, which is typically a transistor such as a MOSFET; MOSFETs offer much higher input impedance and lower voltage drop than bipolar junction transistors (BJTs), and do not require biasing resistors (as MOSFET switching is controlled by differences in voltage rather than a current, as with BJTs).

A SEPIC is said to be in continuous-conduction mode ("continuous mode") if the current

through the inductor L1 never falls to zero. During a SEPIC's steady-state operation, the

average voltage across capacitor C1 (V c 1) is equal to the input voltage (Vin). Because

capacitor C1 blocks direct current (DC), the average current across it ( I c1) is zero, making

inductor L2 the only source of load current. Therefore, the average current through inductor

L2 (I L 2) is the same as the average load current and hence independent of the input voltage.

Looking at average voltages, the following can be written

Vin =V L1 + V c 1+ V L2

The average currents can be summed as follows:

I D1 = I L 1 − I L 2

MODE-I

When switch S1 is turned on, current I L 1 increases and the current I L 2

increases in the negative direction. (Mathematically, it decreases due to

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arrow direction.) The energy to increase the current I L 1comes from the input source. Since S1 is a short while closed, and the instantaneous voltageV c 1 is approximately Vin, the voltageV L2 is approximately − Vin. Therefore, the capacitor C1 supplies the energy to increase the magnitude of the current inI L 2 and thus increase the energy stored inL2.

Figure 4.2: With S1 closed current increases through L1 (green) and C1 discharges Increasing current in L2 (red)

S1 is on at t=0

V L1 = V ¿

L1

di L1

dt =V ¿

iL1(t) = V ¿

L1t +¿ I L1(0)

At t = DT iL1(t) = I L1(DT)

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⇒ I L1(DT) = V ¿

L1DT +¿ I L1(0) ………………(2.1)

If we assume average voltage across C1has no ripple then its average value is

V ¿ = V L1+¿ V C1

+¿ V L2

⇒ V C1 = V ¿

⇒V L2 = V C1 = V ¿

L2

diL2

dt =V ¿

iL2(t) = V ¿

L2t +¿ I L2(0)

at t=DT

I L2(DT) = V ¿

L2DT +¿ I L2(0) ………………(2.2)

MODE-II

When switch S1 is turned off, the current I c1becomes the same as the current I L 1, since inductors do not allow instantaneous changes in current. The current I L 2 will continue in the negative direction, in fact it never reverses direction. It can be seen from the diagram that a negative I L 2 will add to the current I L 1 to increase the current delivered to the load. Using

Kirchoff's Current Law, it can be shown that I D1 = I c1 − I L 2. It can then be concluded, that while S1 is off, power is delivered to the load from both L2 and L1., howeverC1 is being charged by L1 during this off cycle, and will in turn recharge L2during the on cycle.

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Figure 4.3: With S1 open current through L1 (green) and current through L2 (red)

When switch is open at t = DT

V L1 = −V 0 (&V C1 avg = V ¿ )

L1

di L1

dt =−V 0

⇒ iL1(t) = −V 0

L1¿t-DT) +¿ I L1(DT)

At t = T iL1(t) = I L1(0)

⇒ I L1(0) = −V 0

L1(1−D)T +¿ I L1(DT) ………………(2.3)

V L2 = −V 0 L2

diL2

dt =−V 0

iL2(t) = −V 0

L2¿t-DT) +¿ I L2(DT)

at t = T iL2(t) = I L2(0)

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I L2(0) = −V 0

L2(1−D)T +¿ I L2(DT) ………………(2.4)

From equation (2.1) & (2.3)

I L1( DT )−¿ I L1

(0 ) = V ¿

L1DT

I L1( DT )−¿ I L1

(0 ) = V 0

L1(1−D)T

Equating the above equation

V 0

V ¿= D

1−D

or from equation (2.2) & (2.4)

IL2( DT )−¿ I L2

(0 ) = V ¿

L2DT

IL2( DT )−¿ I L2

(0 ) = V 0

L2(1−D)T

Equating the above equation

V 0

V ¿= D

1−D

Average input current is same as average inductor current L1 as average current across the

capacitor ic1 is zero.

I inavg = 1T [T × I L1

( 0 )+12

× T × ( I L1( DT )−I L1

(0 ) )]

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I inavg = I L1

( DT )+ I L1(0 )

2

Average output current is same as average inductor current L2

I 0 = 12 [ I L2

( DT )+ I L2(0 ) ]

Average input power is same as average output power

P0 = P¿

V 0 I0=V ¿ I ¿

⇒I ¿

I 0= D

1−D

From equation (2.1) & (2.5)

I L1( DT )−¿ I L1

(0 ) = V ¿

L1DT

I L1( DT )+¿ I L1

(0 ) = 2I ¿ = 2 D I 0

1−D =

2D V 0

R (1−D ) =

2V ¿ D2

R ( 1−D2 )

Solving I L1( DT ) = [ D2

(1−D )2 R + DT2 L1 ]V ¿

I L1(0 ) = [ D2

(1−D )2 R − DT2 L1 ]V ¿

To calculate Lcrit I L1(0 ) = 0

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L1 crit = (1−D )2 RT2 D

IL2( DT )+¿ I L2

(0 ) = 2I 0 = 2 V 0

R =

2V ¿ D(1−D )

I L2( DT )−¿ I L2

(0 ) = V ¿

L2DT

Solving I L2( DT ) = V ¿ [ D

R (1−D )+ DT

2 L2 ]

I L2(0 ) = V ¿ [ D

R (1−D )− DT

2L2 ] To find L2crit I L2

(0 ) = 0

L2 crit = (1−D ) RT

2

Voltage and current across C1 are given by:

y = −∆ I L2

DTt−¿ I L2

(0 )

∆I L2 = I L2( DT )−¿ I L2

(0 )

= inductor current ripple

vc1( t ) = 1

c1∫

0

t

ydt+¿ vc1(0 ) ¿

= 1c1∫

0

t [−∆ I L2

DTt−I L2

(0 )]dt+¿vc1( 0 )¿

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= −1c1

[ ∆ I L2

DTt 2

2+ IL2

(0 ) t ]0

t

+vc1(0 )

at t = DT vc1( t )=vc1

( DT )

vc1( DT ) = −1

c1[ ∆ I L2

DT( DT )2

2+ I L2

(0 ) DT ]0

t

+vc1(0 )

vc1(0 )−vc1

( DT ) = ∆V c1 = 1c1

DT [ I L2( DT )−IL2

(0 )2

+ I L2(0 )]

∆V c1 = DTC1

I 0

∆V c1 = DTC1

V 0

R

⇒ ∆ V c1

V 0 =

DTRC 1

Voltage and current across C2 is

ic2 = −I 0 0 < t < DT

ic2 = iL1+ iL2

−I 0 DT < t < T

vc2( t ) =

1c2

∫−∞

t

ic2(t ) dt

vc2( t ) =

1c2

∫0

t

ic2(t ) dt+vc2

(0 )

= 1c2

−I 0t+vc2(0 )

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at t= DT vc2(t )=vc2

( DT )

∆V C2 = vc2(0 )−vc2

( DT )=I 0

C2DT

= V 0 DT

RC2

⇒ ∆ V c2

V 0 =

DTRC 2

→ output voltage ripple.

Because the potential (voltage) across capacitor C1 may reverse direction

every cycle, a non-polarized capacitor should be used. However, a polarized tantalum or electrolytic capacitor may be used in some cases, because the potential (voltage) across capacitor C1will not change unless the switch is closed long enough for a half cycle of resonance with inductor L2, and by this time the current in inductor L1 could be quite large.The capacitor C ¿ is required to reduce the effects of the parasitic inductance and internal resistance of the power supply. The boost/buck capabilities of the SEPIC are possible because of capacitor C1 and inductor L2. Inductor L1 and switch S1create a standard boost converter, which generate a voltage (V s 1) that is higher than V ¿, whose magnitude is determined by the duty cycle of the switch S1. Since the average voltage across C1 is V ¿, the output voltage (V 0) is V s 1 - V ¿. If V s1 is less than double V ¿, thenthe output voltage will be less than the input voltage. If V s 1 is greater than double V ¿, then the output voltage will be greater than the input voltage.

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CHAPTER-5

PRACTICAL DESIGN OF A

SEPIC POWER CORRECTOR

5.1 Introduction: Compared to conventional buck or boost converters, SEPIC topology allows a low current

ripple at the input for a relatively low level of the DC-bus voltage. Consequently, the high

frequency filter needed at the AC-side of a buck converter is avoided, and the high voltage

stresses applied on the switches are significantly reduced with respect to the boost converter.

The converter is integrated as a power factor correction circuit at the DC-end of a single-

phase diode bridge. Based on the averaged model of the converter, a Pulse-Width- Modulated

(PWM) control algorithm is developed in order to ensure a unity power factor at the AC-

source side and a regulated voltage at the DC-load side.

High power quality achievement is increasingly required for the power supply systems

in order to comply with the international standards. For this purpose, and especially for

single-phase low power applications, switch-mode DC-DC converters, commonly known as

Power Factor Correction (PFC) circuits, are designed in order to ensure a high power factor at

the mains side, and to emulate a purely resistive operation of the diode-bridge-based frontend

rectifier.

5.1.1 Buck-Boost Converters

There are some typical applications, which require buck and boost operations in the

same converter, therefore, an additional classification of buck–boost converter is

made.

It is a combination of diode rectifier with buck–boost dc–dc converters.

Since buck–boost converters are developed in non-isolated and isolated topologies, a

large number of configurations is also reported, such as a combination of buck and

boost or vice versa, buck–boost, SEPIC, Cuk, etc.

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Fig.5.1(a) Basic buck-boost type PFC circuit

In the basic topology given in Fig. 3.1(a), shown above the inverted DC voltage

delivered at the output can vary theoretically between zero and an infinite value.

Similar to buck converter the presence of the switch in series with the DC source

induces a commutated current at the input and a discontinuous current mode operation

of the diode bridge when the circuit is used for PFC.

A high frequency shunt filter is to be inserted between the source and the diode bridge.

In order to avoid such problem, the configuration of Fig.3.1.(b)shown below that

consists of a series connection of a Buck and a Boost converters can be considered.

However, a smooth input current is obtained at the expense of a twice number of

switches.

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Fig.5.1 (b) Series connected buck-boost type PFC circuit

A more convenient solution that ensures a smooth input current by using a single

switch is shown either in Fig. 5.1(c) or Fig.5.1(d).

The Cuk converter (Fig.5.1(c)) and the Single Ended Primary Inductance Converter

(SEPIC) (Fig. 5.1(d))differ from each other at the output stage, where the free-wheel

diode and the output inductor are permutated, and the polarity of the output voltage is

inverted.

Fig.5.1(c) Cuk topology

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In case of buck-boost, Cuk there is a polarity reversal on the output and an isolation

driver for active switch is required.

Among buck-boost, Cuk and Sepic, the Sepic type possesses better performance in

total harmonic distortion (THD), efficiency and power factor correction.

Fig.5.1(d) Sepic topology

These IPQCs are extensively used in SMPSs, railway signalling, battery chargers,

UPSs; small-rating brushless ac motor drives, etc.

5.2 Operation Sequences and Switching-Function-Based Model:

The operating sequences of the SEPIC converter in the most general case of a

Discontinuous Current Mode (DCM) are given in Fig. 3.2. The circuit has three possible

configurations, depending on the state of the main switch Q and diode D. The third

configuration, where both Q and D are at their off-state, appears only when the current

(iL1+ iL2 )crosses zero, Otherwise, i.e. if the condition (iL1+ iL2 )> 0 always stands, only the first

two configurations exit in a switching period. In that case, the converter is said to operate in a

Continuous Current Mode (CCM), and the diode D will always conducts whenever the switch

Q is turned-off. :

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Fig. 5.2: Operating sequences: electrical configuration when Q is turned-on (a), when Q is

turned-off while D in on (b), when Q and D arc both off(c).

Following these considerations, we may describe analytically the operation of the

converter in the more general case by writing the equations (5.1)

L1

di L1

dt=sQ ∙ v¿+sQ∙ θ (iL 1+i L2 ) ∙ ( v¿−vc−v0 )+sQ ∙ θ (iL1+iL 2 )∙

L1

L1+L2∙ ( v¿−vc )

L2

diL2

dt=sQ ∙ vc−sQ ∙ θ (iL 1+i L2 ) ∙ v0−sQ ∙ θ (iL1+iL2 )∙

L2

L1+L2∙ ( v¿−vc )

Cdvc

dt = sQ ∙ iL 1−sQ ∙iL2 (5.1)

C0

dv0

dt = sQ ∙ θ (iL1+iL 2 )∙ (iL 1+ iL2 )−i0

where sQ denotes the switching function of switch Q, defined as:

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Page 40: PF correction using SEPIC

sQ =0 if Qis turned−off1if Qis turned−on (5.2)

θ is the threshold function defined as:

θ(z ) = 0 if z≤ 01 if z>0 (5.3)

sQ and θ their respective complements. Note that in CCM the θ (iL 1+iL2 ) term is always

equal to unity, and the mode(1) becomes simpler.

Moreover, the switching frequency of switch Q is either time-varying (if a hysteresis

flip-flop controller is used for the line current shaping) or fixed (if a saw-tooth-carrier-based

pulse-width modulator is used along with a continuous current controller). However, it will

be assumed in both cases, especially as far as the calculation of the reactive components L1,

L2, C and C0 .

3.3 Steady-State Operation for a Unity Power Factor Condition:

In a Unity Power Factor (UPF) operating condition, the converter and its control circuit

emulate a purely resistive load. The line current has, in this case, a sine-wave shape, in phase

with the AC source voltage. The DC current iL 1delivered by the diode bridge is a rectified

sine-wave signal and, thus, has the following expression:

iL1

¿ (t ) = I s √2 sin ω0 t (5.4)

Where Is represents the line current RMS-value and ω0the angular frequency of the

mains source. The asterisk (*) denotes that we are placed in the desired steady-state operating

regime. In addition, by neglecting the voltage ripple at the capacitors (which is justified by

choosing high enough values for C andC0 ) we may aIso write:

v0¿ (t ) ≅ v0

¿ (5.5)

and:

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vc¿ ( t ) ≅ vc

¿ = ⟨ v¿ ⟩ = 2√2π

V s (5.6)

Where V 0¿and V C

¿ designate respectively the static values of v0¿ ( t )and V c

¿ ( t ). In (5.6)v¿, is

the voltage at the DC-side of the diode rectifier. It is expressed by:

v¿ ( t ) = V s √2 sin ω0 t (5.7)

Where Vs denotes the mains voltage RMS-value.

Moreover, applying the state-space averaging technique in CCM mode (it is assumed

here that the condition(iL1+ iL2 ) > 0 always stands; this assumption will be justified later by a

suitable choice of inductorL2) yields the following low-frequency model of the converter,

given by(5.8)

L1

diL1

dt = vc−(1−d ) ∙ ( vc+v0 )

L2

diL2

dt = d ∙ vc−(1−d ) ∙ v0 (5.8)

Cdvc

dt = (1−d ) ∙ iL1−d iL2

C0

dv0

dt = (1−d ) ∙ (iL 1+i L2 )−i0

Where d (t ) is the duty cycle of the switch Q. Replacing iL 1 , v 0 , vc∧vcby their desired

expressions given respectively in (5.4), (5.5), (5.6) and (5.7) into the system (5.8) yields

expressions (5.9) and (5.l0)

d¿ ≅ 1−¿ ε V s√2sin ( 2ω0 t )−L1ω0 I s √2cos (ω¿¿0 t )V 0

¿+V C¿ ¿ (5.9)

iL2

¿ (t ) = I 0¿ + 2√2

π ∑k =1

∞ V s

k (4 k2−1)L2 ω0 sin (2 k ω0 t )−

L1

L2∙

2 I s

4 k2−1cos(2 kω¿¿0 t )¿ (5.10)

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Where

ϵ = +1 for 2 kπ<ω0 t<(2 k+1 ) π−1 for (2 k+1 ) π<ω0 t<2 (2 k+1 ) π ,

k ϵ Z (5.11)

and I 0¿ is the desired steady-state value of the DC load current i0. in the derivation of

expression (10), the Fourier series development ofεsin(ω0t ) and ε cos ω0 t has been used.

ε ∙sin(ω0t ) = 2π− 4

π ∑k =1

∞ 14 k2−1

cos(2 kω¿¿0 t )¿ (5.12)

ε ∙ cosω0t = 8π ∑

k =1

∞ 14 k2−1

sin(2 k ω0 t) (5.13)

Considering that we have in practice L1 ω0 I s≪V s, and that:

k( 4k2−1 )≫3 for k≥ 2 (5.14)

we may write approximately:

iL2

¿ (t ) ≅ I 0¿ +

2√2V s

3π L2 ω0sin (2 ω0 t) (5.15)

and it appears clearly that, for an increased value ofL2 , the validity of the assumption (

iL1

¿ (t )+iL2

¿ ( t )¿> 0 also increases, and the converter tends to operate in CCM. Furthermore, the

low-frequency expressions of andvc¿ and v0

¿ are given approximately by expressions (5.16)

and (5.17)

vc¿ (t ) ≅V c

¿+V c

¿

90 L2C ω02 ∙

15 V 0¿−V C

¿

V 0¿+V C

¿ cos(2ω¿¿0 t)−¿¿¿ I 0

¿

6 C ω0 ∙

3V 0¿+2V C

¿

V 0¿+V C

¿ sin(2ω0 t)

(5.16)

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v0¿ (t ) ≅V 0

¿−8 V c

¿

45 L2C0ω02 ∙

V C¿

V 0¿+V C

¿ cos(2 ω¿¿0 t)−¿¿¿ I0¿

6 C0 ω0 ∙

3V 0¿+2V C

¿

V 0¿+V C

¿ sin(2ω0 t)

(5.17)

3.4 Reactive Components Settings:

In order to choose the inductor, we have to evaluate first the current ripple at the switching

frequency in each inductor. For inductorL1, the current ripple is given in fig.5.3

fig.5.3

∆ iL1 , HF(t ) = [ tan(β)−tan (α )] ∙ d¿(t )f s (t ) (5.18)

with:

tan(α ) = ddt

(iL1

¿ ) tan(α) = v¿

L1

andf s ( t ) is the switching frequency. Combining expressions (5.4),(5.7) and (5.9) with (5.18)

we get equation(5.19).

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∆ iL1 , HF (t )

≅ ε ∙ V s √2sin (2 ω0 t )−L1 ω0 I s√2cos(ω¿¿0 t) ∙ V 0¿+V C

¿ −εV s √2 sin (2 ω0 t )+ε L1ω0 I s √2cos (ω¿¿0 t) L1 ∙ f s ( t ) ∙(V 0

¿+V C¿ )

¿¿

(5.19)

The maximum value of the product [ f s ( t ) ∙ ∆ iL1 , HF (t)] appears when:

v¿ (t )−¿ L1ddt [iL1

¿ ( t ) ] = V 0

¿+V C¿

2 (5.20)

In this case we gate:

[ f s (t ) ∙∆ iL1 , HF (t)]max = V 0

¿+V C¿

4 L1 (5.21)

which must be lower than [ f s (t ) ∙ ∆ iL1 , HF (t)]admissible. This leads to the setting of L1:

L1 ¿ V 0

¿+V C¿

4 [ f s ( t ) ∙ ∆ iL 1 ,HF (t)]admissible ≜ L1 ,min (5.22)

For the setting of inductor L2 , we refer to expression (5.15). The required value of L2

must guarantee a CCM operation of the converter, i.e. [iL1

¿ (t )+iL2

¿ ( t ) ]>0, ∀ t. Using expressions

(5.4) and (5.15), a sufficient condition for CCM is to have:

L2 ¿ V C

¿

3 ω0 I0¿ ≜ L2 ,min (5.23)

Concerning the capacitors C and, C0their determination is based on equations (5.16) and

(5.17) respectively. For L2≅ L2 ,min , we obtain after some mathematical manipulations:

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C ¿ 0.66 I 0

¿

ω0 (∆ vc )admissible √1+( 1.91 V 0¿+0.21 V C

¿

V 0¿+V C

¿ )2

≜ Cmin (5.24)

and:

C0 ¿ 0.95 I 0

¿

ω0 (∆ v0 )admissible √1+( 0.31V 0¿−0.86 V C

¿

V 0¿+V C

¿ )2

≜ C0 ,min (5.25)

3.5 Control System Design:

The control circuit is given in Fig. 5.4. It consists of two successive loops: the inner or

current one is designed to ensure the wave-shaping of the DC input current iL 1and,

consequently, the improvement of the input power factor, while the outer or voltage loop is

aimed to regulate the DC load voltage and to stabilize it around a desired set-point. The inner

controller is chosen to be a hysteresis flip-flop with a 0.4A width, and the outer regulator is a

linear Proportional-integral (PI) one represented by the transfer function H v (s ) , K i and K vare

scaIing gains. To ensure high stability of the control system, the outer loop is designed to be

enough slower than the inner one.

The input to the PI controller is the difference of the actual output voltage and the

reference voltage as set by the user. As this difference changes , required change is carried

out by the PI controller which helps to set the =output

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Fig 5.4

Numerical values are given as

Mains voltage RMS-value V s = 120V

Rated load power P0 = 1kW

Voltage reference V o¿ = 100V

Main frequency f o = 60Hz

DC inductors L1= 1mH, L2 = 10mH

Series inductors’ resistors RL1=0.1Ω,RL2=0.1Ω

DC Capacitors C=10mF,C0=10mF

Scaling Gains K i=1Ω,K v=1/1008

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Hysteresis width for current regulator h=0.4A

DC voltage regulator H v(s)=(4s+0.1)/3s

Voltage Filter F v(s)=300/(s2+40.426s+900)

CHAPTER-6

SOFTWARE DEVELOPMENT

6.1 SOFTWARE SIMULATION:

Software Simulation is based on the process of imitating a real phenomenon with a of

mathematical formulas. It is, essentially, a program that allows the user to observe an operation

through simulation without actually performing that operation. Simulation software is used

widely to design equipment so that the final product will be as close to design specs as possible

without expensive in process modification. Electronics simulation software utilizes mathematical

models to replicate the behavior of an actual electronic device or circuit. Essentially, it is a

software program that converts a computer into a fully functioning electronics laboratory.

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Electronics simulators such as Circuit Logix integrate a schematic editor MATLAB simulator

and on-screen waveforms and make “what-if” scenarios easy and instant. By simulating a circuit’s

behavior before actually building it greatly improves efficiency and provides insights into the

behavior and stability of electronics circuit designs. Most simulators use a MATLAB engine that

simulates analog, digital and mixed A/D circuits for exceptional power and accuracy. They also

typically contain extensive model and device libraries. While these simulators typically have

printed circuit board (PCB) export capabilities, they are not essential for design and testing of

circuits, which is the primary application of electronic circuit simulation.The software simulation of

the proposed PFC was one of the objective our project and we have tried our level best to achieve

the correct simulation result.

6.1.1Simulation Model of ideal SEPIC converter

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Fig 6.1

D= 0.52, V ¿=112V ,f s=110 kHz

R=12 Ω , L1=¿ L2=50 µH ,C1=C2 =147µF

Output :

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Fig 6.2

Fig 6.3

6.1.2 Simulation of SEPIC (open loop) PFC converter:

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Fig 6.4

In case of open loop control for power factor correction after a AC to DC converter we connect

a sepic converter that is utilising the active power factor correction method to bring the reduced

power factor near to unity and to reduce the net T.H.D ( total harmonic distortion) of the input

line current.

In case of open loop control as designed above we use hysteresis control. In this type of control

two sinusoidal current references Ipref and Ivref are generated, one for the peak and other for the

valley of the inductor current. According to the hysteresis technique, the switch is turned on

when the inductor current goes below the lower reference Ivref and is turned off when the

inductor current goes above the upper reference Ipref giving rise to variable frequency control.

Advantage:

It gives rise to low distorted input current waveforms.

Disadvantage:

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It has variable switching frequency. inductor current must be sensed

Output:

a> Input current and voltage:

Fig 6.5

b> Output voltage:

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Fig 6.6

c> FFT analysis:

Fig 6.7

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The main problem that arises in case of open loop control is that when we change the

constant given at the input side (0.38) in this case, the input current waveform as well as the

value of the output current changes.

So to avoid this we have designed a closed loop control for power factor correction.

6.1.3 Simulation of SEPIC (closed loop) PFC converter:

In case of closed loop control here we use PI controller as the controller feedback. The output voltage is sensed and is compared with a reference voltage. The error from among the two is fed to a PI controller which acts as an error amplifier here. The PI controller in voltage feedback is slow in action because any change in output voltage is sensed and compared with the reference voltage. The basic purpose of closed loop control is to keep the output voltage regulated irrespective of variation in load, in input supply or in the reference set point.

Fig 6.9

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Output:

a> Output voltage:

Fig 6.10

b> Output current:

Fig 6.11

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c> Input current and voltage:

Fig 6.12

d> FFT analysis:

Fig 6.13

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6.1.4 closed loop control with load disturbance:

Closed loop control is designed to get a regulated output. Or in other words if we change any

of the parameters of the circuit then the output voltage remains the same. We have designed

some of the circuits to ensure it.

Fig 6.14

In the previous closed loop circuit, the output resistance is taken to be 10 ohm. So to check

the load disturbance factor, we have connected another resistance of value 10 ohm in parallel

to it, with a switch connected to it that is controlled by a pulse generator.

Initially when there is no pulse, the switch is open and thus the output resistance is

10 ohms. After the given time period when a pulse is given to the switch, it closes and so

another parallel resistance of value 10 ohms comes to the picture. so the overall resistance

becomes 5 ohms. The change is fed to the PI controller which readjusts itself and thus the

output is maintained at 100 volts.

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Output:

a> Input voltage and current:

Fig 6.15

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b> Output voltage:

Fig 6.16

c> FFT analysis:

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Fig 6.17

6.1.5 closed loop control with reference change:

Previously in case of closed loop , we have considered a reference value of 4.268 which we

have compared with the voltage across the load and the error has been fed into the PI

controller. So basically, we conclude that the output voltage required (i.e. 100 V) is set by

this reference. So now if we change this reference, the output voltage also changes therewith.

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Fig 6.18

In case of this circuit, the reference given before the PI controller is changes to a unit step

signal where the initial value is set at 100 V and after a time difference of 2 sec the value is

change to 120 V. So the output voltage changes according to this reference.

Output:

a> Input voltage and current:

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Fig 6.19

b> Output voltage :

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Fig 6.20

c> FFT analysis:

Fig 6.21

6.1.6 closed loop control with supply change:

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Fig 6.22

In case of this circuit, two input supplies of different values are connected to the circuit. The

two supplies have two switches connected to them. These switches are provided pulses with

the help of a step. When the step is high, the supply with RMS value 100 V is activated. At

the same time, the other switch is connected to the unit step through a NOT gate, which

means that if the first switch is ON, the second will be OFF. So at a time only one supply will

be activated.

Initially the value of unit step is LOW. So the first supply will be OFF, and after

passing through the NOT gate, the second supply is ON. After a time duration of 2 seconds, a

high input is given to the first switch, making the first supply ON and the second OFF.

Output:

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a> Input current and voltage:

Fig 6.23

b> Output voltage:

Fig 6.24

c> FFT analysis:

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Fig 6.25

6.2 AVERAGE CURRENT CONTROL FOR POWER FACTOR

CORRECTION:

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Average current control method for power factor correction is a control method which allows

a better current input waveform. It is one of the other methods for power factor correction

which we have implemented here.

Fig 6.26

In case of this circuit, the inductor current is sensed and filtered by a current error amplifier

whose output drives a PWM modulator. In this way the inner current loop tends to minimise

the error between the average input current Ig and its reference.

Fig 6.27

The converter works in CICM (continuous inductor current mode).

Advantages:

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The advantages under this technique are:

1> Constant switching frequency.

2> No need of compensation Ramp.

3> Control is less sensitive to commutation noises, due to current filtering.

4> Better input current waveforms .

Disadvantages:

The disadvantages of this technique are listed below:

1> In this case the inductor current must be sensed.

2> A current error amplifier is needed .

6.2.1 Simulation of average current control (open loop):

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Fig 6.28

Output:

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a> Input voltage and current:

fig 6.29

b> Output voltage:

fig 6.30

c> FFT analysis:

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Fig 6.31

6.2.2 Simulation of average current control (closed loop):

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Similar to that of the hysteresis current control technique, in case of average current control

technique closed loop control is employed for regulated output voltage.

Fig 6.32

Output:

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a> Input voltage and current:

Fig 6.33

b> Output voltage:

Fig 6.34

c> FFT analysis:

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Fig 6.35

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6.3 POWER FACTOR CORRECTION USING SEPIC CONVERTER

PROVIDED WITH THREE PHASE SUPPLY:

Previously we have implemented the SEPIC converter for power factor correction with single

phase supply. Here we have implemented the same SEPIC converter, but with a three phase

supply.

Fig 6.36

For the three phase supply:

1. Phase to phase RMS voltage=200 V

2. Phase angle of phase A = 0 degrees

3. 3 phase short circuit level at base voltage (VA)=800e3

4. Base voltage(Vrms ph-ph)=200

5. X/R ratio=7

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Output:

a> Input voltage and current:

Fig 6.37

b> Output voltage:

Fig 6.38

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c> FFT analysis:

Fig 6.39

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CHAPTER 7

FUZZY CONTROL IMPLEMENTATION

FOR POWER FACTOR CORRECTION

7.1 Fuzzy Logic Controller (FLC): In mid 1960’s, a new theory called “Fuzzy Logic”

or fuzzy set theory was propounded by L.A.Zadeh. He the originator of this theory, argued

that nost of the human thinking id fuzzy or imprecise in nature, and therefore, Boolean logic

which is represented by crisp 0 and 1cannot adequately emulated the thinking process. In

recent years, fuzzy logic has emerged as an important tool to characterise and control a

system whose model is not known or is ill defined.

The advantages of fuzzy logic controller are given below:

Fuzzy controllers are more robust than PID controllers because they cover a much

wider range of operating conditions that PID can, and can operate with noise and

disturbances of different nature.

Developing a fuzzy controller is cheaper than developing a model based or other

controller to do the same thing,

Fuzzy controller are customisable, since it is easier to understand and modify their

rules, which not only use a human operator’s strategy but also are expressed in natural

linguistic terms.

It is easy to learn how fuzzy controllers operate and how to design and apply them in

concrete applications.

7.1.1 FUZZY LOGIC PRINCIPLE:

In fuzzy set theory a particular object has a degree of membership in a given set that may be

anywhere in the range of 0 to 1. This property allows the fuzzy logic to deal with situations in

a fairly natural way. Although Fuzzy logic deals with imprecise information, it is based on

sound quantitative mathematical theory. Figure 4.1 shows the basic configuration of FLC.

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Fig 7.1

The classical design scheme contains the following steps:

Define the input and control variables-determine which states of the process shall be

observed and which control actions are to be considered.

Define the condition interface-fix the way in which observations of the processes are

expressed as fuzzy sets.

Design the rule base-determine which rules are to be applied under which conditions.

Design the computational unit – supply algorithms to perform fuzzy computations. Those

will generally lead to fuzzy outputs.

Determine rules according to which fuzzy control statements can be transformed into

crisp control actions.

7.1.2 Fuzzy Membership functions

The shape of membership functions can also be trapezoidal or Gaussian etc depending on the

applications and can be symmetrical or asymmetrical. In fuzzy set terminology the possible

values that voltage error can assume are named universe of discourse and the fuzzy sets

(characterised by membership functions) cover the whole universe of discourse. A fuzzy

variable has values, which are expressed by natural English language. For example, the

voltage error of a power converter as indicated in figure 4.3 can be defined by linguistic

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variables (fuzzy sets or fuzzy subsets) negative big (NB), negative medium (NM), negative

small(NS), zero( ZE), positive small(PS), positive medium (PM) where each variable is

defined by a gradually varying triangular membership function.

7.1.3 Fuzzification

Seven fuzzy levels or sets are chosen and defined by the following library of fuzzy set value

for the error e and change in error de

The number of fuzzy levels in not fixed and depends on the input resolution needed in an

application. The larger the number of fuzzy levels, the higher is the input resolution. The

inputs are not quantizes in the classical sense that each input is assigned to exactly ne level.

Instead, each input is assigned a “membership function” µ to each fuzzy set. The fuzzy set

controller implemented here uses triangular fuzzy set values. Trapezoidal or bell shaped sets

may also be employed. The triangular functions are used to reduce complexity in

calculations. Hence, the fuzzy representation of quantized values of e and de are the fuzzy

sets and degree to which they belong to each fuzzy set.

7.1.4 Fuzzy Control rules and Composition

Fuzzy control is described by a set of IF.....THEN.....rules(called implications), where the

rule has the following structure:

IF i is A AND B is j THEN y is C.

Where i,j,y are the fuzzy variables and A,B,C are the fuzzy sets in the universe of discourses

X,Y,Z respectively.

In general the rule is in n dimensional where n is the number of variables included in the

rule. The individual rules are combined to give an overall rule R which is computed by the

union operator as follows:

R=R1 U R2 U R3 .....U Rn

For the given rule base of a control system, the fuzzy controller determines the rules to be

fired for the specific input and then computes the effective control action. The compensation

method is one by which such control output can be generated. The most commonly used

composition method is MAX-MIN which is illustrated in figure 4.4.

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Fig 7.2

7.1.5 Defuzzification

The most preferred interference method is Mamdani mini fuzzy Interference method. The

interference result of each rule using Mamdani mini fuzzy implication consists of 2 parts, the

weighing factor wi of the individual rule and degree of output Ci according to the control

table.

Therefore the inferred output of each rule using Mamdani mini fuzzy implication is written

as:

Yi=min µinput(i) , µinput(j)Ci

Yi=wiCi

When yi denotes the fuzzy representation of output inferred by the ith rule.

Since the output result is linguistic result, a defuzzification operation is performed next to

obtain a crisp result. The crisp value for the final output is calculated using the centre of

gravity method. The product of centroid Ci(obtained from control rules) and the weighting

factor wi gives the contribution of ith inference result to the crisp value of the final output.

The resultant output can therefore be represented as

Final output=∑i=1

4

wimi

∑i=1

4

wiu

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The basic structure of the fuzzy controller is given in this chapter. Each block of the

controller has been discussed in brief. Steps for designing the controller are also discussed.

7.2 Fuzzy Control Algorithm for DC-DC Converter

The entire PWM controller has very simple linear transfer function but the non linear transfer

function of multiple output converters requires a corresponding non-linear control algorithm

to utilise full capabilities of the converter. Most multiple output converters experience a high

degree of nonlinearity in their control characteristics. All the traditional control methods have

used linear controller while scarifying potential electrical performance of the converters.

Other approaches use complex nonlinear controls to obtain better performance; this often

requires expensive current and voltage sensor to monitor electrical state variables within a

given multiple output converters. The Fuzzy Logic Controller (FLC) provides a solution to

the entire above problem.

FLC provides an inexpensive nonlinear control (14-17) for obtaining a good electrical

performance. Such a controller exhibit increased robustness in the face of changing circuit

parameters, saturation effect and external disturbances.

The basic purpose of closed loop control of converter is to keep output voltage regulated

irrespective of variation in load, in input supply or in the reference set point. The implement

this output voltage of the converter is sensed and then compared with reference voltage, the

result is error given as:

e(k) = Vref – Vo

and then change in error is calculated as

de(k) = e(k) – e(k-1)

where, Vref = reference voltage, Vo = output voltage

e(k) = voltage error at Kth instant, de(k) = change in voltage error at Kth instant

e(k-1) = voltage error at (k-1)th instant

Therefore two inputs to the FLC are voltage error e(k) and change in voltage error de(k) and

according to control law implemented; it produces the output which is change duty cycle. The

duty cycle at kth sampling time is determined by adding the previous cycle to the calculated

change in the duty cycle.

Change in duty cycle δ(k) = δ (k-1) + dδ

Where δ (k) = duty cycle at kth instant ,

δ (k-1) = duty cycle at (k-1)th instant

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dδ = change in duty cycle

The duty cycle at the kth instant is used for the switching of the switches SWm

And SW(k+1) at constant frequency and the remaining two switches with a delay of half of the

time period. Table 4.1 gives the change in duty cycle(dδ).

de

e

NB NM NS ZE PS PM PB

NB NB NB NB NB NM NS ZE

NM NB NB NB NM NS ZE PS

NS NB NB NM NS ZE PS PM

ZE NB NM NS ZE PS PM PB

PS NM NS ZE PS PM PB PB

PM NS ZE PVS PM PB PB PB

PB ZE PS PS PB PB PB PB

Table 7.1 7x7 Rule

The fuzzy control rules are derived keeping in mind the positive slope region of the DC

characteristics of converter. Following are the main points considered;

When the output of converter is far from the set point, the change in duty cycle must

be small so as to bring the output to the set point quickly.

When the output of converter is approaching the set point, a small change in duty

cycle is necessary.

When the output of the converter is near the set point and is approaching it rapidly,

the duty cycle must be kept constant so as to prevent overshoot.

when the set point is reached and output is still changing, the duty cycle must be

changed a little bit to prevent the output from moving away.

When the set point is reached and the output is steady, the duty cycle should remain

unchanged.

When the output is above the set point, the sign of the change of duty cycle must be

negative and vice versa.

FLC tool box

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The FIS Editor, the Membership Function Editor, the Rule Editor, and the Rule Viewer of

fuzzy controller used here are shown in Figures 4.5, 4.6, 4.7, 4.8, 4.9(a) and 4.9(b).

The FIS editor handles the high level issues for the system: how many input and output

variables and what are their names? The fuzzy logic tool box does not limit the number of

inputs. However, the number of inputs is limited by the available memory of the system. The

membership function editor is used to define the shapes of all the membership functions

associated with each variable. The rule editor is for editing the list of rules that defines the

behaviour of the system. The rule viewer and surface viewer are used for looking at, as

opposed to editing the FIS. They are strictly read only tools. The rule viewer is a MATLAB

based display of the fuzzy inference diagram. Used as a diagnostic it can show which rules

are active, or how individual membership function shapes are influencing the results.

Figure 7.3 FIS Editor

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Figure 7.4 Membership Function for Voltage Error

Figure 7.5 Membership Function of Change in error

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Figure 7.6 Membership function of change in frequency

Figure 7.7(a) Rule Editor

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Figure 7.7(b) Rule Viewer

Simulation results of power factor correction circuit using fuzzy logic:

Fig 7.8

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Output:

a> Input voltage and current:

Fig 7.9

b> Output voltage:

Fig 7.10

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c> FFT Analysis:

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CHAPTER 8

SUMMARY AND CONCLUSION

In this project we have presented various ways for power factor correction using a SEPIC

converter, including its closed loop and open loop. The main focus of this thesis was to

present various ways for power factor correction using active power factor correction method

Apart from SEPIC converter, this thesis also focuses on some other methods and instruments

which could be used instead of SEPIC converter for improving the power factor around unity.

The focus is fixed mainly on power factor correction using FUZZY LOGIC CONTROLLER,

AVERAGE CURRENT CONTROL METHOD.

Apart from single phase connection, we have concentrated upon designing the circuit using

three phase connection also in this thesis.

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REFERENCES

1.H. Endo, T. Yamashita and T. Sugiura, “A high powerfactor buck converter”, in

Proc. IEEE PESC’92, 1992, pp. 107 1-1 076.

2.C. Zhou, R. B. Ridley and F. C. Lee, “Design and analysis of a hysteretic boost

power factor correction circuit”, in PUW. IEEE PESC’90, 1990, pp. 800-807.

3.S. Funabiki, N. Toita and A. Mechi, “A single-phase PWM AC to DC converter

with a step up/down and sinusoidal source current”, in Con$ Rec. IEEE-IAS Annual

Meeting, 1991,pp. 1017-1022.

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