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Power Integrity DC/AC Analysis • Two major kinds of PI analysis: – DC (IR drop and Current Density) – AC(Frequency impedance plot) AC analysis can be done in both time-domain and frequency-domain

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Power Integrity DC/AC AnalysisTwo major kinds of PI analysis: DC (IR drop and Current Density)AC(Frequency impedance plot)AC analysis can be done in both time-domain and frequency-domain

Why DC analysis in Pkg/PCB?

DC voltage is the most fundamental criterion for the operation of the circuitry in the systemDC voltage drop or IR drop or ohmic loss is simulated assuming uniform current or detailed map of actual current in full activity across devices pins Current across BGA used for board level simCurrent across pkg die footprint for Pkg+brd co-sim

What affects IR drop?Power/ground plane copper shapes, copper thickness and conductivity of the materialVRM and Load locationLoad Transient CurrentPresence of larger anti pad Via keep out, thermal relieveHoneycombstructure hole patternNumber of power/ground vias and via locations DC contact resistance of connectors

Information needed for DC AnalysisLayer Stack-upVoltage rails to be simulated and corresponding ground netVoltage regulator modules component name,voltage,and tolerance.Loads component name,transinet current , tolerance.Current Tolerance for Vias.DC Resistance of any series elements(FET,bead,Resistor)

PCB power supply input impedance AC analysisPower Deliver systems impedance is an important measure of power delivery design To ensure power noise L(di/dt) is small, plane impedance needs to be small. Have to add decaps on the board to bring down resonance and to achieve low Plane impedance

Information needed for AC AnalysisVoltage, Supply ToleranceLoad Transient Current or Maximum Load CurrentRipple VRM and Load LocationOptional:VRM model and Package model

What affects PDN impedance?Power plane and ground plane/Traces Location of VRM and LoadNumber of Decoupling capacitor and Values of Decoupling capacitor.Fan out pattern of decapsLocation of DeacpsMounting Pattern of Decaps.

PI Methodology DC AnalysisPI ToolSentinel-PSI /Cadence Sigrity PowerDC

Power drop budget for +/- 5% supply3% DC/DC1% component1% IR drop

Example[IR Drop]Drop is more than 1% which is not acceptable, this can be compensated either by adding more copper, expanding shape, increasing copper thickness or by using remote sense.Some time when we use high DCR beads, the drop will be more than expected due to high DC resistance. Always use low DCR for high current rails.

Example[Density]Excessive density is there at load and source location which is not acceptable. This may leads to copper migration. Density Can be compensated by increasing copper thickness, by avoiding honeycomb structure.

PI Methodology (con't)AC AnalysisPI ToolPowerSI - Analysis

ExampleThis rail consumes 1.5Amps and target impedance is calculated using traditional formula.No impedance violation till 90MHZ which is fine. Note that board coupling capacitor doesnt help much beyond 100MHZ.

ExampleThis rail has eight 0.1uF capacitor and the impedance violates target at 5MHZ which is not acceptable.Combination of four 0.1uF and four 1uF help to resolve this problem.