pic discussion -...

By Eng. Tamar Jomaa

PIC Discussion

2Chapter#Programming Microcontroller Using Assembly Language

: 1 uiz#Q

Fill in spaces:

1) PIC is abbreviation for……………………………

2) Microcontroller with…………..architecture called RISC microcontroller, which is the abbreviation for ………………………

3) The various circuits inside a typical computer are connected to one another through three busses which are…………..,…………,…………..

4) Write the size of each memory:

program memory……………..

RAM……………..

EEPROM………………..

5) The program must start from location ………………..

Time: 10 minutesMarks: 10

onus : B

Write the function for each pin:

Time: 10 minutesMarks: +2

Outlines for part#1:

2.1 Machine language and assembly language.

2.2 Assembler statements (instructions/ directives) and number representation.

2.3 Addressing modes

2.3.1 Opcode

2.3.2 The configuration

2.3.3 Hexa file

2.3.4 Direct and indirect addressing

2.1 Machine language and assembly language:

We as humans express our ideas in complex and often loosely defined linguistic forms.

A computer reads and ‘understands’ binary, and responds in a precise way to precise instructions.

It is ruthlessly logical and does exactly what it is told.

2.1 Machine language and assembly language:How can a programmer write programs for a computer?

The human learns machine code.

Use a high-level language (HLL).

Use Assembler.


Assembly language:

Every one of the computer’s instructions set is given a mnemonic.

This is usually a three- or four-letter word that can be used to represent directly one instruction from the instruction set.

The programmer then writes the program using the instruction mnemonics.

The programmer has to think at the level of the computer, as he/she is working directly with its instructions, but at least the programmer has the mnemonics to use, rather than actually working with the computer machine code.

A special computer program called a Cross-Assembler, usually these days running on a PC, converts the code written in mnemonics to the machine code that the computer will see.

2.1 Machine language and assembly language:The PIC 16 Series instruction set, with a little more on the ALU:


The PIC 16 Series instruction set, with a little more on the ALU:

The ALU can operate on data from two sources. One is the W (or ‘Working’) register. The other is either a literal value or a value from a data memory (whose memory locations Microchip call ‘register files’).

A literal value is a byte of data associated with a particular instruction that the programmer embeds in the program.

The data that the instruction operates on, or uses, is called the operand.

Operands can be data or addresses.

Always need an operand to be specified with them, others do not.


Once an instruction has been executed, where is the result stored?

For many instructions Microchip offer a choice, whereby the result can either be held in the W register or stored back in data memory.

Which one is used is fixed by certain instructions; in others it is determined by the state of a special d bit, which is specified within the instruction.

The PIC 16 Series instruction


You can see that the table is divided into six columns,

and each of the 35 instructions gets one line.

The first column gives the actual mnemonic, together

with the code specifying the type of operand it acts on.

There are four such operand codes:

• f for file (i.e. memory location in RAM), a 7-bit number

• b for bit, to be found within a file also specified, a 3-bit

number

• d for destination, as described above, a single bit

• k for literal, an 8-bit number if data or 11-bit if address.


The second column summarises what the instruction

does. In some cases this gives adequate information.

The third column shows how many instruction cycles the

instruction takes to execute.

The fourth column gives the actual 14-bit opcode of

each instruction. This is the code that the Cross-

Assembler produces, as it converts the original program

in Assembler language to machine code.

The fifth column shows which bits in the Status register

are affected by each instruction.


Five example instructions:

1) clrw :

This clears the value in the W register to zero. There are

no operands to specify.

Column 5 tells us that the Status register Z bit is affected

by the instruction. As the result of this instruction is always

zero, the bit is always set to 1.

No other Status register bits are affected.

2) clrf f :

This clears the value of a memory location, symbolised as

f. It is up to the programmer to specif a value for f.

Again, because the result is zero, the Status register Z bit

is affected.

2.1 Machine language and assembly language:3) addwf f,d:

This adds the contents of the W register to the contents of a memory

location symbolised by f.

It is up to the programmer to specify a value for f.

There is a choice of where the result is placed.

This is determined by the value of the operand bit d.

Because of the different values that the result can take, all three

condition code bits, i.e. Z, the Carry bit C, and the Digit Carry bit DC

are affected by the instruction.

4) bcf f,b :

This instruction clears a single bit in a memory location.

Both the bit and the location must be specified by the programmer.

The bit number b will take a value from 0 to 7, to identify any one of

the 8 bits in a memory location.

No Status register flags are affected, even though it is possible to

imagine that the result of the instruction could be to set a memory

location to zero.

2.1 Machine language and assembly language:4) addlw k:

This instruction adds the value of a literal, whose value k must

be specified by the programmer, to the value held in the W

register.

The result is stored in the W register; there is no choice.

Like addwf, all condition code bits can be affected by this

instruction.

Question:What is the meaning of the following instructions:

Solution:


Exercise:

What does the following code do?


Solution:


To make the previous code more easier we use equ:

All the identifiers

for memory locations

find in P16F84a.INC,

instead of writing the

name of each

location by “equ”


Another important instructions for condition case:


Instructions for subroutine and stack:


Important note:

If you call a sub-program within another sub-program called nested subroutine.

When you do so, you must remember that each time the program is called sub-program or book a place in the stack, which is free when you return from sub program.

If you call a sub-program of another branch within the program we use two stack sites may be three if there is another internal call.

Because a microcontroller PIC16 stack owns eight sites (levels) must caution that no rash or flood or increase the stack is what is known as the stack overflow.

2.2 Assembler statements (instructions/ directives) and number representation

An assembly language source cod consists of a set of

statements. The two types of statements are :

Instruction : which are translated into machine

instruction by the assembler.

Directives : which tell the assembler to perform a

specific action during the assembling process.

The format of the source code is shown below. The

maximum column width is 255 characters.

Example:

2.2 Assembler statements (instructions/ directives) and number representation

Some common MPASM Assembler directives:

Number representation in MPASM Assembler:

2.3 Addressing modes:

General format for instructions:

The format for instructions of PIC16 series is the

following three kinds:

Byte-oriented file register operations. Bit-oriented file register operations. Literal and control operations .

The instructions are written in the program memory and

one instruction is composed of 14 bits.

These 14 bits are called a word.

2.3 Addressing modes:1. Byte-oriented file register operations: The instructions of this format are the instructions

which process a byte unit.


Note:

f: file register, it is

the address of GPR or

SFR.

GPR and SFR are 8

bit register but in the

instruction it has only 7

bits, the last bit is

dropped.


Example:

porta 05h “ address”

trisa 85h “ address”

05h: 0 000 0101

85h: 1 000 0101

__________

These bits are

dropped.

These bits only appear

in the instruction set.

Note:The dropped bit was defined

according to the value of

RP0 in the status register.


Complete example:

ADDWF PORTA,W

From table the opcode like this:

The opcode:

00 0111 dfff fff

opcode operand

PORTA has 05h address so, the instruction will be as the following:

00 0111 0000 0101

0 3 0 5


The instructions of this forma are the instruction which processes a bit unit.

2. Bit-oriented file register operations:

2.3 Addressing modes:Think :

Why does “b” available in 3 digits but the “f “in 7 digits?

Solution:

Because “b” is from 0 to 7 so we can act it in 3 digits

But f is from 0 to 7f so we can act it in 7 bits.

Example#1: BSF portB,2

From table the opcode is:

f : portB has address 06h

b: 2

So the opcode is:

01 0101 0000 0110

1 5 0 6


Example#2: BSF trisB,2

From table the opcode is:

f : trisB has address 86h

b: 2

So the opcode is:

01 0101 0000 0110

1 5 0 6

Note:

bsf trisb and bsf portb have the same

machine language.


Literal and control operations:The instructions of this format do the processing

which used the fixed number (k) which was written

in the instruction.

There are two instruction types and fixed number

(k) is 11 bits about GOTO and CALL instruction.

In case of GOTO and CALL instruction


In the first form k is a constant and since all registers are 8 bit, registers maximum value that can be stored in the register is 255(ffh).

In the second form k is address of program memory. It’s used with CALL and goto instructions. It’s 11 bit because max range from 0 to 2047(7FFh).


In the first form k is a constant and since all registers are 8 bit, registers maximum value that can be stored in the register is 255(ffh).

In the second form k is address of program memory. It’s used with CALL and goto instructions. It’s 11 bit because max range from 0 to 2047(7FFh).

Example:

XORLW 15hThe opcode:

11 1010 kkkk kkkk

11 1010 0001 0101


Write the machine language for the following code:

Remember :” org” and “end” are directives that haven’t

machine code, because machine code for instructions

only.

2.3 Addressing modes:Solution :

The opcode The opcode ruleThe instruction

_____directiveORG 0X000

280510 1000 0000 0101GOTO START

_____directiveORG 0X004

000900 0000 0000 1001RETFIE

168301 0110 1000 0011BSF STATUS,RP0

100501 0000 0000 0101BCF TRISA,0

140601 0100 0000 0110BSF TRISB,0

128301 0100 0000 0110BCF STATUS,RP0

080600 1000 0000 0110MOVF PORTB,W

008500 0000 1000 0101MOVWF PORTA

280910 1000 0000 1001BSF STATUS,RP0

_____directiveEND


Configuration:The configuration bits may be change to 0 or left it to

default value which is 1.

This bits exist in address 2007h in program memory.

Bit0 & Bit1: to define the type of crystal, as the

following:

Bit2: active or not the watch do timer.

1 default Watch dog active

0Watch dog not active


Bit3: PWRTE to active or not the power timer

after 72ms during reset.

1 defaultPower timer not active

0Power timer active

Bit4: CP to prevent the program code

1 defaultThe program code is not Protected

0The program code is Protected

14131211109876543210CPCPCPCPCPCPCPCPCPCPCPPWRTEWDTEFOSC1FOSC0

The configuration bits:

Example:

1000 1111 1111 11 = 1FF3


The configuration is written by __CONFIG

directive.

Summary:” all in the green are defaults”


Hex file: The hexa file contains the machine language that deals with

PIC microcontroller.

The hexadecimal object file format for PIC Microcontroller

General Record Format:

Record Mark: each record begins with a Record Mark field containing

03AH,the ASCII code for the

colon ' : ' character.

Record Length: The number of bytes of information or data

Example:

02 2 bytes byte=8 bits so 2 byte=2x8=16 bits

--4bit--- ---4bit--- --4bit--- ---4bit----

4 hexadecimal digits.

08 8byte 8x8=64 bits 64/4=16 hexadecimal digits.


Offset: By the offset we

can arrive to the address,

the address for the byte

not for the word.Example: 0008

Record Type: It is used to interpret the remaining information within the

record. The encoding for all the current record types are:

offset

6 bits Byte=8bit


Chick Sum:

This field contains the check sum on the Record length, Load Offset,

Record Type, and Information or Data.

Therefore, the sum of all the ASCII pairs in a record after converting to

binary, from the Record length field to and including the Chick Sum field, is

zero.

An important question for Mid Term Exam :

Write the program which has the following hexa file:

:020000040000FA

:020000000528D1

:0800080005288316FF30850076

:0C001000003086008312050886000B2803

:00000001FF


SOLUTION:

Step(1): distribute the bits as following:

0000 FA04000002:

0528 D100000002:

0528 8316 FF30 8500 7600000808:

0030 8600 8312 0508 8600 0B23 D30000100C:

FF01000000:

Step(2): convert the data that have only 00 type.

Step(3):distribute all 2 bytes separately, because each 2 bytes act one

instruction.

Step(4):reverse LSB with MSB then convert.

the last byte is

Check sum

The codeThe opcodeReverse ins.Instruction

Goto 510 1000 0000 010128050528

Goto 510 1000 0000 010128050528

BSF STATUS,RP001 0110 1000 001116838316

MOVLW FF11 0000 1111 111130FFFF30

MOVWF PORTA00 0000 1000 010100858500

MOVLW 0X0011 0000 0000 000030000030

MOVWF PORTB00 0000 1000 011000868600

BCF STATUS,RP001 0010 1000 001112838312

MOVF PORTA,W00 1000 0000 010108050508

MOVWF PORTB00 0000 1000 011000868600

GOTO 0B10 1000 0000 1011 280B0B23


After organize the previous instruction we got the following code:


Direct and indirect addressing:

Addressing mode: it is the way in which an

operand is specified.

There are 3 types of addressing modes:

1. Immediate addressing mode.

2. Register operand addressing mode.

3. Memory operand addressing mode,

which classified into to groups:

A. Direct addressing

B. Indirect addressing



1. Immediate addressing mode:The operand is a number or constant not an address.

Example: movlw 43h

2. Register operand addressing mode:Deals with registers

Example:

CLRW W:work register.

3.Memory operand addressing mode:A) Direct : deals with address or memory location

Example: CLRF 13H or MOVWF TRISA

B) Indirect : uses INDF and FSR.



A)Direct:Direct Addressing is done

through a 9-bit address.

This address is obtained

by connecting 7th bit of

direct address of an

instruction with two bits

(RP1, RP0) from STATUS

register as figure.

Any access to SFR

registers can be an

example of direct

addressing.



Quick Question

We observe that SFR is classified into 2 banks,

each bank consist from 8 bit but we need only 7 bit

because the last bit for select the bank.

Now observe the picture, the GPR does not

classified into 2 banks, so shall I need 16 bit??

the solution is No, because each register in GPR

consist from 2 register each one has 8 bit and any

thing you write it in first register is directly copy to the

other register, but we can reach to any register from

any bank, so we also need 7 bit.



B) Indirect:

It does not take an address from an instruction, but

it derives it from IRP bit of STATUS and FSR registers.

Addressed location is accessed through INDF

register which in fact holds the address indicated by

the FSR.

Indirect addressing is very convenient for

manipulating data arrays located in GPR registers.

In this case, it is necessary to initialize FSR register

with a starting address of the array, and the rest of the

data can be accessed by incrementing the FSR

register.



Figure below shows the indirect addressing concept.

we put the address of

the register which we

want to deal with it in

FSR, which the FSR

work as pointer.

We deal with the

location which the FSR

points to it from INDF

register.

Indirect addressing examples

Example#1:Filling 0C-0F GPR registers with 55h


Example#2:Filling All GPR registers with 00h

Homework

Q1) Extract the assembly language

instruction from the following hex file

:0800080009008316B8308100E5

Q2) Implement a program that copy the

input data from portB to all GPR.

Note: date delivery is next lecture.

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