http://ptuece.loremate.com/die/node/3 March 7, 2012

Digital Electronics

Remember These:

1. Combinational circuits are adders subtractors multiplexers demultiplexer, magnitude

comparator, parity generator/checker etc.

1. Arithmetic circuits are used for addition, subtraction multiplication division

2. Half adder is used for addition of two binary numbers.

3. Full adder is used to perform addition of more tharr2 bits

4. Serial adder require one full adder for one additional bit while parallel adders requires N fulladders for n bit addition.

5. Two more adders are look ahead carry adder and BCD adder.

6. Half subtractor subtracts two numbers we get 2 output variables i e difference and borrow

7. Full subtractor is subtraction of 3 bits.

8. Encoder converts human language into machine language.

9. Decoder is used to convert machine language to human language.

10. Multiplexers are universal circuits which selects one input out of multiple inputs and give it as aresult

11. Demultiplexer receives information on single line and distribute to the 2 lines where n

are selection lines.

1. Magnitude comparator is used to compare 2 binary numbers

2. Code converters are those which converts a given code to some other code Examples are:

(a) Gray to Binary code converter

(b) Binary to Gray code converter

(c) Binary to Excess 3 code converter etc.

1. Parity generator is a logic circuit which generates the parity bits for even or odd parity

2. Parity generator is used at the transmitter.

3. Parity checker is used at the receiver.

4. BCD display drive is basically the BCD to seven segment display code converter In thisbinary coded decimal is displayed on the seven segment displays

Q 7. Design BCD to Excess-3 code converter.

Ans. BCD to Excess-3 Code Converter:

The input variables are BCD’s (A, B, C and D) and output variables are excess-3 code (E3, E2, E1and E0)

Truth Table

After ‘9’ i.e. 1001 BCD, mark don’t care i.e. ‘X’.

Minimization Using K-map:

For E3

E3 = A + BD + BS

For E2

For E1

For E0

Implementation ofExcess-3 CodeConverter:

Q 8. Draw the logic circuit for the expression

Ans.

Logic circuit representation.

Q 9 Draw the logic circuit for 3 line to 8 line decoder

Ans. 3 line to 8 line decoder circuit is as shown:

It has three input lines i.e. A, B and C and has eight output lines

i.e. D0, D1, D2, D3, D4, D5, D6 and D7

Q 11. Give significance of priority encoder.

Ans. Priority encoder in a special type of encoder. It has prioritiesgiven to the input lines

from highest priority input line to lowest priority input line, If two ormore input lines are active i.e. ‘1’ or high at the same time, then theinput line with highest priority will be considered first.

Q 12. How many select lines are there for a 30 to 1 MUX?

Ans. For 30: 1 MUX, 5 select lines are required. 4 select lines arefor 16 : 1 MUX’s and

1 select line for 2: 1 MUX. = M formula is used. Where n = numberof select lines and M are the number of inputs for a MUX.

= 32.Thus, 5 select lines are needed.

Q 13. What are thevarious type of paritycheckers and where dowe use them?

Ans. Parity checkers areused at the receiver part.They check the parity ofthe received

word and produces itsoutput. Broadly paritycheckers are of twotypes.

(i) Odd parity checker

(ii) Even parity checker.

Q 15. Construct 16-bit comparator using 4-bitcomparator as a building block.

Ans. 4 bit comparator IC in 7485.

It is used for 16 bit comparator.

Thus, 4 IC’S are used, which is as shown:

Q 16. How can a DEMUX be used as a decoder?

Ans. The selection lines of the DEMUX can be used as inputlines of decoder and if the

data input of the demultiplexer is used as the enable input ofthe decoder then we can use the demultiplexer as a decoder.

Q 17. What is a parity checker?

Ans. Parity checker is a logic circuit that checks the paritybinary word. A parity bit is an

additional bit which is added to a binary word in order to makethe number of one’s in the new word format as even for evenparity and odd for odd parity.

Q 18. Obtain the truth table for a combinational circuit thataccepts a three bit ‘number and generates an output binarynumber equal to the square of the input number.

Ans. Truth table is as shown for inputs and the corresponding square outputs.

Q 19. Implement using 4 x 1 MUX

Ans.

Q 20 Describe the operations performed by anencoder and a decoder.

Ans. Operations Performed by Encoder:

1 Encoder is acombinational circuitwhich encodes onedigital input code tothem digital outputcode like octal tobinary encoderDecimal to BCDencoder etc

2 It provides thesecurity for the data byencoding it

3 It saves thebandwidth over thechannels

Operations Performedby Decoder

1 A decoder is acombinational circuit,that converts n inputbinary information to 2output lines eg 2 to 4 linedecoder 3 to 8line decoderetc

2 It is used atthe receiver

part to decodethe information

Q 21.Implement the following function using 3 to 8 decoder

Ans.

Implementation using 3to 8 decoder:

Q 22 Define ademultiplexer Showhow to convert adecoder into ademultiplexer indicatehow to add a strobe tothis system

What is demultiplexer’Explain the differencebetween DMIJX andMUX

Ans. Demultiplexer: Demultiplexer is a device which has single inputline and many i e output lines The relation of specific output line iscontrolled by the value of n’ selection lines It performs the inverseoperation of multiplexer

In case of decoder, ithas n input linesand unique output linesLet us take an exampleof 2 to 4 line decoder toconvert the decoder intoa demultiplexer.

2 to 4 line Decoder:

It can be converted intodemultiplexer if D1 i e data Input line is converted to all the AND gates simultaneously.

Stroke signal is also added to all the AND gates simultaneously as shown in fig.

Strobe signal is similar to enable signal for chip selection. It isan active low signal. If high signal is applied to stroke the chipwill be disable because i = 0 goes to all the AND gates Andwe receive no output at D0, D1, D2 and D3

Difference between DMUX and MUX:

Q 23 Design a Gray-to Excess-3 Code converter using NANDgates

Ans. Gray to Excess3 code converter:

K-maps for Excess 3-codes are

Circuit Diagram:

Q 24. Design a 3-bit carry-look-ahead adder.

Ans. 3-bit look ahead adder : The bit look aheadcarry adder speeds up The process by eliminatingripple carry delay. It examines all the input bitssimultaneously and generates carry-in-bits for allstages simultaneously. It is done with two additionalfunctions carry generate and carry propagatefunction.

The carry generate function indicates as to when acarry-out would be generated by full-adder. A carry-out is generated only when both the inputs bits are 1.Thiscondition isexpressedas the ANDfunction ofthe two bits Aand B.

Carrygenerate(CG) = A . B

Carrypropagate(GP) = A B