Questa Verification IP for AMBA

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D A T A S H E E T

Functional Verification

Mentor Questa VIPMentor Questa® Verification IP (VIP) integrates seamlessly into advanced verification environments including testbenches built using UVM, Verilog, and VHDL. Mentor, a Siemens Business supports the leading industry-standard bus families, such as PCIe, USB, and Ethernet, as well as thousands of DRAM and FLASH memory models. Questa VIP is the industry’s only VIP with a native SystemVerilog UVM architecture across all protocols, ensuring maximum productivity and flexibility.

Questa VIP for AMBA AMBA® Questa VIP provides a comprehensive solution for exhaustive verification of AMBA protocol-based IP and SoC products, providing the flexibility to create and cover all possible verification scenarios. AMBA Questa VIP includes ready-to-use verification components and exhaustive stimuli to increase productivity and accelerate verification signoff.

Questa VIP Benefits ■ Architected for ease-of-use and

consistency across all protocols

■ Comprehensive stimulus and standard-based test suites

■ Exhaustive protocol coverage and protocol checks

■ UVM based testbench with ready-to-use components like monitors, loggers, and scoreboards

■ Intuitive debug with transaction viewing and tracker files at various levels

AMBA Questa VIP Features ■ Updated to latest specification

features for Master and Slave

■ Built-in analysis components – Protocol checkers – Transaction loggers – Functional coverage – Performance statistics

■ Extensive sequence library for discrete protocol features

■ Constraint-randomized stimulus with support for error injection

Supported Specifications ■ AMBA® Low Power Interface

Specification – ARM® Q Channel and P Channel Interface Versions: ARM IHI 0068B and ARM IHI 0068C

■ AMBA AXI and ACE Protocol Specification (ARM IHI0022F.b)

■ Compliant with AMBA 2 AHB Specification as detailed in AMBA Specification, Rev. 2 (ARM IHI 0011A)

■ Compliant with AMBA 3 AHB-Lite Specification as detailed in AMBA Specification, v1.0 (ARM IHI 0033A)

■ ARM11 AHB Extension, Revision v1.0

■ ARM AMBA5 AHB Specification

■ AMBA3 APB Protocol Specification v1.0 (ARM IHI 0024B)

■ AMBA APB Protocol Specification v2.0 (ARM IHI 0024C)

■ AMBA 4 AXI4-Stream Protocol Specification v1.0

Questa VIP

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AMBA Questa VIP Use Models

Questa VIP as Master

Supports all channels

Supports all protocol features

Supports configurable address and data bus widths

Supports sideband channels

Extensive set of sequences in sequence library

Exhaustive feature support for:

– Exclusive and lock access

– Narrow transfer

– Unaligned address

– Atomic transactions

Automatic handling of reset

Configurable master delays

Questa VIP as Slave

Supports all channels

Supports all protocol features

Supports configurable address and data bus widths

Supports sideband channels

Backdoor access to slave memory model

Exhaustive feature support for:

– Exclusive and lock access

– Narrow transfer

– Unaligned address

– Interleaved and out of order response

– Atomic transactions

Automatic handling of reset

Configurable slave delays

Point-to-Point IP Verification

Use Model for Interconnect Verification

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Protocol Assertions

Built-in assertions analyze traffic for protocol adherence

Coverage

Ready-to-use cover groups

– Transaction types

– Transaction attributes

– Protocol features

Out-of-the-Box Stimulus

– Achieves full Questa VIP coverage without modifications

– Extensive sequence library for discrete protocol features

– Stimulus to cover protocol features

– Error injection

Analysis Components

Scoreboards

– Read/write operations

Performance and Latency Monitor

Various performance statistics, such as read/write channel bandwidth, latency, etc.

Loggers

Analysis ports for read/write transactions

Questa Verification IP GUI for AMBA AXI

AMBA Questa VIP Verification Capabilities

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Questa Verification IP Library

Questa VIP Testbench Architecture