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RAIT/S Sam The sa are atta Please examin examin Dr. Muk Principa SS/Admn./2 mple Paper ample pape ached here e note th nation. Qu nation. kesh D. Pat al, RAIT 2020-21 rs for all b ers for the ewith. at, these uestions f til Ra Ne branches o 2 online exa are the rom these amrao A erul, Na NOTICE of R2012 f 25/09/2020 amination t sample p e sample p Adik Inst avi Mum E for the exa 0 o be held i papers to paper may titute of mbai amination in Septemb o indicate y or may n f Techno Date: 23/ schedule ber/Octobe e the patt not appea ology /09/2020 ed on er 2020 tern of r in the

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RAIT/S

Sam

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Pleaseexaminexamin

Dr. MukPrincipa

SS/Admn./2

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Q.No. Question Option A Option B Option D1 In 8086,which are the two signals that determine which byte of memory is

being accessed.A0 & S3 BHE' & S4 A0 & BHE' S3 & S4

2 A 20-bit system instruction address in 8086 is computed using the formula (CS × 8) + IP (CS × 16) + IP (IP × 8) + CS (IP × 16) + CS

3 Whenever an interrupt is detected by 8086, the following events occur : 1) the IF and TF flag bits are both cleared, 2) the interrupt vector is fetched from the interrupt vector table and the interrupt service subroutine is accessed through the vector address 3) the IP and CS resgisters are both pushed onto the stack 4) the flags are pushed onto the stack

2-4-3-1 3-1-4-2 1-2-3-4 4-1-3-2

4 ________ shows that the 8086/8088 address/data bus contains address information of a memory or an i/o port number.

AEN' STB ALE MEMR'

5 In 8086,a bus cycle is equal to clock ____________ periods. three six two four6 Which one of the following shift instruction of 8086 Processor maintains

earlier number's sign?SAL SHR SAR

SHL7 In "MUL AX" instruction of 8086, the result generated is copied into ___

register.DX:AX pair AX BX:AX

BX8 After multiplication of two 8 bit numbers 07 and 05, subsequently

followed by "AAM" instruction, the result is ____.AL = 23 AL = 35 AX = 0305 AX= FF35

9 In 8086 processor, conditional jumps are always ___ jumps. short far near inter-segment10 Intersegment CALL in 8086 Processor copies the contents of ____ register

as return address on stack.only CS only IP CS and IP

SS and SP

Note : All questions are compulsory and each carry equal marks.Option C

University of MumbaiProgram: Computer Engineering

Curriculum Scheme : Revised 2012Examination: Third Year Sem V Subject: Microprocessor

Course :

11 In BSR mode of 8255, only port C can be used to set individual ports

reset individual ports

set and reset individual

programmable I/O ports

12 Identify the programmable interval timer from the following 8252 8253 8279 827513 Total number of modes 8253 can work in are 4 6 8 1214 The block of 8237 that decodes the various commands given to the 8237

by the CPU istiming and control block

program command

priority block reset block

15 In 8237,the DMA request input pin that has the highest priority is DREQ0 DREQ1 DREQ2 DREQ316 In 80386,the paging unit is enabled only in Virtual mode Addressing Protected Real mode17 In,80386DX,the unit that provides a four level protection mechanism, for

system’s code and data against application program isCentral processing

Memory unit Bus interface unit

Segmentation unit

18 In 80386 EFlags register,the bits that indicate the privilege level of current IO operations are

Virtual mode flag bits

IOPL flag bits Resume flag bits

Nested task flag bits

19 In Pentium Processor the u-pipe can execute _____________ instruction any simple complex conditional20 In Pentium Processor one of the condition for Integer Instruction Pairing

rule isThere must be no read-after-read (RAR) or write-after-read register(WAR

There must be no memory-after-write(MAW) or memory-after-read

There must be read-after-write(RAW) or write-after-write register(WA

no read-after-write(RAW) or write-after-write register(WAW) dependencies

21 To avoid flushing of pipeline problem, the Pentium uses a scheme called___________

Dynamic Broad

Dynamic Tree Prediction

Dynamic Stem

Dynamic Branch

22 In Pentium Processor what happens if Prediction is false in Dynamic Branch Prediction

the pipeline is drained

the pipeline will not be flushed and no clock cycles will be lost.

the pipeline is flushed which results in a 3 cycle penalty if the branch is executed in

the pipeline is flushed

23 In sparc , advantage/s of Circular multiple window is _____________________

Fast sharing of data between

less storage as registers

increase in off-chip traffic

Floating point instructions execution

24 The SuperSPARC v8 Microprocessor does not have following _______ 20kb 5-way associative

16kb 4-way Associative

32kb 4-way associative

entry fully associative

25 In supersparc register overflow conditions can not be handled by I-cache CWP WIM Kernal trap

University of Mumbai Examination 2020 under cluster 3 (FCRIT)

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Program: TE Electronics Engineering

Curriculum Scheme: Revised 2012

Examination: Third Year Semester V

Course Code: EXC501 and Course Name: Microcontrollers and Applications

Time: 1hour Max. Marks: 50

======================================================================

Note to the students:- All Questions are compulsory and carry equal marks .

Q1. What is the size of internal ROM memory of 8051 microcontroller? Option A: 128 bytes Option B: 256 Bytes Option C: 8 KB Option D: 4 KB Q2. How many hardware interrupts does 8051 microcontroller have? Option A: 1 Option B: 2 Option C: 4 Option D: 5 Q3. What is the size of internal RAM memory of 8051 microcontroller? Option A: 128 bytes Option B: 256 Bytes Option C: 8 KB Option D: 4 KB Q4. Which flag indicates that the added answer is larger than 8 bit unsigned

number? Option A: Carry Flag Option B: Auxillary Flag Option C: Parity Flag Option D: Overflow Flag Q5. Which instruction requiresmaximum time for execution? Option A: MUL AB Option B: CJNE @R0,#0FFH,09H Option C: LJMP 6D80H Option D: JMP @A+DPTR Q6. What is the range of SJMP instruction? Option A: 4 KB Option B: 8 KB Option C: 64 KB

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Option D: 256 Bytes Q7. Assume 0x66 data is stored in register A. Which instruction will complement

the data stored in A register? Option A: ORL A, #0x0FF Option B: XRL A, #0x00 Option C: XRL A, #0x0FF Option D: ORL A, #00 Q8. If (F6)H data is stored in Accumulator. Which instruction given below can be

used to clear ACC.6 bit of Accumulatorwhere as the other bits in Accumulator remain unchanged?

Option A: ANL A, #0x00 Option B: ANL A, #0x0BF Option C: ANL A, #0x0FF Option D: ANL A, #0x40 Q9. If 0x55 is the address stored in Stack Pointer (SP) register. What is the

address in SP register after execution of four POP instructions? Option A: 0x59 Option B: 0x58 Option C: 0x50 Option D: 0x51 Q10. Which type of jump instruction is DJNZ R2, 0x7? Option A: Conditional Short Jump Option B: Conditional Long Jump Option C: Conditional Absolute Jump Option D: Unconditional Short Jump Q11. Which port of 8051 microcontroller does not have an internal pull-up? Option A: P3 Option B: P2 Option C: P1 Option D: P0 Q12. How many Timer/Counter peripheral circuits are available inside 8051

microcontroller? Option A: 1 Option B: 2 Option C: 3 Option D: 4 Q13. During serial communication which Timer Count register is used to store the

count required to obtain the desired baudrate? Option A: TH1 Option B: TH0 Option C: TL1

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Option D: TL0 Q14. Which is the instruction given below that will initialize P0.0 as an input pin? Option A: SETB P0.0 Option B: CLR P0.0 Option C: MOV P0,#00 Option D: CLR P0 Q15. If digit 5 is to be displayed on 16x2 character LCD display, What data in

hexadecimal is to be sent on the data lines of LCD? Option A: 0x5 Option B: 0x35 Option C: 0x50 Option D: 0x53 Q16. What does T stand for in ARM7TDMI? Option A: Toggle Option B: Tiny Option C: Thin Option D: Thumb Q17. How many stage pipeline does ARM7TDMI have? Option A: 1 Option B: 2 Option C: 3 Option D: 4 Q18. How many bit processor is ARM7? Option A: 8 bit Option B: 16 bit Option C: 32 bit Option D: 64 bit Q19. In which mode is ARM7 while executing highest priority interrupt? Option A: FIQ mode Option B: IRQ mode Option C: USER mode Option D: ABORT mode Q20. Select an instruction of ARM7 which adds registers R4 and R5 and stores the

addition result in register R8. Option A: ADD R5, R4, R8 Option B: ADD R8, R4, R5 Option C: ADD R4, R5, R8 Option D: ADD R5, R8, R4 Q21. Which instruction given below is used by to change from ARM mode to

THUMB mode and also to save the return address in Link register?

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Option A: BL Option B: BLX Option C: B Option D: BX Q22. How many conditions are available in ARM7 using which instructions can

be conditionally executed? Option A: 16 Option B: 8 Option C: 4 Option D: 32 Q23. Is LPC2148 a microprocessor or a microcontroller and of how many bit? Option A: 8 bit Microcontroller Option B: 32 bit Microcontroller Option C: 32 bit Microprocessor Option D: 8 bit Microprocessor Q24. How many bit is the on-chip ADC of LPC2148? Option A: 32 bit ADC Option B: 16 bit ADC Option C: 11 bit ADC Option D: 10 bit ADC Q25. How many UART or UARTs are available on-chip in LPC2148 for serial

communication? Option A: 4 Option B: 3 Option C: 2 Option D: 1

University of Mumbai Examination 2020 under cluster 3 (FCRIT)

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Program: BE Electronics and Telecommunication Engineering

Curriculum Scheme: Revised 2012

Examination: Third Year SemesterV

Course Code – ETC501 and Course Name: Microcontrollers and Applications

Time: 1hour Max. Marks: 50

===============================================================================

Note to the students:- All Questions are compulsory and carry equal marks .

Q1. Which register holds 8 bit divisor and store the remainder especially after the execution of division operation?

Option A: A Register Option B: B Register Option C: Registers R0 through R7 Option D: D Register Q2. On Reset SP of 8051 points to address location Option A: 08h Option B: 0Fh Option C: 07H Option D: FFFFh Q3. How many parallel I/O ports are there in 8051? Option A: 2 Option B: 3 Option C: 4 Option D: 5 Q4. How much total external memory can be interfaced to 8051? Option A: 32K Option B: 64K Option C: 128K Option D: 256K Q5. Which instruction is used to move string of data byte by byte from Memory to

Accumulator Option A: LODS Option B: MOVSW Option C: STOS Option D: MOV

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Q6. In 8259 interrupt requests can enabled or disabled using Option A: Priority Interrupt Controller Option B: Priority resolver Option C: Interrupt Request Register Option D: Interrupt Mask Register Q7. Which instruction will load the value 54H into the high byte of timer0? Option A: MOV TH0, #54H Option B: MOV TH0, 54H Option C: MOV T0, #54H Option D: MOV T0, 54H Q8. The 16-bit address bus allows access to an address range of Option A: 0000 to FFFFH Option B: 000 to FFFH Option C: 00 to FFH Option D: 0 to FH Q9. The contents of the accumulator after this operation

MOV A,#0AH ANL A,#3DH will be

Option A: 11010111 Option B: 11011010 Option C: 00101000 Option D: 00001000 Q10. The End of conversion on the ADC0804 is done by using the: Option A: CS line Option B: INTR line Option C: EOC line Option D: V ref/2 line Q11. Which of the following statements will add the accumulator and register 5? Option A: ADD @R5, @A Option B: ADD @A, R5 Option C: ADD R5, A Option D: ADD A, R5 Q12. Which architecture is used in ARM processor? Option A: RISC Option B: CISC Option C: Both Option D: SCIR Q13. If ARM 7 encounters an invalid instruction following exception is generated

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Option A: Fast Interrupt Request Option B: Data Abort Option C: Prefetch abort Option D: Reset Q14. What is used to communicate between parts of device? Option A: Bus Option B: ALU Option C: Address Option D: Peripherals Q15. Which is used to speed up the data transfer? Option A: Cache Option B: RAM Option C: ROM Option D: PROM Q16. In ARM processor, in which file the data items are placed? Option A: I/O Option B: Register Option C: Memory Option D: Ports Q17. Which register acts as Stack Pointer in ARM? Option A: R13 Option B: R14 Option C: R15 Option D: R16 Q18. Which is the process of loading instructions? Option A: Decode Option B: Fetch Option C: Execute Option D: Pipeline Q19. What is used to extent the instruction set? Option A: Coprocessor Option B: Pipeline Option C: Multiprocessor Option D: Host Q20. Which interrupt is having highest priority in 8051? Option A: TF0 Option B: IE0 Option C: RI

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Option D: IE1 Q21. Size of address bus of ARM7 is Option A: 16 bit Option B: 8 bit Option C: 20 bit Option D: 32 bit Q22. Which instruction perform bitwise operations? Option A: Arithmetic Option B: Logical Option C: Compare Option D: Data transfer Q23. Which instruction change the content of memory with the content of register? Option A: SWAP Option B: LOAD Option C: STORE Option D: ADD Q24. Thumb mode of ARM7 Option A: Reduce memory requirement and cost Option B: Increases processing speed Option C: Instructions are 32 bit Option D: Can handle exception Q25. Which operations are performed by stack pointer during its decrement phase? Option A: POP Option B: PUSH Option C: RETURN Option D: CALL

University of Mumbai Examination 2020- Inter Cluster

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Program: BE Instrumentation Engineering

Curriculum Scheme: Revised 2012

Examination: Third Year Semester V

Course Code: ISC501 and Course Name: Signals and Systems

Time: 1hour Max. Marks: 50

======================================================================

Note to the students: - All Questions are compulsory and carry equal marks.

Q1. Analog signal can be converted into discrete time signals by Option A: Sampling Option B: Quantization Option C: Coding Option D: Filtering Q2. The sum of two periodic signals is periodic only if the ratio of their respective

periods T1/T2 is Option A: A rational number Option B: An irrational number Option C: A complex number Option D: A real number Q3. The signal is an energy signal if Option A: E=0, P=0 Option B: E=∞, P=finite Option C: E=finite, P=0 Option D: E=finite, P=∞ Q4. The system whose output depends on future inputs is a Option A: Static system Option B: Dynamic system Option C: Non-causal system Option D: Dynamic and non-causal both Q5. y[n]=x[2n] is a Option A: Time-invariant system Option B: Time variant, dynamic system Option C: Linear, time variant, dynamic system Option D: Linear, time invariant, static system Q6. x(t)=e-5tu(t) is a Option A: Power signal Option B: Energy signal

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Option C: Neither power nor energy signal Option D: Both energy and power signal Q7. δ(at) = Option A: δ(t) Option B: │a│ δ(t) Option C: 1/│a│ δ(t) Option D: δ2(t) Q8. ∫ 𝑥𝑥 (𝜏𝜏)∞

−∞ δ(t- 𝜏𝜏)d 𝜏𝜏 =

Option A: x(t) Option B: x(𝜏𝜏) Option C: x(t) δ(t) Option D: x (t- 𝜏𝜏) Q9. If x[n]= [1 1 2 -1] and h[n]= [1 0 1], what would be the sequence y[n] considering

linear convolution? Option A: y[n] = [-1 2 0 3 1 1] Option B: y[n] = [3 1 1 -1 2 0] Option C: y[n] = [1 1 3 0 2 -1] Option D: y[n] = [-1 -1 3 0 2 1] Q10. For the existence of Fourier series, Dirichlet’s conditions are Option A: Necessary Option B: Sufficient Option C: Necessary and sufficient Option D: Necessary but not sufficient Q11. The Exponential Fourier Series coefficient C-n in terms of Trigonometric Fourier

series coefficient is Option A: C-n = ½(an+jbn) Option B: C-n = ½(an-jbn) Option C: C-n = (an-jbn) Option D: C-n = (an+jbn) Q12. Fourier Series applies to Option A: Only periodic signals Option B: Only aperiodic signals Option C: Both periodic and aperiodic signals Option D: Only random signals Q13. The Inverse Fourier Transform x(t) of X(ω) is given by ½ π Option A:

� 𝑋𝑋(𝜔𝜔)𝑒𝑒−𝑖𝑖𝜔𝜔𝑖𝑖 𝑑𝑑𝜔𝜔∞

−∞

Option B: � 𝑋𝑋(𝜔𝜔)𝑒𝑒𝑖𝑖𝜔𝜔𝑖𝑖 𝑑𝑑𝜔𝜔∞

−∞

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Option C: � 𝑋𝑋(𝜔𝜔)𝑒𝑒−𝑖𝑖𝜔𝜔𝑖𝑖 𝑑𝑑𝜔𝜔𝑇𝑇/2

𝑇𝑇/2

Option D: � 𝐹𝐹(𝜔𝜔)𝑑𝑑𝜔𝜔∞

−∞

Q14. The Fourier Transform of x(-t) is Option A: X(ω) Option B: X(-ω) Option C: X(1/ω) Option D: -X(ω) Q15. The area under Fourier Transform, i.e., ∫ 𝑋𝑋(𝜔𝜔)𝑑𝑑𝜔𝜔∞

−∞ = Option A: x(0) Option B: X(0) Option C: 2 π x(0) Option D: ½ π x(0) Q16. Which one of the following cannot be the ROC of 5

(𝑠𝑠+3)(𝑠𝑠+4)

Option A: Re(s) > -3 Option B: Re(s) < -4 Option C: -4< Re(s) < -3 Option D: -3< Re(s) <-4 Q17. Inverse Laplace Transform of [ 1

(𝑠𝑠+1)(𝑠𝑠+2)]Pfor ROC; -2 < Re(s) < -1 is

Option A: e-tu(t) – e-2t u(t) Option B: -e-tu(-t) – e-2t u(t) Option C: e-tu(-t) – e-2t u(-t) Option D: e-tu(t) + e-2t u(-t) Q18. According to the time-shifting property of Laplace Transform, shifting the signal

in time domain corresponds to the Option A: Multiplication by e-st0 in the time domain Option B: Multiplication by e-st0 in the frequency domain Option C: Multiplication by est0 in the time domain Option D: Multiplication by est0 in the frequency domain Q19. When is the system said to be causal as well as stable in accordance to pole/zero

of ROC specified by system transfer function? Option A: Only if all the poles of system transfer function lie in left-half of S-plane Option B: Only if all the poles of system transfer function lie in right-half of S-plane Option C: Only if all the poles of system transfer function lie at the center of S-plane Option D: It can be anywhere Q20. The Z transform of a system is H(z) = 𝑧𝑧

𝑧𝑧−0.8 . If the ROC is │z│<0.8, the impulse

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response of the system is Option A: (0.8) n u (n) Option B: -(0.8) n u (-n-1) Option C: -(0.8) n u (n) Option D: (0.8) n u (-n-1) Q21. The ROC of a causal and stable system must include the Option A: Origin Option B: Infinity Option C: A ring Option D: Unit circle Q22. If X(z) is the z transform of x(n), the initial value theorem states that Option A: 𝑧𝑧

𝐿𝐿𝑖𝑖𝐿𝐿�⎯� 1 (z-1) X(z)

Option B: 𝑧𝑧𝐿𝐿𝑖𝑖𝐿𝐿�⎯� 0 X(z)

Option C: 𝑧𝑧𝐿𝐿𝑖𝑖𝐿𝐿�⎯� ∞ X(z)

Option D: 𝑧𝑧𝐿𝐿𝑖𝑖𝐿𝐿�⎯� ∞ zX(z)

Q23. What is the z-transform of the signal x(n)= (0.5) nu(n)? Option A: 1/1−0.5z−1; ROC: |z|>0.5 Option B: 1/1−0.5z−1; ROC: |z|<0.5 Option C: 1/1+0.5z−1; ROC: |z|>0.5 Option D: 1/1+0.5z−1; ROC: |z|<0.5 Q24. The z transform of a signal with X(s)= (1/s) is Option A: 1

1 − 𝑧𝑧2

Option B: 11 − 𝑧𝑧

Option C: 11 + 𝑧𝑧−1

Option D: 11 + 𝑧𝑧

Q25. Which statement about ROC is not true? Option A: ROC does not contain any pole Option B: ROC consists of a circle in z plane centered at origin Option C: ROC is a ring or disk in z plane Option D: ROC contains both poles and zeros

University of Mumbai Examination 2020 under cluster 3 (FCRIT)

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Program: BE Information Technology

Curriculum Scheme: Revised 2012

Examination: Third Year Semester V

Course Code: TEITC501 and Course Name: Computer Graphics and Virtual Reality

Time: 1hour Max. Marks: 50

==============================================================================

Note to the students:- All the Questions are compulsory and carry equal marks .

Q1. ________is also known as "camera" coordinate system

Option A: world coordinate system

Option B: object coordinate system

Option C: viewpoint coordinate system

Option D: viewport coordinate system

Q2. Memory area holding the intensity information of an image is called__________

Option A: Refresh buffer

Option B: Font cache

Option C: Picture definition

Option D: Video controller

Q3. The Cartesian slope-intercept equation for a straight line is_______

Option A: y = m.x + b

Option B: y = b.x + m

Option C: y = x.x + m

Option D: y = b + m.m

Q4. In Bresenham’s line algorithm, if the distances d1 < d2 then decision parameter Pk

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is______

Option A: Positive

Option B: Equal

Option C: Negative

Option D: Zero

Q5. Fractals deals with curves that are ?

Option A: regularly irregular

Option B: irregularly irregular

Option C: regularly regular

Option D: irregularly regular

Q6. A Bezier curve is a polynomial of degree ___________the no of control points used

Option A: One more than

Option B: One less than

Option C: Two more than

Option D: Two less than

Q7. Which of the following algorithm is used when we want to fill the area bounded by

different color boundaries ?

Option A: Boundary Fill

Option B: Scan line

Option C: Flood fill

Option D: Area Fill

Q8. The transformation that changes the size of object is __________

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Option A: Shear

Option B: Scaling

Option C: Rotation

Option D: Translation

Q9. To check whether the point is in the interior or exterior of polygon ______algorithm is

used

Option A: inside-outside test

Option B: polygon test

Option C: vertex test

Option D: poly_fill test

Q10. A composite transformation matrix can be made by determining the ________of

matrix of the individual transformation

Option A: Product

Option B: Addition

Option C: Subtraction

Option D: Negation

Q11. The ______ is the user's visible area of a web page.

Option A: Viewport

Option B: Window

Option C: Userport

Option D: Deviceport

Q12. In Cohen-Sutherland Line Clipping Algorithm,if the endpoints had codes of 1001 and

0110, the logical AND would be 0000, and the line ___________

Option A: could not be trivally rejected.

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Option B: can be trivally rejected

Option C: can be shortened

Option D: can be increased

Q13. The line is said to be interior to the clipping window if ___________point(s) is/ are

interior to the window.

Option A: any line

Option B: one end

Option C: both end

Option D: any two

Q14. Cohen-sutherland subdivision line clipping algorithm uses ________ regions with

diffrerent codes.

Option A: 4

Option B: 9

Option C: 10

Option D: 12

Q15. In sutherland -Hodgeman polygon clipping algorithm, if the first vertex of the edge is

outside the window boundry and the second vertex of the edge is inside then _____ and ____ are added to the output vertex list.

Option A: first vertex, second vertex

Option B: first vertex, the intersection point of the polygon edge with the window boundry

Option C: Second vertex,the intersection point of the polygon edge with the window boundry

Option D: first vertex and inbetween vertex

Q16. In orthographic projection, the projection lines are ______ to the projection plane.

Option A: Parallel

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Option B: Orthogonal

Option C: Inclined

Option D: Intersecting

Q17. In parallel projection by changing the viewing position we can get :

Option A: one view

Option B: two view

Option C: three view

Option D: any number of views

Q18. Which of the following is a technique to blend two or more images to form a new

image?

Option A: Modeling

Option B: Morphing

Option C: Warping

Option D: Animating

Q19. ____________ combines virtual worlds with networking, placing multiple

participants in a virtual space.

Option A: Virtual Reality

Option B: Hyper Reality

Option C: Hyper Media

Option D: Virtual Space

Q20. VRML stands for:

Option A: Virtual Reality Model Language

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Option B: Virtual Reality Modeling Language

Option C: Virtual Read-only Modeling Language

Option D: Virtual Reality Mode Language

Q21. ________is mainly used for educational or training purpose

Option A: Fully Immersive Simulations

Option B: Semi Immersive Simulations

Option C: Non Immersive Simulations

Option D: Immersive Simulations

Q22. The process of converting the 3D geometrical models populating a virtual world into a

2D scene presented to the user is called as____

Option A: Rendering

Option B: Morphing

Option C: Modeling

Option D: Animating

Q23. The _______studies the motion of a robot mechanism regardless of forces and torque

that cause it.

Option A: Kinematic model

Option B: Dynamic model

Option C: Reality model

Option D: Virtual model

Q24. _________is the process of capturing the properties of an object or a system using

mathematical formulae.

Option A: Geometric modeling

Option B: Kinematic modeling

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Option C: Physical modeling

Option D: Virtual modeling

Q25. VRML file contains _______that describes the scenes.

Option A: Nodes

Option B: Fields

Option C: values

Option D: geometry