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TRANSCRIPT
Real-Time Simulation of Large HVDC-AC
Grids
Reza Iravani
University of Toronto
CIGRE Session 44 - Paris
Workshop on DC Grid Modeling
August 28, 2012
Presentation Layout:
- Objectives
- Test Systems
- Component and Subsystem Models
- Wind Power Plant Model
- AC Network Equivalent Model
- VSC-HVDC Converter Station Model
- Control Hardware-in-the-loop (CHIL) Structure
- Conclusions
Objectives:
Analysis and performance evaluation of control and
protection strategies/algorithms in large HVDC-AC
systems.
Analysis of electromagnetic transients (emts)
Tasks:
Development of HVDC-AC grid component models:
- off-line simulation of emts (0-50kHz)
- real-time simulation of emts (0-10kHz)
Development of Control-HIL real-time simulation structure
for the analysis of emts of large HVDC-AC emts (0-10
kHz)
CIGRE VSC-HVDC Grid Test System
A1
B4
F1
E1
C2
C1
DC Grid Test System version 2012, March 5
B1
B2
B3
B5
B6
A0
B0
D1
Component/Subsystem Models:
- Wind Power Plant (WPP) wide frequency-band (0-
50kHz) equivalent model
- Type-3 based WPP
- Type-4 based WPP
- Frequency-dependent AC-network equivalent model
- Single-port (3-phase) equivalent
- Multi-port (3-phase) equivalent
- VSC-HVDC converter station model
- MMC-HVDC converter station
- 2-level/3-level VSC-based monopolar and
bipolar converter station (with/without
transformers)
WPP
Power System
PCC
WPP
PCC
FDNE Model
DLFE Model
(a)
(b)
Proposed Wind Power Plant (WPP) Dynamic Equivalent
• FDNE: Frequency-Dependent Network Equivalent of
all passive components within the WPP (for example
in the frequency range of 0-50 kHz)
- Two-Layer Network Equivalent Model
- Modified Two-Layer Network Equivalent model
- Frequency Scan and Vector Fitting
• LFDE: Low-Frequency Dynamic Equivalent of the
aggregated wind units and local controls of wind units
and the WPP supervisory control
- Generic Models (WSCC models)
- Vendor Specific Models
- User Defined Models
Reactive
Power
Control
Current Limits
Vref
Real
Power
Control
VPCC
Pref
Pmultiplier
IQmax
IQmin
IPmax
0
IPcmd
IQcmd
Real
Current
Limiter
Reactive
Current
Limiter
Qref
QPCC
IQmax IPmaxIQmin
PPCC
Qmax
Qmin
VRT
ControlIQ_VRT
IQ
IP
VRT_Flag
The Supervisory Control Block Structure of the WPP Dynamic Low-Frequency Equivalent Model
PCC Voltage: L-L-L-G Fault, Fault Clearing, Unsuccessful Reclosure, Fault Clearing
4.5 4.55 4.6 4.65 4.7 4.75 4.8 4.85 4.9 4.95
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
Time (s)
V(p.u.)
PCC Voltage- Phase b
Detailed Model
Equivalent Model
4.834 4.836 4.838 4.84 4.842 4.844-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
4.5 4.55 4.6 4.65 4.7 4.75 4.8 4.85 4.9 4.95
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
Time (s)
V(p.u.)
PCC Voltage- Phase a
Detailed Model
Equivalent Model
4.583 4.584 4.585 4.586 4.587 4.588 4.589 4.59 4.591 4.592
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
V (
p.u
.)V
(p
.u.)
Time (s)
PCC Voltage- Phase b
Detailed Model
Equivalent Model
Detailed Model
Equivalent Model
PCC Voltage – VRT
4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6 6.2 6.4
0
0.5
1
Time (s)
V(p
.u.)
Detailed Model
Equivalent Model
Grid Code
Implementation of WPP model in RTDS
0.8 0.82 0.84 0.86 0.88 0.9 0.92 0.94 0.96 0.98
-1.5
-1
-0.5
0
0.5
1
1.5
Time (s)
V (p
.u.)
PCC Voltage
0.955 0.96 0.965 0.97 0.975 0.98 0.985
-1.5
-1
-0.5
0
0.5
1
1.5
HVDC Converter Station Configurations:
- MMC based HVDC station
- 2-level/3-level VSC-based monopolar/bipolar stations
with/without transformer
- (DC/DC converter station?)
HVDC Converter Station Models:
- Fundamental-frequency model
- Dynamic averaged-model (switching function based)
- PMW model (detailed switched model)
RTDS-based Control-HIL Real-Time Simulation of
CIGRE HVDC Grid Benchmark
RTDS
(1)
Stratix IV
FPGA
Board
(1)
NI-cRIO
(2)
Stratix IV
FPGA
Board
(2)
NI-cRIO
(n)
Stratix IV
FPGA
Board
(n)
NI-cRIO
- AC & DC Lines
- Transformers
- T-G Units
- AC CBs
- WPP ?
Fast Processor
Power Management System
External
Info & Command
cRIO (PXI)
MMC controllerDQ-transforms
ControlsDetermine number of
modules to be switched
RTDS
Electrical system real-time simulations
Stratix IV FPGA Board
Module SimulationsVoltage Sorting
Module Switching Selections
Fiber optics connection
Fiber optics connection
Red: May be removed if fiber optics RIO module is used
Green: May be added if fiber optics RIO module is used
RTDS-Based Control-HIL Structure
Conclusions
• Type-4 and Type-3 WPP s are efficiently and accurately
modeled by a reduce-order equivalent for EMT studies.
• The frequency-dependent network-equivalent concept is
used for single- and multi-port AC system reduction in
large AC-DC systems.
• An RTDS-based augmented structure for Control-HIL of
large AC-DC systems is being evaluated.
Future Work
• Development of Type-3 based WPP
equivalent model
• Integration of WPP equivalent model in real-
time simulation environment
Admittance Magnitudes of the Fitted Equivalent and the Detailed Modeled Passive Network - (a) self admittance, (b) mutual admittance
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
x 104
10-6
10-4
10-2
100
Frequency (Hz)
Mag
nitu
de (p
.u.)
Detailed Model
FDNE
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
x 104
10-4
10-3
10-2
10-1
100
Frequency (Hz)
Mag
nitu
de (p
.u.)
Detailed Model
FDNE
PCC Voltage, L-G Fault
4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66 4.68
-1
-0.5
0
0.5
1
Time (s)
V(p
.u.)
PCC Voltage- Phase a
Detailed Model
Equivalent Model
4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66 4.68
-1
-0.5
0
0.5
1
Time (s)
V(p
.u.)
PCC Voltage- Phase c
4.654 4.655 4.656 4.657 4.658 4.659-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
4.654 4.655 4.656 4.657 4.658 4.659 4.66
-1.1
-1
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1PCC Voltage- Phase c
PCC Voltages: L-L-L-G Fault
4.48 4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66 4.68
-1
-0.5
0
0.5
1
Time (sec)
V(p.
u)
PCC Voltage- Phase a
Detailed System
Proposed Equivalent
4.65 4.652 4.654 4.656 4.658 4.66 4.662 4.664 4.666
-1
-0.5
0
0.5
1
V (
p.u
.)
4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66
-1
-0.5
0
0.5
1
Time (sec)
V(p.
u)
PCC Voltage- Phase b
Detailed System
Proposed Equivalent
Detailed Model
Equivalent Model
Detailed Model
Equivalent Model
V (
p.u
.)
Time (s)
PCC Voltage- Phase c
PCC Voltage- Phase a
4.5 4.501 4.502 4.503 4.504 4.505 4.506 4.507-1
-0.5
0
0.5
PCC Phase-c Voltage, L-L-L-G Fault
4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66 4.68-1.5
-1
-0.5
0
0.5
1
Time (s)
V(p
.u.)
PCC Voltage- Phase c
Detailed Model
FDNE Model
4.65 4.651 4.652 4.653 4.654 4.655 4.656 4.657 4.658
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
4.5 4.52 4.54 4.56 4.58 4.6 4.62 4.64 4.66 4.68
-1.5
-1
-0.5
0
0.5
1
Time (s)
V(p
.u.)
PCC Voltage- Phase c
Detailed Model
DLFE Model
4.65 4.652 4.654 4.656 4.658 4.66
-1.5
-1
-0.5
0
0.5
PCC Phase-c Voltage, L-L-L-G Fault
HVDC Converter Station Models:
- Fundamental-frequency model
- Dynamic averaged-model (switching function based)
- PMW model (detailed switched model)
RTDS-based Control-HIL Real-Time Simulation of CIGRE
HVDC Grid Benchmark
RTDS
(1)
Stratix IV
FPGA
Board
(1) (2)
Stratix IV
FPGA
Board
(2) (n)
Stratix IV
FPGA
Board
(n)
- AC & DC Lines
- Transformers
- T-G Units
- AC CBs
- WPP ?
Fast Processor
Power Management System
External
Info & Command