sama5d27 som1 datasheet - microchip...

SAMA5D27 SOM1 SAMA5D27 MPU, 1Gbit (128MB) DDR2 SDRAM, 10/100

Ethernet PHY, 64Mbit (8MB) Flash, Power Management IC,1Kbit EEPROM

Introduction

The Microchip SAMA5D27 SOM1 is a small single-sided System-On-Module (SOM) based on the high-performance System-in-Package 32-bit Arm Cortex-A5 processor-based MPU SAMA5D27 and 1GbDDR2 SDRAM running up to 500 MHz.

The SAMA5D27 SOM1 is built on a common set of proven Microchip components to reduce time tomarket by simplifying hardware design and software development.

The SOM also limits design rules of the main application board, reducing overall PCB complexity andcost. The SAMA5D27 SOM1 is delivered with a free Linux distribution and bare metal C examples.

Figure 1.SAMA5D27 SOM1

Features

System-In-Package (SAMA5D27C-D1G-CU) including: Arm Cortex-A5 processor-based SAMA5D2 MPU 1Gbit DDR2 SDRAM

On-Board Power Management Unit (MIC2800-G1JJYML) 1Kb Serial EEPROM with EUI-48 Node Identity (24AA02E48T-I/OT)

2017 Microchip Technology Inc. Datasheet DS60001521A-page 1

64Mb Serial Quad I/O Flash Memory (SST26VF064BT-104I/MF) 10Base-T/100Base-TX Ethernet PHY (KSZ8081RNAIA) 40 x 38 mm Module, Pitch 0.8mm, solderable by hand 103 I/Os Up to 7 Tampers One USB Device, one USB Host and one HSIC Interface Shutdown and Reset Control Pins Independent Power Supplies Available for Camera Sensor, for SD Card and for Backup depending on

Voltage Domains Operational Specifications:

Main operating voltage: 3.3V 5% Temperature range: -40C to 85C Integrated crystals, internal voltage regulators Multiple interfaces and I/Os for easy application development

Applications

Industrial Applications Motor Control Human Machine Interface Home Automation

SAMA5D27 SOM1


Table of Contents

Introduction......................................................................................................................1

Features.......................................................................................................................... 1

Applications..................................................................................................................... 2

1. Description.................................................................................................................5

2. Reference Documents...............................................................................................6

3. Block Diagram........................................................................................................... 7

4. Pinout........................................................................................................................ 84.1. Pinout Overview........................................................................................................................... 84.2. Pin List .........................................................................................................................................9

5. Functional Description............................................................................................. 165.1. SAMA5D27 System-In-Package................................................................................................ 165.2. Power Supplies.......................................................................................................................... 185.3. System Control...........................................................................................................................185.4. Ethernet PHY............................................................................................................................. 195.5. QSPI Memory.............................................................................................................................205.6. EEPROM Memory......................................................................................................................21

6. Power Supply Connections and Timing Sequences................................................236.1. Power Supply Configuration #1..................................................................................................236.2. Power Supply Configuration #2..................................................................................................246.3. Power Supply Configuration #3..................................................................................................266.4. Power Supply Configuration #4..................................................................................................27

7. Booting Guidelines.................................................................................................. 307.1. Boot Process..............................................................................................................................307.2. Boot Configuration......................................................................................................................307.3. NVM Programming.....................................................................................................................317.4. Boot From External Memory...................................................................................................... 31

8. Debug Considerations............................................................................................. 33

9. Electrical Characteristics......................................................................................... 349.1. Absolute Maximum Ratings........................................................................................................349.2. Operational Characteristics........................................................................................................349.3. DC Electrical Characteristics......................................................................................................35

10. Mechanical Characteristics......................................................................................3710.1. Module Dimensions....................................................................................................................3710.2. Module Land Pattern..................................................................................................................38


11. Reflow Profile.......................................................................................................... 40

12. Ordering Information................................................................................................41

13. Revision History.......................................................................................................42

The Microchip Web Site................................................................................................ 43

Customer Change Notification Service..........................................................................43

Customer Support......................................................................................................... 43

Product Identification System........................................................................................44

Microchip Devices Code Protection Feature................................................................. 44

Legal Notice...................................................................................................................44

Trademarks................................................................................................................... 45

Quality Management System Certified by DNV.............................................................45

Worldwide Sales and Service........................................................................................46

SAMA5D27 SOM1


1. DescriptionThe SAMA5D27 SOM1 is a high-performance System-On-Module based on the 32-bit ARM Cortex-A5RISC SAMA5D2 processor. The SAMA5D27 SOM1 is certified for industrial operating conditions over a-40 to 85C temperature range.

The system of the SAMA5D27 SOM1 operates at a maximum CPU operating frequency of 500 MHz anda maximum bus speed of 166 MHz. It features up to:

1 Gbit of DDR2 SDRAM memory (SAMA5D27C-D1G-CU) 1 Kb of EEPROM memory (24AA02E48T-I/OT) with EUI-48 64 Mb of QSPI Flash (SST26VF064BT-104I/MF) memory

The SAMA5D27 SOM1 is a 176-pin, 0.8mm pad pitch module with a 40mm x 38mm size.

The SAMA5D27 SOM1 offers an extensive peripheral set, including High-speed USB Host and Device,HSIC Interface, 10Base-T/100Base-TX Ethernet Interface, system control and up to 103 I/Os featuring:

Up to 4 UARTS Up to 4 Flexcoms Up to 6 Capactive Touch lines for up to 9 touch buttons Up to 4 ADC Inputs Up to 2 CAN Up to 7 Tamper Pins Serial Interfaces such as SPI, TWI, QSPI, SSC and IS SD/MMC, eMMC, SDIO Interfaces Up to 24-bit LCD RGB Interface CMOS Camera Interface Mono PDMIC and Full-Bridge Class-D Stereo

Tip: Each I/O of the SAMA5D27 SOM1 is configurable, as either a general-purpose I/O lineonly, or as an I/O line multiplexed with up to six peripheral I/Os. As the multiplexing is hardware-defined, the hardware designer and programmer must carefully determine the configuration ofthe PIO Controllers required by their application.

SAMA5D27 SOM1


2. Reference DocumentsThe SAMA5D27 SOM1 is equipped with various Microchip silicon devices. The relevant documentation islisted in the table below.

Type Document Title Available Ref. No./Product

Datasheet SAMA5D2 www.microchip.com/SAMA5D2 DS60001476

Datasheet SAMA5D2 System-In-Package(SIP)www.microchip.com/

SAMA5D2 SIP DS60001484

Datasheet Serial EEPROMs with EUI-48Node Identitywww.microchip.com/

24AA02E48 24AA02E48T-I/OT

Datasheet 10BASE-T/100BASE-TXEthernet PHY www.microchip.com/ksz8081 KSZ8081RNAIA

Datasheet Serial Quad I/O (SQI) FlashMemorywww.microchip.com/

sst26vf064b SST26VF064BT-104I/MF

Datasheet Digital Power Management IC www.microchip.com/mic2800 MIC2800-G1JJYML

SAMA5D27 SOM1


http://www.microchip.com/design-centers/32-bit-mpus/sama5-new/sama5d2-serieshttp://www.microchip.com/design-centers/32-bit-mpus/sama5-new/sama5d2-serieshttp://microchip.com/sama5d2sipshttp://microchip.com/sama5d2sipshttp://www.microchip.com/wwwproducts/en/24AA02E48http://www.microchip.com/wwwproducts/en/24AA02E48http://www.microchip.com/wwwproducts/en/ksz8081http://www.microchip.com/wwwproducts/en/sst26vf064bhttp://www.microchip.com/wwwproducts/en/sst26vf064bhttp://www.microchip.com/wwwproducts/en/mic2800

3. Block DiagramFigure 3-1.SAMA5D27 SOM1 Block Diagram

MPU + DDR2 1GbSAMA5D27C-D1G-CU

LFBGA289

64Mbit Serial QUAD I/OFlash Memory

SST26VF064BT-104I/MF

1K Serial EEPROMwith EUI-48 Node Identity

24AA02E48T-I/OT

10BASE-T / 100BASE-TXPHY With RMII Support

KSZ8081RNAIA

Power ManagementUnit

MIC2800-G1JJYML

VDDSDHC VDDISC VDDBU

MAIN3.3V

TWI Interface

103 I/O Available

CLA

SS-D

Ste

reo

eMM

C In

terfa

ce

QSP

I Int

erfa

ce

Cam

era

Inte

rface

Up

to 6

* PT

C B

utto

ns

Up

to 4

* AD

C In

puts

TWI I

nter

face

Up

to 4

* U

ART

2 * S

PI In

terfa

ces

Up

to 4

* FL

EXC

OM

LCD

Inte

rface

up

to 2

4-bi

t

SSC

Inte

rface

Mon

o PD

MIC

Inte

rface

Up

to 2

* C

AN

IS In

terfa

ce

SDIO

Inte

rface

SD-C

ARD

Int

erfa

ce

ExternalQSPI

Connection

JTAG & DBGU Interfaces DEBUG

SYSTEM

MISC

USB Dev.

USB Host

HSIC

BACKUP7 * PIOBU

RXDWAKEUPRESET

SHUTDOWN

CLK_AUDIO

COMPP / COMPN

Disable Boot

USB Device Connector

USB Host Connector

HSIC Device

PhysicalReceiver

TransceiverInterface

SAMA5D27 SOM1


4. Pinout

4.1 Pinout OverviewThe categories of pins are listed below:

Red: Power Supplies Black: Ground Blue: Signals Orange: Reserved for future use

Figure 4-1.SAMA5D27 SOM1 Pinout Overview

PC03

/LCD

PWM

/TIO

A1/S

PI1_

MIS

O/I2

SWS0

PB01/SPI0_SPCK/PWML1/CLASSD_R0

PB04/UTXD4/FIQ/CLASSD_R3

PC09/FIQ/ISI_D0/TIOA4PC12/ISI_D3/URXD3/TK0/A1

PC16

/ISI_

D7/R

K0/A

5

RFU2

RFU1

PC11

/ISI_

D2/T

CLK4

/CAN

RX0/

A0/N

BS0

PC18

/ISI_

D9/F

LEXC

OM3_

IO2/

A7

GND_

20

PB28

/LCD

DAT1

7/FL

EXCO

M0_

IO0/

TIOA

5

PB29

/LCD

DAT1

8/FL

EXCO

M0_

IO1/

TIOB

5

PB30

/LCD

DAT1

9/FL

EXCO

M0_

IO2/

TCLK

5

PB31

/LCD

DAT2

0/FL

EXCO

M0_

IO3

PC00

/LCD

DAT2

1/FL

EXCO

M0_

IO4

PC01

/LCD

DAT2

2/CA

NTX0

/SPI

1_SP

CK/I2

SCK 0

PC02

/LCD

DAT2

3/CA

NRX0

/SPI

1_M

OSI/I

2SM

CK0

PC07

/LCD

PCK/

TWCK

1/SP

I1_N

PCS3

/URX

D1

PB13

/LCD

DAT2

/PCK

1

PB14

/LCD

DAT3

/TK1

/I2SM

CK1

PB15

/LCD

DAT4

/TF1

/I2SC

K1

PB16

/LCD

DAT5

/TD1

/I2SW

S1

PB17

/LCD

DAT6

/RD1

/I2SD

I1

PB18

/LCD

DAT7

/RK1

/I2SD

O1

PB19

/LCD

DAT8

/RF1

/TIO

A3

PB20

/LCD

DAT9

/TK0

/TIO

B3/P

CK1

PB21

/LCD

DAT1

0/TF

0/TC

LK3/

FLEX

COM

3_IO

2

PB23

/LCD

DAT1

2/RD

0/TI

OB2/

FLEX

COM

3_IO

0

PB24

/LCD

DAT1

3/RK

0/TC

LK2/

FLEX

COM

3_IO

3

PB25

/LCD

DAT1

4/RF

0/FL

EXCO

M3_

IO4

PB26

/LC D

DAT1

5/UR

XD0

PB27

/LCD

DAT1

6/UT

XD0

PB11

/LCD

DAT0

/URX

D3/P

DMDA

T0

PB12

/LCD

DAT1

/UTX

D3/P

DMCL

K0

PB05

/TCL

K2/P

WM

H2/Q

SPI1

_SCK

PB07

/TIO

B2/P

WM

H3/Q

SPI1

_IO0

PB09

/TIO

A3/P

WM

FI1/Q

SPI1

_IO2

PB10

/TIO

B3/P

WM

EXTR

G1/Q

SPI1

_IO3

PC08

/LCD

DEN/

FIQ/P

CK0/

UTXD

1

GND_

24

GND_

23

GND_

22

GND_

21

PC22/ISI_VSYNC/FLEXCOM3_IO4/A11

PC14/ISI_D5/TD0/A3

PC20/ISI_D11/FLEXCOM3_IO0/A9

PC15/ISI_D6/RD0/A4PC24/ISI_MCK/A13

SHDN

VDDIN_3V3VDDIN_3V3

VDDISC

PD22/EEPROM_TWCK_PD22PD21/EEPROM_TWD_PD21

PD03/UTXD1/FIQ/NWAIT/PTCROW0

PD04/TWD1/NCS0/PTCROW1

PD05/TWCK1/NCS1/PTCROW2PD06/PCK1/NCS2/PTCROW3

PD07/NWR1/NBS1/PTCROW4

PD08/NANDRDY/PTCROW5

GND_04

GND_06

PD24/UTXD2/AD5PD23/URXD2/AD4

GND_03

RXD

ETH_RXMETH_RXP

ETH_LED0

ETH_TXMETH_TXP

GND_05

PC10/ISI_D1/TIOB4/CANTX0

PC13/ISI_D4/UTXD3/TF0/A2PC17/ISI_D8/RF0/A6

PC19/ISI_D10/FLEXCOM3_IO1/A8PC21/ISI_PCK/FLEXCOM3_IO3/A10

PD26/AD7PIOBU1

GND_00

GND_01

GND_02

GND_

09

PD27

/JTA

G_TC

K

PD28

/JTA

G_TD

IPD

29/J

TAG_

TDO

PD30

/JTA

G_TM

S

PIO

BU7

PA11

/SDM

MC0

_VDD

SEL/

TCLK

4/A2

2/NA

NDCL

E

PA00

/SDM

MC0

_CK/

QSPI

O0_S

LK/D

0

PA06

/SDM

MC0

_DAT

4/TI

OA5/

FLEX

COM

2_IO

0/D6

PA07

/SDM

MC0

_DAT

5/TI

OB5/

FLEX

COM

2_IO

1/D7

PA08

/SDM

MC0

_DAT

6/TC

LK5/

FLEX

COM

2_IO

2/NW

E/NA

NDW

EPA

09/S

DMM

C0_D

AT7/

TIOA

4/FL

EXCO

M2_

IO3/

NCS3

PA10

/SDM

MC0

_RST

N/TI

OB4/

FLEX

COM

2_IO

4/A2

1/NA

NDAL

E

GND_

07

VDDB

U

PD19

/PCK

0/TW

D1/A

D0PD

20/T

IOA2

/TW

CK1/

AD1

PIO

BU3

CLK_

AUDI

OnR

ST

PA03

/SDM

MC0

_DAT

1/QS

PI0_

IO1/

D3

PA02

/SDM

MC0

_DAT

0/QS

PI0_

IO0/

D2PA

04/S

DMM

C0_D

AT2/

QSPI

0_IO

2/D4

PA05

/SDM

MC0

_DAT

3/QS

PI0_

IO3/

D5

PIO

BU5

PIO

BU6

PIO

BU4

WKU

P

PIO

BU2

GND_

10

GND_

08

GND_

15

RFU0

PD25/AD6

PD01/A24

PC26/CANTX1/A15PC27/PCK1/CANRX1/A16

PC28/FLEXCOM4_IO0/PCK2/A17PC29/FLEXCOM4_IO1/A18

PC30/FLEXCOM4_IO2/A19PB00/SPI0_MOSI/PWMH1

PA14/SPI0_SPCK/TK1/QSPI0_SCK/I2SMCK1/FLEXCOM3_IO2/D9

PA15/SPI0_MOSI/TF1/QSPI0_CS/I2SCK1/FLEXCOM3_IO0/D10

PA16/SPI0_MISO/TD1/QSPI0_IO0/I2SWS1/FLEXCOM3_IO3/D11

PA17/SPI0_NPCS0/RD1/QSPI0_IO1/I2SDI1/FLEXCOM3_IO4/D12

PA18/SPI0_NPCS1/RK1/QSPI0_IO2/I2SDO1/SDMMC1_DAT0/D13PA20/SPI0_NPCS3/TIOB0/SDMMC1_DAT2/D15

PA22/FLEXCOM1_IO2/SPI1_SPCK/SDMMC1_CK/QSPI0_SCK

PA25/FLEXCOM1_IO3/SPI1_NPCS0/QSPI0_IO1

PA26/FLEXCOM1_IO4/SPI1_NPCS1/QSPI0_IO2

PB03/URXD4/IRQ/PWMEXTRG0/CLASSD_R2PB02/PWMFI0/CLASSD_R1

PA21/PCK2/IRQ/TCLK0/SDMMC1_DAT3/NANDRDY

PA27/TIOA1/SPI0_NPCS2/SPI1_NPCS2/SDMMC1_RSTN/QSPI0_IO3

PA23/FLEXCOM1_IO1/SPI1_MOSI/QSPI0_CS

PA24/FLEXCOM1_IO0/SPI1_MISO/QSPI0_IO0

GND_19

DIS_BOOTPB06/TIOA2/PWML2/QSPI1_CSPB08/TCLK3/PWML3/QSPI1_IO1

PD00/FLEXCOM4_IO4/UTXD3/A23

PA12/SDMMC0_WP/IRQ/NRD/NANDOEPA13/SDMMC0_CD/FLEXCOM3_IO1/D8

PA28/TIOB1/SPI0_NPCS3/SPI1_NPCS3/SDMMC1_CMD/CLASSD_L0PA29/TCLK1/SPI0_NPCS1/SDMMC1_WP/CLASSD_L1

PA30/SPI0_NPCS0/PWMH0/SDMMC1_CD/CLASSD_L2PA31/SPI0_MISO/PWML0/CLASSD_L3

GND_17

GND_16

GND_18

PA01

/SDM

MC0

_CM

D/QS

PI0_

CS/D

1GN

D_14

PD02/URXD1/A25

COM

PPCO

MPN

USBA

_MUS

BA_P

GND_

11VD

DSDH

C

USBB

_MUS

BB_P

STRO

BEDA

TA

GND_

13

GND_

12

PA19/SPI0_NPCS2/RF1/QSPI0_IO3/TIOA0/SDMMC1_DAT1/D14

PC31/FLEXCOM4_IO3/URXD3/A20

PC04

/LCD

DISP

/TIO

B1/S

PI1_

NPCS

0/I2

SDI0

PC05

/LCD

VSYN

C/TC

LK1/

SPI1

_NPC

S1/I2

SDO0

PC06

/LCD

HSYN

C/TW

D1/S

PI1_

NPCS

2

PB22

/LCD

DAT1

1/TD

0/TI

OA2/

FLEX

COM

3_IO

1

PC23

/ISI_

HSYN

C/A1

2

PC25

/ISI_

FIELD

/A14

1

5

10

15

20

25

30

35

40

42

43 45 50 55 60 65 70 75 80 85 88

8990

95

100

105

110

115

120

125

130

176

131

135

140

145

150

155

160

165

170

175

SAMA5D27 SOM1


4.2 Pin ListThe pin list of the SAMA5D27 SOM1 is provided in the following tables.

Table 4-1.System-On-Module Pin Description: PIOA

Pin Number PIO Power Rail Other Features Type

80 PA00 VDDSDHC SDMMC0_CK/QSPIO0_SLK/D0 I/O

76 PA01 VDDSDHC SDMMC0_CMD/QSPI0_CS/D1 I/O

83 PA02 VDDSDHC SDMMC0_DAT0/QSPI0_IO0/D2 I/O




86 PA06 VDDSDHC SDMMC0_DAT4/TIOA5/FLEXCOM2_IO0/D6

I/O

79 PA07 VDDSDHC SDMMC0_DAT5/TIOB5/FLEXCOM2_IO1/D7

I/O

78 PA08 VDDSDHC SDMMC0_DAT6/TCLK5/FLEXCOM2_IO2/NWE/NANDWE

I/O

77 PA09 VDDSDHC SDMMC0_DAT7/TIOA4/FLEXCOM2_IO3/NCS3

I/O

82 PA10 VDDSDHC SDMMC0_RSTN/TIOB4/FLEXCOM2_IO4/A21/NANDALE

I/O

87 PA11 VDDIN_3V3 SDMMC0_VDDSEL/TCLK4/A22/NANDCLE

I/O

92 PA12 VDDIN_3V3 SDMMC0_WP/IRQ/NRD/NANDOE I/O

91 PA13 VDDIN_3V3 SDMMC0_CD/FLEXCOM3_IO1/D8 I/O

111 PA14 VDDIN_3V3 SPI0_SPCK/TK1/QSPI0_SCK/I2SMCK1/FLEXCOM3_IO2/D9

I/O

109 PA15 VDDIN_3V3 SPI0_MOSI/TF1/QSPI0_CS/I2SCK1/FLEXCOM3_IO0/D10

I/O

112 PA16 VDDIN_3V3 SPI0_MISO/TD1/QSPI0_IO0/I2SWS1/FLEXCOM3_IO3/D11

I/O

108 PA17 VDDIN_3V3 SPI0_NPCS0/RD1/QSPI0_IO1/I2SDI1/FLEXCOM3_IO4/D12

I/O

105 PA18 VDDIN_3V3 SPI0_NPCS1/RK1/QSPI0_IO2/I2SDO1/SDMMC1_DAT0/D13

I/O

101 PA19 VDDIN_3V3 SPI0_NPCS2/RF1/QSPI0_IO3/TIOA0/SDMMC1_DAT1/D14

I/O

SAMA5D27 SOM1



104 PA20 VDDIN_3V3 SPI0_NPCS3/TIOB0/SDMMC1_DAT2/D15

I/O

103 PA21 VDDIN_3V3 PCK2/IRQ/TCLK0/SDMMC1_DAT3/NANDRDY

I/O

106 PA22 VDDIN_3V3 FLEXCOM1_IO2/SPI1_SPCK/SDMMC1_CK/QSPI0_SCK

I/O

102 PA23 VDDIN_3V3 FLEXCOM1_IO1/SPI1_MOSI/QSPI0_CS

I/O

99 PA24 VDDIN_3V3 FLEXCOM1_IO0/SPI1_MISO/QSPI0_IO0

I/O

97 PA25 VDDIN_3V3 FLEXCOM1_IO3/SPI1_NPCS0/QSPI0_IO1

I/O

100 PA26 VDDIN_3V3 FLEXCOM1_IO4/SPI1_NPCS1/QSPI0_IO2

I/O

90 PA27 VDDIN_3V3 TIOA1/SPI0_NPCS2/SPI1_NPCS2/SDMMC1_RSTN/QSPI0_IO3

I/O

95 PA28 VDDIN_3V3 TIOB1/SPI0_NPCS3/SPI1_NPCS3/SDMMC1_CMD/CLASSD_L0

I/O

96 PA29 VDDIN_3V3 TCLK1/SPI0_NPCS1/SDMMC1_WP/CLASSD_L1

I/O

94 PA30 VDDIN_3V3 SPI0_NPCS0/PWMH0/SDMMC1_CD/CLASSD_L2

I/O

93 PA31 VDDIN_3V3 SPI0_MISO/PWML0/CLASSD_L3 I/O

Table 4-2.System-On-Module Pin Description: PIOB


119 PB00 VDDIN_3V3 SPI0_MOSI/PWMH1 I/O

122 PB01 VDDIN_3V3 SPI0_SPCK/PWML1/CLASSD_R0 I/O

124 PB02 VDDIN_3V3 PWMFI0/CLASSD_R1 I/O

123 PB03 VDDIN_3V3 URXD4/IRQ/PWMEXTRG0/CLASSD_R2

I/O

125 PB04 VDDIN_3V3 UTXD4/FIQ/CLASSD_R3 I/O

134 PB05 VDDIN_3V3 TCLK2/PWMH2/QSPI1_SCK I/O

127 PB06 VDDIN_3V3 TIOA2/PWML2/QSPI1_CS I/O

133 PB07 VDDIN_3V3 TIOB2/PWMH3/QSPI1_IO0 I/O

128 PB08 VDDIN_3V3 TCLK3/PWML3/QSPI1_IO1 I/O

132 PB09 VDDIN_3V3 TIOA3/PWMFI1/QSPI1_IO2 I/O

SAMA5D27 SOM1



135 PB10 VDDIN_3V3 TIOB3/PWMEXTRG1/QSPI1_IO3 I/O

148 PB11 VDDIN_3V3 LCDDAT0/URXD3/PDMDAT0 I/O

151 PB12 VDDIN_3V3 LCDDAT1/UTXD3/PDMCLK0 I/O

155 PB13 VDDIN_3V3 LCDDAT2/PCK1 I/O

150 PB14 VDDIN_3V3 LCDDAT3/TK1/I2SMCK1 I/O

162 PB15 VDDIN_3V3 LCDDAT4/TF1/I2SCK1 I/O

154 PB16 VDDIN_3V3 LCDDAT5/TD1/I2SWS1 I/O

157 PB17 VDDIN_3V3 LCDDAT6/RD1/I2SDI1 I/O

152 PB18 VDDIN_3V3 LCDDAT7/RK1/I2SDO1 I/O

158 PB19 VDDIN_3V3 LCDDAT8/RF1/TIOA3 I/O

156 PB20 VDDIN_3V3 LCDDAT9/TK0/TIOB3/PCK1 I/O

164 PB21 VDDIN_3V3 LCDDAT10/TF0/TCLK3/FLEXCOM3_IO2

I/O

161 PB22 VDDIN_3V3 LCDDAT11/TD0/TIOA2/FLEXCOM3_IO1

I/O

160 PB23 VDDIN_3V3 LCDDAT12/RD0/TIOB2/FLEXCOM3_IO0

I/O

168 PB24 VDDIN_3V3 LCDDAT13/RK0/TCLK2/FLEXCOM3_IO3

I/O

159 PB25 VDDIN_3V3 LCDDAT14/RF0/FLEXCOM3_IO4 I/O

169 PB26 VDDIN_3V3 LCDDAT15/URXD0 I/O

163 PB27 VDDIN_3V3 LCDDAT16/UTXD0 I/O

167 PB28 VDDIN_3V3 LCDDAT17/FLEXCOM0_IO0/TIOA5 I/O

144 PB29 VDDIN_3V3 LCDDAT18/FLEXCOM0_IO1/TIOB5 I/O

165 PB30 VDDIN_3V3 LCDDAT19/FLEXCOM0_IO2/TCLK5 I/O

143 PB31 VDDIN_3V3 LCDDAT20/FLEXCOM0_IO3 I/O

Table 4-3.System On Module Pin Table : PIOC


145 PC00 VDDIN_3V3 LCDDAT21/FLEXCOM0_IO4 I/O

141 PC01 VDDIN_3V3 LCDDAT22/CANTX0/SPI1_SPCK/I2SCK0

I/O

146 PC02 VDDIN_3V3 LCDDAT23/CANRX0/SPI1_MOSI/I2SMCK0

I/O

SAMA5D27 SOM1



142 PC03 VDDIN_3V3 LCDPWM/TIOA1/SPI1_MISO/I2SWS0

I/O

136 PC04 VDDIN_3V3 LCDDISP/TIOB1/SPI1_NPCS0/I2SDI0

I/O

137 PC05 VDDIN_3V3 LCDVSYNC/TCLK1/SPI1_NPCS1/I2SDO0

I/O

140 PC06 VDDIN_3V3 LCDHSYNC/TWD1/SPI1_NPCS2 I/O

139 PC07 VDDIN_3V3 LCDPCK/TWCK1/SPI1_NPCS3/URXD1

I/O

138 PC08 VDDIN_3V3 LCDDEN/FIQ/PCK0/UTXD1 I/O

2 PC09 VDDISC FIQ/ISI_D0/TIOA4 I/O

9 PC10 VDDISC ISI_D1/TIOB4/CANTX0 I/O

175 PC11 VDDISC ISI_D2/TCLK4/CANRX0/A0/NBS0 I/O

3 PC12 VDDISC ISI_D3/URXD3/TK0/A1 I/O

4 PC13 VDDISC ISI_D4/UTXD3/TF0/A2 I/O

8 PC14 VDDISC ISI_D5/TD0/A3 I/O

12 PC15 VDDISC ISI_D6/RD0/A4 I/O

174 PC16 VDDISC ISI_D7/RK0/A5 I/O

5 PC17 VDDISC ISI_D8/RF0/A6 I/O

172 PC18 VDDISC ISI_D9/FLEXCOM3_IO2/A7 I/O



7 PC21 VDDISC ISI_PCK/FLEXCOM3_IO3/A10 I/O

11 PC22 VDDISC ISI_VSYNC/FLEXCOM3_IO4/A11 I/O

170 PC23 VDDISC ISI_HSYNC/A12 I/O

13 PC24 VDDISC ISI_MCK/A13 I/O

173 PC25 VDDISC ISI_FIELD/A14 I/O

115 PC26 VDDIN_3V3 CANTX1/A15 I/O

114 PC27 VDDIN_3V3 PCK1/CANRX1/A16 I/O

117 PC28 VDDIN_3V3 FLEXCOM4_IO0/PCK2/A17 I/O

118 PC29 VDDIN_3V3 FLEXCOM4_IO1/A18 I/O

120 PC30 VDDIN_3V3 FLEXCOM4_IO2/A19 I/O

116 PC31 VDDIN_3V3 FLEXCOM4_IO3/URXD3/A20 I/O

SAMA5D27 SOM1


Table 4-4.System-On-Module Pin Description: PIOD


121 PD00 VDDIN_3V3 FLEXCOM4_IO4/UTXD3/A23 I/O

113 PD01 VDDIN_3V3 A24 I/O

23 PD02 VDDIN_3V3 URXD1/A25 I/O

24 PD03 VDDIN_3V3 UTXD1/FIQ/NWAIT/PTCROW0 I/O

27 PD04 VDDIN_3V3 TWD1/NCS0/PTCROW1 I/O

21 PD05 VDDIN_3V3 TWCK1/NCS1/PTCROW2 I/O

22 PD06 VDDIN_3V3 PCK1/NCS2/PTCROW3 I/O

25 PD07 VDDIN_3V3 NWR1/NBS1/PTCROW4 I/O

28 PD08 VDDIN_3V3 NANDRDY/PTCROW5 I/O

58 PD19 VDDIN_3V3 PCK0/TWD1/AD0 I/O

57 PD20 VDDIN_3V3 TIOA2/TWCK1/AD1 I/O

19 PD21 VDDIN_3V3 EEPROM_TWD_PD21 I/O

20 PD22 VDDIN_3V3 EEPROM_TWCK_PD22 I/O

30 PD23 VDDIN_3V3 URXD2/AD4 I/O

29 PD24 VDDIN_3V3 UTXD2/AD5 I/O

110 PD25 VDDIN_3V3 AD6 I/O

34 PD26 VDDIN_3V3 AD7 I/O

53 PD27 VDDIN_3V3 JTAG_TCK I/O

51 PD28 VDDIN_3V3 JTAG_TDI I/O

52 PD29 VDDIN_3V3 JTAG_TDO I/O

54 PD30 VDDIN_3V3 JTAG_TMS I/O

Table 4-5.System-On-Module Pin Description: System

Pin Number PIO Power Rail Designation Type

61 CLK_AUDIO VDDIN_3V3 Audio clock Output

64 COMPN VDDBU External analog comparator input Input

63 COMPP VDDBU External analog comparator input Input

126 DIS_BOOT VDDIN_3V3 QSPI Interface Disable pin Input

67 USBA_M VDDIN_3V3 USB Device High Speed Data -

68 USBA_P VDDIN_3V3 USB Device High Speed Data +

70 USBB_M VDDIN_3V3 USB Host Port B High Speed Data -

71 USBB_P VDDIN_3V3 USB Host Port B High Speed Data +

SAMA5D27 SOM1


Pin Number PIO Power Rail Designation Type

74 DATA VDDHSIC USB High-Speed Inter-Chip Data

73 STROBE VDDHSIC USB High-Speed Inter-Chip Strobe

60 NRST VDDIN_3V3 Microprocessor reset Input / ActiveLow

33 PIOBU1 VDDBU Tamper or Wakeup input Input







32 RXD VDDBU Low Power Asynchronous Receiver Input

35 SHDN VDDBU Shutdown Control Output

49 WKUP VDDBU Wakeup Input

36 ETH_LED0 VDDIN_3V3 Status LED control for Ethernet ports Output

37 ETH_RXM 2.5V Physical receive or transmit signal (differential) I/O

38 ETH_RXP 2.5V Physical receive or transmit signal (+differential) I/O

40 ETH_TXM 2.5V Physical receive or transmit signal (differential) I/O

41 ETH_TXP 2.5V Physical receive or transmit signal (+differential) I/O

Table 4-6.System-On-Module Pin Description: Power

Pin Number PIO Description Comments

16,17 VDDIN_3V3 Main 3.3V Supply inputs. Used forPeripheral I/O lines and MIC2800-G1JJYML supplies.

55 VDDBU Input supply for Slow ClockOscillator, internal 32 kHz RCOscillator and a part of theSystem Controller

65 VDDSDHC SDMMC I/O lines supply input

15 VDDISC Image Sensor I/O lines supplyinput

For decoupling guidelines, refer tothe section "Design Guidelines".

SAMA5D27 SOM1


Pin Number PIO Description Comments

1, 10, 18, 26,31, 39, 42, 43,50, 56, 62, 66,69, 72, 75, 88,89, 98, 107,130, 131, 149,166, 171, 176

GND Ground connections Must be connected together

129 RFU0 Reserved for future use Must be left floating



SAMA5D27 SOM1


5. Functional Description

5.1 SAMA5D27 System-In-PackageThe SAMA5D2 System-In-Package (SIP) (SAMA5D27C-D1G-CU) integrates the ARM Cortex-A5processor-based SAMA5D2 MPU with 1 Gbit DDR2-SDRAM in a single package.

By combining the high-performance, ultra-low-power SAMA5D2 with DDR2-SDRAM in a single package,PCB routing complexity, area and number of layers is reduced. This makes board design easier andlowers the overall cost of bill of materials. Board design is more robust by facilitating design for EMI, ESDand signal integrity.

For more information about the SIP, see "Reference Documents". This section lists the sole referencedocuments for product information on the SAMA5D2 and the DDR2-SDRAM memory.

The SAMA5D27C-D1G-CU is available in a 289-ball TFBGA package.

Connections of the supplies and the system pins of the SAMA5D27C-D1G-CU are described in thefollowing schematics.

Figure 5-1.SAMA5D27C-D1G-CU Supplies Distribution Schematic

VDDIN_3V3

VDDUTMII

VDDOSC

VDDAUDIOPLL

VDDIOP0

VDDIOP1

VDDIOP2

GNDUTMII

10F

4.7

F

2.2R

100n

F

100n

F

100n

F

2.2R

BLM03AX100SZ11 2

4.7

F

100n

F10

0nF

MLZ1608N100L1 2

BLM03AX100SZ1

1 2

100n

F

100n

F

0R

100n

F

MLZ1608N100L1 2

BLM03AX100SZ11 2

BLM03AX100SZ11 2

BLM03AX100SZ1

1 20R

100n

F

VDDANA

SAMA5D27 SOM1


Figure 5-2.SAMA5D27C-D1G-CU Supplies Decoupling Schematic

(3V3)

(3V3)

(3V3)

(1V2)

(3V3)

(3V3)

(3V3)

(3V3)

(1V8)

(1V2)

(2V5)

(1V2)

(1V2)

VDDIOP2

VDDIOP1

VDDIOP0

VDDOSC

VDDUTMII

VDDAUDIOPLL

VDDBU

VDDFUSE

VDDSDHC

VDDISC

VDDCORE

GNDUTMII

4.7

F

100n

F

100n

F

4.7

F

MLZ1608N100L1 2

100n

F

100n

F

100n

F

100n

F

SAMA5D27C-D1G-CU

U2G

GNDADCJ6GNDANAM1

GNDBUU4

GNDCORE_1E12

GNDCORE_2F12

GNDCORE_3J11

GNDCORE_4K6

GNDCORE_5K7

GNDCORE_6K11

GNDDDR_1E10

GNDDDR_2F8

GNDDDR_3G10

GNDDDR_4H12

GNDDDR_5J9

GNDDDR_6K10

GNDDDR_7M14

GNDDPLLT3

GNDFLTDPLLT4

GNDIOP0_1E3

GNDIOP0_2F2

GNDIOP1_1M12

GNDIOP1_2P11

GNDOSCP5

GNDPLLAT5

GNDUTMIM6

GNDUTMI_CORER6

VDDADCK4 VDDANAJ5

VDDBUU5

VDDCORE_1D7

VDDCORE_2E9

VDDCORE_3H2

VDDCORE_4L12

VDDCORE_5P7

VDDDDR_1E8

VDDDDR_2E11

VDDDDR_3G12

VDDDDR_4H10

VDDDDR_5J8

VDDDDR_6L10

VDDDDR_7L14

VDDFLTDPLLM4

VDDFUSEN13

VDDIOP0_1D4

VDDIOP0_2F3

VDDIOP1_1N12

VDDIOP1_2P12

VDDOSCN6

VDDPLLAR5

VDDSDHCN8

VDDUTMIP6

VDDUTMI_COREM7

GNDIOP2_1D6

VDDCORE_6U3

VDDIOP2_1D9

VDDHSICR7

VDDISIH3

GNDISIH5

GNDSDHCR8

2.2R

100n

F

VDDPLLA

VDDUTMIC

VDDHSIC

VDDANA

100n

F

100n

F

VDDIODDR

100n

F

100n

F

100n

F

100n

F

100n

F

1nF

1nF

100n

F

100n

F

1nF

1nF

10F

1nF

1nF

1nF

VDDIODDR

VDDCORE

1nF

1nF

1nF

100n

F

1nF

100n

F

100n

F

100n

F

10F

100n

F

1nF

1nF

100n

F

VDDCORE

VDDCOREBLM03AX100SZ11 2

VDDCOREBLM03AX100SZ1

1 2

Figure 5-3.SAMA5D27C-D1G-CU System Schematic

R & Cas close as possibleVDDANA

COMPNCOMPP

LOWQ#PIOBU1PIOBU2PIOBU3PIOBU4PIOBU5PIOBU6PIOBU7

GNDUTMII

SHDN

WKUP

nRST

USBA_MUSBA_P

USBB_MUSBB_P

STROBEDATA

CLK_AUDIO

RXD

NX2012SA_32-768KHz

1 2

8pF50V

NX2016SA_24MHz

11 2

GN

D1

334

GN

D2

12pF50V 10pF25V

SAMA5D27C-D1G-CU

ADVREFPL9

CLK_AUDIOT8

COMPNU7COMPPU6

HHSDMAT10

HHSDMBT11

HHSDPAU10

HHSDPBU11

JTAGSELR3 NRSTT7

PIOBU0P3

PIOBU1M3

PIOBU2P2

PIOBU3P4

PIOBU4N4

PIOBU5M5

SHDNT2 TSTR4

VBGT6

WKUPR2

XINU9

XIN32U2

XOUTU8

XOUT32U1

PIOBU6N5

PIOBU7N3

HHSDPDATCT12

HHSDMSTRCU12

RXDN2

100R

8pF50V

100R

100R 100R12pF50V

10K

5.62

K

100R

Y1

Y2

Table 5-1.SAMA5D27C-D1G-CU External Crystal

Item Designation Type Manufacturer Manufacturer Specification Number

Y1 24MHz Crystal NX2016SA NDK EXS00A-CS08664

Y2 32.768kHzCrystal

NX2012SA NDK EXS00A-MU00626

SAMA5D27 SOM1


5.2 Power SuppliesThe SAMA5D27 SOM1 is supplied by an external 3.3V and generates its own internal supplies byinterfacing with the Microchip MIC2800-G1JJYML power management unit.

The MIC2800 is a high-performance power management IC, providing three output voltages withmaximum efficiency and is optimized to respect the MPU power up and down cycles.

Integrating a 2 MHz DC/DC converter with an LDO post regulator, the MIC2800 gives two high-efficiencyoutputs with a second, 300mA LDO for maximum flexibility. The DC-to-DC converter uses small values ofL and C to reduce board space while still retaining efficiency over 90% at load currents up to 600mA.

The three outputs supply the following internal nodes: DCDC set @ 1.8V supplies SAMA5D27C-D1G-CU DDR2 pads and device. LDO1 set @ 1.2V supplies SAMA5D27C-D1G-CU Core. LDO2 set @ 2.5V supplies SAMA5D27C-D1G-CU VDDFUSE pad.

The MIC2800 is a Cap design, operating with very small ceramic output capacitors and inductors forstability.

It is available in fixed output voltages in the 16-pin 3mm x 3mm MLF lead-less package. For moreinformation, refer to the product web page.

Figure 5-4.Power Management Unit Schematic

VDDBU

VDDIN_3V3

VDDFUSE

VDDIODDR

VDDIODDRVDDCORELOWQ#

nRST

4.7uF

10uF

2.2uF

100nF 10nF

2.2uH1 2

100nF

100K

10uF

10uFMIC2800-G1JJYML

POR12

SW5

FB9

CBIAS2

LOWQ1

VIN16

VIN27 LDO2

8

PGN

D4

SGN

D3

EN216

EN115

CBYP14

CSET13

LDO10

LDO111

TPAD

17

VDDIN_3V3

56K

100nF

5.3 System ControlThe SAMA5D27 SOM1 provides global system Reset (NRST) and Shutdown (SHDN) pins to theapplication board.

The NRST pin is an output pin generated by the internal Power Management Unit (MIC2800-G1JJYML) in respect with power sequence timing. It can be forced externally in case of a systemcrash and must be connected as described in the example schematic below.

The SHDN pin is an output pin and is managed by the software application. It switches the Main3.3V Supply ON or OFF.

SAMA5D27 SOM1


http://www.microchip.com/wwwproducts/en/MIC2800

Figure 5-5.Internal System Control Schematic

SHDN

Q1

DMN26D0UDJ-7D1

6

S11

2 G1

5G2

4S2

3D2

VDDIN_3V3

10K

nRST

VDDBU

100K

From SAMA5D27

5.4 Ethernet PHYThe Microchip SAMA5D27 SOM1 embeds a single-supply 10BASE-T/100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair(UTP) cable.

The KSZ8081RNAIA is a highly-integrated PHY solution. The KSZ8081RNAIA offers the Reduced MediaIndependent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors.

The KSZ8081RNAIA is available in 24-pin, lead-free QFN packages. For more information, refer to the product web page.

SAMA5D27 SOM1


http://www.microchip.com/wwwproducts/en/ksz8081

Figure 5-6.Ethernet PHY Schematic

VDDIN_3V3

VDDIN_3V3

VDD

IN_3

V3

VDDIN_3V3

ETH_TXPETH_TXM

ETH_RXPETH_RXM

GTXCK_PD09GTX1_PD16GTX0_PD15GTXEN_PD10GRX1_PD14GRX0_PD13GRXER_PD12GRXDV_PD11GMDC_PD17GMDIO_PD18ETH_INT_IRQ_PD31

nRST

ETH_LED0

100nF

2.2uF

0R

BLM18PG181SN1D

1 2

100nF

22pF50V

100nF 10K

1KU6

KSZ8081RNAIA

TXM5 TXP6

RXP4

RXM3

VDD_1V21

GND22

PADDLE25

REXT9

XI8

XO7

REF_CLK16

TXD121

TXD020

TXEN19

RXD112

RXD013

RXER17

CRS_DV/PHYAD[1_0]15

MDC11

MDIO10

INTRP18

VDDA_3V32

VDDIO14

LED0/ANEN_SPEED23

RST#24

10uF

NX2

016S

A_25

MH

z

11

2

GND1 33

4

GND210K

6.49K

22pF50V

10uF

1K

ETH_XO

ETH_XI

Y3

Table 5-2.KSZ8081RNAIA External Crystal

Item Designation Type Manufacturer Manufacturer Specification Number

Y3 25MHz Crystal NX2016SA NDK EXS00A-CS10694

5.5 QSPI MemoryThe SAMA5D27 SOM1 embeds the SST26VF064BT-104I/MF, a 64Mb Serial Quad I/O Flash memory.

The SST26VF064BT-104I/MF SQI features a six-wire, 4-bit I/O interface that allows for low-power, high-performance operation in a low pin-count package.

The SST26VF064BT-104I/MF is available in 8-lead WDFN package with 6mm 5mm dimensions.

For more information, refer to the product web page.

Figure 5-7.QSPI Memory Schematic

VDDIN_3V3

VDDIN_3V3 VDDIN_3V3

VDDIN_3V3

PB07/TIOB2/PWMH3/QSPI1_IO0

PB08/TCLK3/PWML3/QSPI1_IO1

PB09/TIOA3/PWMFI1/QSPI1_IO2

PB10/TIOB3/PWMEXTRG1/QSPI1_IO3

PB05/TCLK2/PWMH2/QSPI1_SCK

QSPI_SCK_PB05QSPI_IO3_PB10QSPI_IO2_PB09QSPI_IO1_PB08QSPI_IO0_PB07

PB06/TIOA2/PWML2/QSPI1_CS

DIS_BOOT

QSPI_CS_PB06

22R

22R

10KDNP

10KDNP

22R

NL17SZ126DFT2G

OE1

IN2

GND3

OUT4

VCC5

22R

22R

10KDNP

22R

10KDNP

10K

22R

100nF

22R

10KDNP

22R

10KDNP

SST26VF064B-104I/MF

CE#1SO/SIO1

2

WP#/SIO23 VSS

4SI/SIO05

SCK6 HOLD/SIO37

VDD8

TPAD9

22R

100nF

22R

10K

22R

QSPI_CS#

SAMA5D27 SOM1


http://www.microchip.com/wwwproducts/en/SST26VF064B

Tip: In case of non-use at application level of the QSPI embedded in SAMA5D27 SOM1, it ispossible to reassign the signals dedicated to QSPI memory to another PIO function as definedin the table below. To do so, the DIS_BOOT pin (SAMA5D27 SOM1 pad 126) must be forced toground.

Table 5-3.Other GPIO Possibilities for QSPI Interface in Case of Non-use

Pin Number Power RailPrimary PIO Peripheral

Reset StateSignal Dir Func Signal Dir IOset

134 VDDIN_3V3 PB05 I/O A TCLK2 I 1 PIO, I, PU,ST

C PWMH2 O 1

D QSPI1_SCK O 2

127 VDDIN_3V3 PB06 I/O A TIOA2 I/O 1 PIO, I, PU,ST

C PWML2 O 1

D QSPI1_CS O 2

133 VDDIN_3V3 PB07 I/O A TIOB2 I/O 1 PIO, I, PU,ST

C PWMH3 O 1

D QSPI1_IO0 I/O 2

128 VDDIN_3V3 PB08 I/O A TCLK3 I 1 PIO, I, PU,ST

C PWML3 O 1

D QSPI1_IO1 I/O 2

132 VDDIN_3V3 PB09 I/O A TIOA3 I/O 1 PIO, I, PU,ST

C PWMFI1 I 1

D QSPI1_IO2 I/O 2

135 VDDIN_3V3 PB10 I/O A TIOB3 I/O 1 PIO, I, PU,ST

C PWMEXTRG1 I 1

D QSPI1_IO3 I/O 2

Tip: The QSPI interface can be shared with another external device. To do so, the QSPI_CS#node must stay at "High" level. That means that the DIS_BOOT pin (SAMA5D27 SOM1 pad126) must be forced to ground.

5.6 EEPROM MemoryThe SAMA5D27 SOM1 embeds the 24AA02E48T-I/OT, a 1Kb Serial EEPROM with pre-programmedEUI-48 MAC address.

The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface. The secondblock is reserved for MAC Address storage.

SAMA5D27 SOM1


The 24AA02E48T-I/OT also has a page write capability for up to 8 bytes of data.

The 24AA02E48T-I/OT is available in the standard 5-lead SOT-23 package. For more information, seethe product web page.

Figure 5-8.EEPROM Memory Schematic

VDDIN_3V3

VDDIN_3V3

PD22/EEPROM_TWCK_PD22

PD21/EEPROM_TWD_PD21

EEPROM_TWCK_PD22

EEPROM_TWD_PD2122R

24AA02E48T-I/OT

VCC4

SCL1

SDA3

VSS2

NC5 2.2K

100nF

22R

22R

2.2K

22R

Tip: The 2-Wire serial interface can be externally shared with another device. 2-Wire DataSignal (SAMA5D27 SOM1Pad 19) and 2-Wire Clock Signal (SAMA5D27 SOM1Pad 20) areused.

Important: If the 2-Wire serial interface is used externally, the device connected must have adifferent IC address than the embedded EEPROM. The embedded EEPROM has the followingIC address range: 0x40 0x47

SAMA5D27 SOM1


http://www.microchip.com/wwwproducts/en/24AA02E48

6. Power Supply Connections and Timing SequencesThe SAMA5D27 SOM1 can be supplied in different ways depending on application needs.

Four power domains must be supplied and can be connected differently. The four different powerconnections are described below:

Power Configuration #1: All supplies are connected to the Main 3.3V Supply. Power Configuration #2: Backup domain is connected to a coin-cell and the rest to the Main 3.3V

Supply. Power Configuration #3: Backup domain is connected to a coin-cell. Camera sensor is connected

to a separate power supply and the rest to the Main 3.3V Supply. Power Configuration #4: All supply domains are connected to separate power supplies.

For each power configuration, a Power-On and Power-Off timing sequences to respect are describedbelow.

6.1 Power Supply Configuration #1The SAMA5D27 SOM1 is supplied by only one main supply.

In this configuration mode, all supplies are connected together and supplied by the main 3.3V supply. AllPIOs have VDDIN_3V3 Power Rail as voltage reference.

Figure 6-1.Power Configuration #1

SHDN

nRST

VDDSDHC

VDDISC

VDDBU

VDDIN_3V3

nRST

SHDN

3.3V

SAM

A5D

27-S

OM

1

In this configuration mode, the two following timing sequences are applied.

Figure 6-2.Power-On Sequence Timing DiagramSYSTEM IS OFF SYSTEM IS POWERED-UP RESET IS RELEASED

VDDIN_3V3 MAIN 3.3V IS PRESENT

VDDBU VDDIN_3V3 LEVEL

VDDISC VDDIN_3V3 LEVEL

VDDSDHC VDDIN_3V3 LEVEL

INT_VDD INTERNAL SUPPLIES GENERATION

SHDN VDDIN_3V3 LEVEL

nRST

Tmain

Tstart

Tpor

a

c

d

e

f

SAMA5D27 SOM1


Figure 6-3.Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IS OFF


VDDBU VDDIN_3V3 LEVEL



INT_VDD INTERNAL SUPPLIES SWITCH-OFF

SOFTWARE SOFTWARE IS RUNNING SOFTWARE SHUTDOWN

SHDN SOFTWARE REQUEST

nRST

Tsoft

Tmain_off

Tstop

c

d

a

b

Table 6-1.Timing Values

Symbol Description Min. Typ. Max. Unit

tmain(1) Main 3.3V Startup Time 1 ms

tstart Internal Delay before starting System CoreSupplies

1 3 ms

tpor Power-On Reset Delay 10 11 ms

tsoft Software Shutdown Time Depending on systemoff time

ms

tmain_off Main 3.3V Power-off Time 1 ms

tstop Internal Delay before switching off System CoreSupplies

1 3 ms

Note:1. The three supplies VDDIN_3V3, VDDISC and VDDSDHC must be applied at the same time. If a

delay is implemented, it must be lower than 800s. VDDBU must be applied at the same time asVDDIN_3V3 or just before. It is forbidden to apply VDDBU after VDDIN_3V3.

6.2 Power Supply Configuration #2The SAMA5D27 SOM1 is supplied by different power supplies.

Backup domain is connected to a coin-cell. The rest of the power inputs are connected to the main 3.3V supply.

In this configuration, the following PIOs have VDDBU Power Rail as reference. All other PIO haveVDDIN_3V3 Power Rail as reference.

COMPP and COMPN PIOBU1 to PIOBU7 RXD, SHDN and WKUP

SAMA5D27 SOM1



SHDN

nRST

VDDSDHC

VDDISC

VDDBU

VDDIN_3V3

nRST

SHDN

3.3V

SAM

A5D

27-S

OM

1

In this configuration, the two following timing sequences are applied.

Figure 6-5.Power-On Sequence Timing DiagramSYSTEM IN BACKUP SYSTEM IS POWERED-UP RESET IS RELEASED


VDDBU VDDBU ALWAYS PRESENT




SHDN VDDBU LEVEL / SOFTWARE RELEASE

nRST

Tmain

Tstart

Tpor

b

c

d

e

a

f

Figure 6-6.Power-Off Sequence Timing DiagramSYSTEM IS ON POWER-OFF PROCEDURE SYSTEM IS POWER-DOWN SYSTEM IN BACKUP






SOFTWARE IS RUNNING SOFTWARE SHUTDOWNSOFTWARE


nRST

Tsoft

Tmain_off

Tstop

c

d

a

b



tmain(1) Main 3.3V Startup Time 1 ms


1 3 ms



ms

tmain_off Main 3.3V Power-off Time 1 ms

tstop Internal Delay before switching-off System CoreSupplies

1 3 ms

Note:

SAMA5D27 SOM1


1. The three supplies VDDIN_3V3, VDDISC and VDDSDHC must be applied at the same time. If adelay is implemented, it must be lower than tstart.

6.3 Power Supply Configuration #3Some power inputs of the SAMA5D27 SOM1 are grouped and others are supplied by a separated powersupplies.

Backup domain is connected to a coin cell. Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the

following voltage levels (1.8V/2.5V/2.8V/3.0V or 3.3V) depending on the camera sensor technologyused in the application.

The remaining power inputs are connected to the main 3.3V supply.

In this configuration, the following PIOs have: VDDBU Power Rail as reference

COMPP and COMPN PIOBU1 to PIOBU7 RXD, SHDN and WKUP

VDDISC Power Rail as reference PC09 to PC25

All other PIOs have VDDIN_3V3 Power Rail as reference.


SHDN

nRST

VDDSDHC

VDDISC

VDDBU

VDDIN_3V3

nRST

SHDN

3.3V

SAM

A5D

27-S

OM

1


Figure 6-8.Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED



VDDISC EXTERNAL VDDISC LEVEL (1.8V/2.5V/2.8V/3.0V/3.3V)




nRST

Tmain

Ton1

Tstart

Tpor

b

a

d

c

e

f

SAMA5D27 SOM1










nRST

Tsoft

Tmain_off

Toff1

Tstop

c

d

e

a

b



tmain(1) Main 3.3V Startup Time (From regulatoravailable on the motherboard)

1 ms

ton1 VDDISC Regulator Startup Time (From regulatoravailable on the motherboard)

800 s


1 3 ms



ms

tmain_off Main 3.3V Power-off Time (From regulatoravailable on the motherboard)

1 ms

toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)

1 ms


1 3 ms

Note:1. The supplies VDDIN_3V3 and VDDSDHC must be applied at the same time. If a delay is

implemented, it must be lower than tstart.

6.4 Power Supply Configuration #4Each power input of the SAMA5D27 SOM1 is supplied by separate power supplies.

Backup domain is connected to a coin cell. Camera sensor power input (VDDISC) is connected to a separate power supply set at one of the

following voltage levels (1.8V/2.5V/2.8V/3.0V or 3.3V) depending on the camera sensor technologyused in the application.

SD Card power input (VDDSDHC) is connected to a separate power supply set at one of thefollowing voltage levels (1.8V or 3.3V) depending on the SD Card Technology/Speed used in theapplication.

VDDIN_3V3 power input is connected to the main 3.3V supply.

In this configuration, the following PIOs have:

SAMA5D27 SOM1


VDDBU Power Rail as reference COMPP and COMPN PIOBU1 to PIOBU7 RXD, SHDN and WKUP

VDDISC Power Rail as reference PC09 to PC25

VDDSDHC Power Rail as reference PA00 to PA10

All other PIOs have VDDIN_3V3 Power Rail as reference.


SHDN

nRST

VDDSDHC

VDDISC

VDDBU

VDDIN_3V3

nRST

SHDN

3.3V

SAM

A5D

27-S

OM

1SDMMC0_VDDSEL


Figure 6-11.Power-On Sequence Timing DiagramSYSTEM IN BACKUP WAKE UP SYSTEM IS POWERED-UP RESET IS RELEASED




VDDSDHC DYNAMIC VDDSDHC LEVEL (3.3V) DYNAMIC VDDSDHC LEVEL (1.8V)

SDMMC0_VDDSEL



nRST

Tmain

Ton2Ton1

Tstart

Tpor Tsys

b

d

c

g

e

a

f





VDDSDHC VDDSDHC LEVEL (1.8V) VDDSDHC LEVEL (3.3V)

SDMMC0_VDDSEL




nRST

Tsoft

Tmain_off

Toff1

Toff2

Tstop

c

d

e

f

a

b

SAMA5D27 SOM1




tmain Main 3.3V Startup Time (From regulatoravailable on the mother board)

1 ms

ton1 VDDISC Regulator Startup Time (From regulatoravailable on the mother board)

800 s

ton2 VDDSDHC Regulator Startup Time (Fromregulator available on the mother board)

800 s


1 3 ms


tsys Low Speed to High Speed card timing(1) Depending on systemoff time

ms


ms

tmain_off Main 3.3V Power-off Time (From regulatoravailable on the motherboard)

1 ms

toff1 VDDISC Regulator Power-off Time (Fromregulator available on the motherboard)

1 ms

toff2 VDDSDHC Regulator Power-off Time (Fromregulator available on the motherboard)

1 ms


1 3 ms

Note:1. Timing depends on the system boot time. No particular recommendations to apply.

SAMA5D27 SOM1


7. Booting GuidelinesThis section provides an overview of how to program a Non Volatile Memory (NVM) and boot from it.

The SAMA5D27 SOM1 embeds a Quad I/O Flash Memory as a source for boot. Another type of NVMmay be located on the motherboard. This section explains how to program, select and boot from an NVM.

7.1 Boot ProcessThe system always boots from the ROM memory at address 0x0. The ROM code is a boot programcontained in the embedded ROM. It is also called First level bootloader. The SAMA5D2 can beconfigured to run a Standard Boot mode or a Secure Boot mode. More information on how the SecureBoot mode can be enabled, and how the chip operates in this mode, is provided in the documentSAMA5D2x Secure Boot Strategy, document no. 44040. To obtain this application note and additionalinformation about the secure boot and related tools, contact a Microchip sales representative.

By default, the chip starts in Standard Boot Mode.

The ROM code standard sequence is executed as follows: Basic chip initialization: crystal or external clock frequency detection. Attempt to retrieve a valid code from external non-volatile memories (NVM). Execution of a monitor called SAM-BA Monitor, in case no valid application has been found on any

NVM (1).

Note:1. This may be the case during the first start-up or after an NVM erase or when a "boot disable

jumper" is used on the memory Chip Select, in order to force an update.

7.2 Boot ConfigurationThe boot sequence is controlled using a Boot Configuration Word in the Fuse area. The BootConfiguration Word allows several customizations of the Boot Sequence:

To configure the IO Set where the external memories used to boot are connected (see Section16.4.8 Hardware and Software Constraints for a description of the IO sets)

To disable the boot on selected memories To configure the UART port used as a terminal console To configure the JTAG pins used for debug. Refer to Debug Considerations.

See the section Boot Configuration Word of the SAMA5D2 datasheet, document no. DS60001476, for adetailed description of all the bitfields in this word. By default, the value of this word is 0x0. Duringprototyping phases, the value of this fuse word can be overridden by the content of a backup register.The conditions to enable this feature are as follows:

The fuse bit DISABLE_BSCR must not be set (default value). The Boot Sequence Controller Configuration Register (BSC_CR) must have the BUREG_VALID bit

set and indicate in BUREG_INDEX which register has to be used.

Using BUREG allows the user to test several boot configuration options, including Secure Boot Mode,without burning fuses.Note: VDDBU must be connected in order to benefit from this feature. However, in production, it ishighly recommended to disable this feature and to write the boot configuration in fuses.

SAMA5D27 SOM1


7.3 NVM ProgrammingThe SAMA5D27 SOM1 is delivered with SAM-BA In-System Programmer, a comprehensive tool toprogram boot memories.

In case the boot code does not find a valid program in NVM, the SAM-BA monitor is launched in order toprogram the considered NVM.

The SAM-BA monitor principle is to: Initialize DBGU and USB. Check if USB Device enumeration occurred. Check if characters are received on the DBGU.

Once the communication interface is identified, the application runs in an infinite loop waiting for differentcommands.

The firmware can be sent and programmed in the NVM.

For more information, refer to the following link. http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2XplainedMainPage#Using_SAM_BA_to_flash_components

7.4 Boot From External MemorySeveral types of external memories such as NAND Flash, SDCard, SPI Flash, QSPI Flash, etc. can beconnected to the SAMA5D27 SOM1 and placed on the motherboard.

For details of the Boot sequence, refer to the "NVM Bootloader Program Description for MRL C Parts"diagram of the SAMA5D2 datasheet, document no. DS60001476.

The table below provides the list of external memory types and interfaces that enable connection to theSAMA5D27 SOM1:

Table 7-1.External Memory Connections

Memory Type Interface PIO Comments

SDCard

SD-MMC0 PA0 to PA13If external SDMMC0 interface is not used, bitSDMMC_0 in Boot Configuration Word mustbe set to 1.

SD-MMC1 PA18 to PA22, PA27to PA30

If external SDMMC1 Interface is not used, bitSDMMC_1 in Boot Configuration Word mustbe set to 1.

eMMC SD-MMC0 PA0 to PA10, PA13If external SDMMC0 Interface is not used, bitSDMMC_0 in Boot Configuration Word mustbe set to 1.

NAND Flash NFC PA0 to PA21, PC11 toPC31, PD0 to PD8

Field NFC in Boot Configuration Word mustbe set to "01". IOSET2 is selected. (SeeNotes below)

QSPI Flash QSPI0 PA0 to PA5Field QSPI_0 in Boot Configuration Wordmust be set to "00". IOSET1 is selected. (SeeNotes below)

SAMA5D27 SOM1


Memory Type Interface PIO Comments

PA14 to PA19Field QSPI_0 in Boot Configuration Wordmust be set to "01". IOSET2 is selected. (SeeNotes below)

PA22 to PA27Field QSPI_0 in Boot Configuration Wordmust be set to "10". IOSET3 is selected. (SeeNotes below)

QSPI1 PB5 to PB10

Need to tie DIS-BOOT pin to GND. BitsQSPI_1 in Boot Configuration Word must beset to "01". IOSET2 is selected. (See Notesbelow)

SPI Flash

SPI0

PA14 to PA17Bits SPI_0 in Boot Configuration Word mustbe set to "00". IOSET1 is selected. (SeeNotes below)

PA30, PA31, PB0,PB1

Bits SPI_0 in Boot Configuration Word mustbe set to "01". IOSET2 is selected. (SeeNotes below)

SPI1

PA22 to PA25Bits SPI_1 in Boot Configuration Word mustbe set to "01". IOSET2 is selected. (SeeNotes below)

PC1 to PC4Bits SPI_1 in Boot Configuration Word mustbe set to "00". IOSET1 is selected. (SeeNotes below)

Note: For these external memory configurations, set the EXT_MEM_BOOT_ENABLE bit to "1" in BootConfiguration Word.

Note: The Boot Configuration Word allows several customizations of the boot sequence. For details,refer to the section "Boot Configuration" in the SAMA5D2 datasheet, document no. DS60001476.

SAMA5D27 SOM1


8. Debug ConsiderationsThe SAMA5D27 SOM1 JTAG access is disabled during the execution of the ROM code sequence. It isre-enabled when jumping into SRAM when a valid code has been found on an external NVM, at the sametime the ROM memory and fuses are hidden. If no valid boot is found on an external NVM, the ROM code

enables the USB connection and one UART serial port starts the standard SAM-BA monitor locks access to the ROM memory re-enables the JTAG connection

The SAMA5D27 SOM1 has multiple debug and JTAG settings. For more information, refer to theSAMA5D2 datasheet, document no. DS60001476, SECUMOD JTAG Protection Control Register,"Customer Fuse Matrix" and "Special Function Bits".

The JTAG I/O set can be configured. For correct operations, the I/O set to be used is JTAG_IOSET_3,i.e., the field JTAG_IO_SET in the Boot Configuration Word must be written with value '2'.(1)

Note: Due to IO conflict on line PA22, JTAG_IOSET_4 must not be implemented when SDMMC1 isused as an NVM boot media. See the SAMA5D2 datasheet, document no. DS60001476, BootConfiguration Word.

SAMA5D27 SOM1


9. Electrical CharacteristicsThis section provides an overview of the electrical characteristics of the SAMA5D27 SOM1 module.Absolute maximum ratings for the SAMA5D27 SOM1 module are listed below. Exposure to thesemaximum rating conditions for extended periods may affect device reliability. Functional operation of themodule at these or any other conditions, above the parameters indicated in the operation listings of thisspecification, is not implied.

9.1 Absolute Maximum RatingsTable 9-1.Absolute Maximum Ratings

Parameter Conditions Min. Max.

Storage Temperature -60C +150C

Maximum Operating Temperature -40C +85C

Voltage on Inputs Pins With respect to ground -0.3V +4.0V

Maximum Voltage

On VDDIN_3V3 Pads +4.0V

On VDDBU Pad +4.0V

On VDDSDHC Pad +4.0V

On VDDISC Pad +4.0V

Important: Stresses beyond those listed under Absolute Maximum Ratings may causepermanent damage to the device. This is a stress rating only and functional operation of thedevice at these or other conditions beyond those indicated in the operational sections of thisspecification is not implied. Exposure to absolute maximum rating conditions for extendedperiods may affect device reliability.

9.2 Operational CharacteristicsThe following characteristics are applicable to the operating temperature range TA = -40C to +85C,unless otherwise specified.

Table 9-2.Table 7. Power Supplies Operating Conditions

Pad Parameters Conditions Min. Typ. Max.

VDDIN_3V3DC Supply 3.0V 3.3V 3.6V

Maximum InputCurrent 450mA

VDDBUDC Supply Must be established first or atthe same time as VDDIN_3V3. 1.65V 3.3V 3.6V

Maximum InputCurrent 0.1 mA

SAMA5D27 SOM1



VDDSDHCDC Supply SDHC I/Os Lines 1.65V 3.3V 3.6V


VDDISCDC Supply ISC I/Os Lines 1.65V 3.3V 3.6V


9.3 DC Electrical Characteristics

9.3.1 Standard InterfacesThe following characteristics are applicable to the operating temperature range TA = -40C to +85C,unless otherwise specified.

Table 9-3.DC Electrical Characteristicsfor GPIO Inputs


VILLow-level InputVoltage All GPIO @ 3.3V -0.3V 0.4V

VIHHigh-level InputVoltage All GPIO @ 3.3V 2.3V 3.6V

VOLLow-level OutputVoltage IO Max. 0.41V

VOHHigh-level OutputVoltage IO Max. 2.9V --

IILLow-level InputCurrent All GPIO @ 3.3V -1A 1A

IIHHigh-level InputCurrent All GPIO @ 3.3V -1A 1A

IOLLow-level OutputCurrent

All GPIO @ 3.3V / Low -2mA --

All GPIO @ 3.3V / High -32mA --

IOHHigh-level OutputCurrent

All GPIO @ 3.3V / Low 2mA

All GPIO @ 3.3V / High 32mA

RPULLUP Pull-up ResistorsAll GPIO @ 3.3V and PDxx inAD mode. 280k 380k 480k

All IOs in GPIO mode @3.3V. 40k 66k 130k

RPULLDOWNPull-downResistors

All GPIO @ 3.3V and PDxx inAD mode 280 k 380k 480k

All IOs in GPIO mode @3.3V. 40k 77k 160k

SAMA5D27 SOM1


Note: This table applies to all the following pads: PA0PA31, PB0PB31, PC0PC31, PD0PD8, PD19-PD30.

9.3.2 Other PIOsThe following characteristics are applicable to the operating temperature range TA = -40C to +85C,unless otherwise specified.

Table 9-4.Table 7. DC Electrical Characteristics for System Inputs


VILLow-level InputVoltage DIS_BOOT 1.0V

VIHHigh-level InputVoltage DIS_BOOT 2.3V

SAMA5D27 SOM1


10. Mechanical Characteristics

10.1 Module DimensionsThe SAMA5D27 SOM1 has dimensions of 40mm x 38mm with the specific following mechanicalcharacteristics.

Figure 10-1.System-On-Module Dimensions

123456789101112131415161718192021222324252627282930313233343536373839404142

43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

169

168

167

166

165

164

163

162

161

160

159

158

157

156

155

154

153

152

151

150

149

148

147

146

145

144

143

142

141

140

139

138

137

136

135

134

133

132

131

176

175

174

173

172

171

170

127126125124123122121120119118117116115114113112111110109108107106105104103102101100

9998979695949392919089

130129128

(TP1) (TP2)

(TP7)

(TP9)

(TP10)

(TP5)

(TP6)

(TP4)

(TP3)

(TP8)

177178

179

180

181

184183

185

186

182

PIN 1 CORNERE1

D1 D2

E2S

A1

TOP

VIEW

P1b

aaa

P2f ff f x n

E

D

e

B

BOTT

OM

VIE

W

P2Eb

P2Ea jjjjjj x m

Pads :Body :Pads Pitch :

17640 x 38 x 2.80

0.8A11SAMA5D27-SOM1_POD

02/05/2017

SAMA5D27-SOM1 DIMENSIONS Drawn by : R C R

Units: mm

P1t

aaa

P2f fn x

47 48 8259 70

4

31

4191

173

89

252627

51 54

170

155

Table 10-1.System-On-Module Dimensions

SymbolCommon Dimensions

CommentsMin. Typ. Max.

Body SizeX E -- 40.000 40.100

Y D -- 38.000 38.100

Pad Pitch e -- 0.800 --

PCB Thickness S 1.150 1.200 1.250

Total Thickness A1 -- 2.750 2.800

PCB Angle Hole Diameter(1) B 0.200

Pad Length(1) Bottom Side P1b 1.500

SAMA5D27 SOM1




Top Side P1t 0.800

Pad Width(1) P2 0.600 Solder Maskdefined 0.550

Pad Space(1) aaa 0.200

Opening Drilling Diameterfff

0.400

0.400 typicminusmetallization

Pad Count n 176

Edge Center toCenter

X E1 37.550 37.630 37.700

Y D1 34.400 34.480 34.550

X E2 35.550 35.630 35.700

Y D2 32.400 32.480 32.550

Pad Axis to Edge(1)X P2Ea 2.000

Y P2Eb 2.600

Note:1. Tolerances are defined upon:

IPC A600 - Class2 IPC 2615

Warning: Test points placed on the bottom side are used for factory test only. It is not possibleto connect external devices on these test points.

10.2 Module Land PatternThe SAMA5D27 SOM1 Module has the following recommended Land Pattern characteristics.

SAMA5D27 SOM1


Figure 10-2.System-On-Module Land Pattern

Pads :Body :Pads Pitch :

17640 x 38 x 2.80

0.8A11SAMA5D27-SOM1_POD

02/05/2017

SAMA5D27-SOM1 DIMENSIONS Drawn by : R C R

LAND PATTERN RECOMMENDATIONS

PIN 1 CORNER

S1

S2

Wk

L

Inside square, keepout areaNo vias, no tracks, no copper are allowed.

Units: mm

Table 10-2.System-On-Module Land Pattern Dimensions



Land Pattern Pad Width W 0.600 Solder MaskDefined0.550

Land Pattern Pad Length L 2.000

Land Pattern Pad X Space S1 37.000

Land Pattern Pad Y Space S2 35.000

Land Pattern Pad Space k 0.200

SAMA5D27 SOM1


11. Reflow ProfileThe SAMA5D27 SOM1 was assembled using standard lead-free reflow profile IPC/JEDEC JSTD-020.

The SAMA5D27 SOM1 can be soldered to the host PCB by using the standard leaded and lead-freesolder reflow profile. To avoid damage to the module, follow these recommendations:

Follow solder reflow recommendations provided in Microchip Technology Application Note AN233Solder Reflow Recommendation (DS00233).

Do not exceed the peak temperature (TP) of 250C. Refer to the solder paste datasheet for specific reflow profile recommendations. Use no-clean flux solder paste. Use no-clean flux solder paste Use only one flow. If the PCB requires multiple flows, mount the module at the time of the final flow.

Figure 11-1.Reflow Profile Example used for Soldering SAMA5D27 SOM1 Module on SAMA5D27-SOM1-EK1 board

Z6

COO

L1C3Z8Z7C2Z5Z4C1Z2 Z3Z1

20

40

60

80

100

120

140

200

160

180

217,00C

235,00C

220

280

240

260

Tem

pera

ture

(C)

Time (mm:ss,tt)00:00,00 01:00,00 02:00,00 03:00,00 04:00,00 05:00,00 06:00,00

#2 PCB mobile rail#4 PCB center#6 PCB f xed rail

Probe

SAMA5D27 SOM1


12. Ordering InformationTable 12-1.Ordering Information

Ordering Code Version Package Carrier Type OperatingTemperature Range

ATSAMA5D27-SOM1 1 176-pin 38x40mm Tray -40C to +85C

ATSAMA5D27-SOM1-EVAL 176-pin 38x40mm Tray Room temperature

SAMA5D27 SOM1


13. Revision HistoryTable 13-1.SAMA5D27 SOM1 Datasheet, Rev. DS60001521A, Oct-2017

Changes

First issue.

SAMA5D27 SOM1


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To register, access the Microchip web site at http://www.microchip.com/. Under Support, click onCustomer Change Notification and follow the registration instructions.

Customer Support

Users of Microchip products can receive assistance through several channels:

Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support

Customers should contact their distributor, representative or Field Application Engineer (FAE) for support.Local sales offices are also available to help customers. A listing of sales offices and locations is includedin the back of this document.

Technical support is available through the web site at: http://www.microchip.com/support

SAMA5D27 SOM1


http://www.microchip.com/http://www.microchip.com/http://www.microchip.com/support

Product Identification System

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Architecture

Product Group

ATSAMA5 D27 - SOM1

System on Module

Version

Architecture: SAMA5

Product Group: D27

System on Module: SOM

Version: 1

Microchip Devices Code Protection Feature

Note the following details of the code protection feature on Microchip devices:

Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the

market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of

these methods, to our knowledge, require using the Microchip products in a manner outside theoperating specifications contained in Microchips Data Sheets. Most likely, the person doing so isengaged in theft of intellectual property.

Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their

code. Code protection does not mean that we are guaranteeing the product as unbreakable.

Code protection is constantly evolving. We at Microchip are committed to continuously improving thecode protection features of our products. Attempts to break Microchips code protection feature may be aviolation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your softwareor other copyrighted work, you may have a right to sue for relief under that Act.

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Information contained in this publication regarding device applications and the like is provided only foryour convenience and may be superseded by updates. It is your responsibility to ensure that yourapplication meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORYOR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITSCONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE.Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life

SAMA5D27 SOM1


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The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks ofMicrochip Technology Incorporated in the U.S.A. and other countries.

ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLightLoad, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of MicrochipTechnology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom,chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController,dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit SerialProgramming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi,motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, OmniscientCode Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REALICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, TotalEndurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA aretrademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary ofMicrochip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies. 2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.

ISBN: 978-1-5224-2203-7

Quality Management System Certified by DNV

ISO/TS 16949Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and waferfabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in Californiaand India. The Companys quality system processes and procedures are for its PIC MCUs and dsPIC

DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory andanalog products. In addition, Microchips quality system for the design and manufacture of developmentsystems is ISO 9001:2000 certified.

SAMA5D27 SOM1


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Worldwide Sales and Service


IntroductionFeaturesApplicationsTable of Contents1.Description2.Reference Documents3.Block Diagram4.Pinout4.1.Pinout Overview4.2.Pin List

5.Functional Description5.1.SAMA5D27 System-In-Package5.2.Power Supplies5.3.System Control5.4.Ethernet PHY5.5.QSPI Memory5.6.EEPROM Memory

6.Power Supply Connections and Timing Sequences6.1.Power Supply Configuration #16.2.Power Supply Configuration #26.3.Power Supply Configuration #36.4.Power Supply Configuration #4

7.Booting Guidelines7.1.Boot Process7.2.Boot Configuration7.3.NVM Programming7.4.Boot From External Memory

8.Debug Considerations9.Electrical Characteristics9.1.Absolute Maximum Ratings9.2.Operational Characteristics9.3.DC Electrical Characteristics9.3.1.Standard Interfaces9.3.2.Other PIOs

10.Mechanical Characteristics10.1.Module Dimensions10.2.Module Land Pattern

11.Reflow Profile12.Ordering Information13.Revision HistoryThe Microchip Web SiteCustomer Change Notification ServiceCustomer SupportProduct Identification SystemMicrochip Devices Code Protection FeatureLegal NoticeTrademarksQuality Management System Certified by DNVWorldwide Sales and Service