selda heavnerfields ipdr – antenna electronics board solar probe plus fields instrument pdr...
TRANSCRIPT
Selda Heavner 1FIELDS iPDR – Antenna Electronics Board
Solar Probe Plus FIELDSInstrument PDR
Antenna Electronics Board
Selda S. Heavner
U.C. Berkeley
Selda Heavner 2FIELDS iPDR – Antenna Electronics Board
AEB Requirements
• AEB Requirements– AEB shall provide ± 15V Floating Voltage to V1, V2, V3, V4 and
V5 preamps (heritage RBSP)• Input is +5V Analog• Efficient >60%• Synchronized to 300KHz• Isolated secondary voltages• 5% output regulation
– AEB shall regulate Preamp ±6 V from LNPS to ±5V – AEB shall provide the power and the control signal for the
latching relay controls on the preamps (On V5 heater resistors) 3 bias impedances.
– AEB shall be a nexus for MF and HF signals from preamp. The signals shall not have any traces on the board. The signals shall arrive on a DB connector and via coax cables (RG316). The signals shall be then connected to TDS, RFS and DFB (also DB connectors).
– AEB shall provide housekeeping signals to DCB via multiplexer (preamp temperature, AEB temperature, DAC voltages)
Selda Heavner 3FIELDS iPDR – Antenna Electronics Board
AEB Requirements
AEB Specifications Cont. (heritage: THEMIS, RBSP)• Receive Preamplifier Signals
– Voltage Range : ± 115V w.r.t chassis– Large Signal Dynamic Range and Bandwidth: 20Vp-p, DC-
300Hz, with less than 40dB added harmonic content.
• Floating Ground Driver (heritage: THEMIS, RBSP)– AEB provides the reference source for each floating
ground used by the Preamps– Input : PAn_LFOUT (preamp signal)– Input Filter: 300Hz– Output Voltage Level: ± 60V with respect to AGND– Output : References floating ground supply (± 15VDC)
Selda Heavner 4FIELDS iPDR – Antenna Electronics Board
AEB Requirements
• BIASING VOLTAGES (V1-V4)AEB shall provide programmable biasing voltages to the V1-V4 preamps as follows:• BIAS (whip): ± 40 w.r.t preamp output• HEATSHIELD: ± 40 w.r.t preamp output• STUB: ± 40 w.r.t preamp output
• BIASING VOLTAGES (V5)AEB shall provide a provide a programmable
biasing voltage to the V5 preamp as follows:• BIAS (sensor): ± 40 w.r.t preamp output
Selda Heavner 5FIELDS iPDR – Antenna Electronics Board
SPP FIELDS AEB and Heritage Designs
• Channel requirements and design are the same: CLUSTER, POLAR and THEMIS. No changes on BIAS, STUB, HEATSHIELD and Floating GND driver.
• AEB generates the floating voltages (15VF) • DAC (AD5544) can no longer be used due to process
changes in Analog Devices. A new DAC that is space qualified is incorporated in the design (DAC121S101).
• AEB will be the transfer station for MF and HF signals from the preamp. These signals will not have traces the on the board. Connected via coax cables.
• Latching relay control for the PA bias resistors will be on AEB. DCB or TDS will send the command. Power switch will occur on AEB.
• Operating max temperature is expected to be higher. Parts selected can handle higher temperature.
Selda Heavner 6FIELDS iPDR – Antenna Electronics Board
AEB1 BLOCK DIAGRAM
LNPS 1
Preamp1 (PA1)
Preamp2 (PA2)
Preamp5 (PA5)
DCB
AEB±100V
AEB+12V
+3.3V Digital
PA±6V
300KHz SYNC
±5V PA_REGULATOR
+5V Analog
DAC CONTROL
MUXAEBHKSEL[3:0]
AEB1 AHKP
5VREF AD584 CHANNELS
AEBDAC_DATAEBDAC_CLK
AEBADR[3:0]
Decoder ENABLE
Latching Relay Controls
BIAS DACSTUB DACHEATSHIELD DAC
DAC HSK
HTR RES RELAY
BIAS RES RELAYS
BIAS RES RELAYS
FGND DRV
AEB 1 BLOCK DIAGRAM
±15V FLOATER
±15VF
FGND DRV
FGND DRV
FGND DRV
FGND DRV
FGND DRV
±15VF
±15VF
±15VF
AEB-12V
Selda Heavner 7FIELDS iPDR – Antenna Electronics Board
AEB 2 BLOCK DIAGRAM
LNPS 2
Preamp3 (PA3)
Preamp4 (PA4)
TDS
AEB±100VAEB+12V
+3.3V Digital
PA±6V
300KHz SYNC
± 5V PA_REGULATOR
+5V Analog
DAC CONTROL
MUXAEBHKSEL[3:0]
AEB2 AHKP
5VREF AD584 CHANNELS
AEBDAC_DATAEBDAC_CLK
AEBADR[3:0]
Decoder ENABLE
Latching Relay Controls
BIAS DACSTUB DACHEATSHIELD DAC
DAC HSK
BIAS RES RELAYS
BIAS RES RELAYS
FGND DRV
±15V FLOATER
±15VF
FGND DRV
FGND DRV
FGND DRV
FGND DRV
±15VF
±15VF
AEB-12V
Selda Heavner 8FIELDS iPDR – Antenna Electronics Board
AEB 1 Coax Cable and Connector DIAGRAM
LNPS 1 TDS
AEB 1 Preamp1 (PA1)
Preamp2 (PA2)
Preamp5 (PA5)
RFSDCB
DFB
HFMF
MF
HF
J32 J31J37 J36
J34
J38
J33
Selda Heavner 9FIELDS iPDR – Antenna Electronics Board
AEB 2 Coax Cable and Connector Diagram
LNPS 2 TDS
AEB 2 Preamp3 (PA3)
Preamp4 (PA4)
RFSTDS
DFB
HFMF
MF
HF
J52 J51J57 J56
J54
J58
J53
Selda Heavner 10FIELDS iPDR – Antenna Electronics Board
AEB 1 POWER BLOCK DIAGRAM
148µAx3
148µAx3
-12V
+12V(2.4-3.5mA)x3
+6V
-6V
PREAMPHF OPAMP
V1+V2
+100V
-100V
AD648, AD584
AD648
+3.3VDDAC CONTROL
BIAS
STUB
HEATSHIELD
829µA
(2.4-3.5mA)x3
5.7mA
5.7mA
(25mA 10ms)x2Latching relays (AEB ICD)
Reg to 5V
Reg to 5V
100ms
LNPS 1
Selda Heavner 11FIELDS iPDR – Antenna Electronics Board
AEB 1 POWER FLOATING SUPPLY
FV1_P15VA
FV1_N15VA
FV1_GND
FV2_P15VA
FV2_N15VA
FV2_GND
FV5_P15VA
FV5_N15VA
4.5-6mA
V1-V2
V5
4.5-6mA
4.5-6mA
4mA
4mA
SYNC 300KHz
SYNC 300KHz
4.5-6mA
FLOATING GND DRIVER
and PREAMP
FLOATING GND DRIVER
and PREAMP
FLOATING GND DRIVER
and PREAMP
FV5_GND
+5VA
IMON
IMON
80mA
40mA
HSK MUX
From DCB
From DCB
Selda Heavner 12FIELDS iPDR – Antenna Electronics Board
AEB 2 POWER BLOCK DIAGRAM
148µAx2
148µAx2
-12V
+12V(2.4-3.5mA)x2
+6V
-6V
PREAMPHF OPAMP
V3+V4
+100V
-100V
AD648, AD584
AD648
+3.3VDDAC CONTROL
829µA
(2.4-3.5mA)x2
5.7mA
5.7mA
(25mA 10ms)x2 Latching Relays (AEB ICD)
Reg to 5V
Reg to 5V
BIAS
STUB
HEATSHIELD
LNPS 2
100ms
Selda Heavner 13FIELDS iPDR – Antenna Electronics Board
AEB 2 POWER FLOATING SUPPLY
FV1_P15VA
FV1_N15VA
FV1_GND
FV2_P15VA
FV2_N15VA
FV2_GND
4.5-6mA
V3-V4
4.5-6mA
4.5-6mASYNC 300KHz
4.5-6mA
FLOATING GND DRIVER
and PREAMP
FLOATING GND DRIVER
and PREAMP
IMON80mA
HSK MUX
+5VA
From TDS
Selda Heavner 14FIELDS iPDR – Antenna Electronics Board
AEB FLOATING POWER
• AEB Breadboard Power Results– The supply is 68% when powered by 3.3V Digital at
nominal load– The supply efficiency is expected to rise since MAX256 will
be connected to 5V Analog from LNPS. – MAX 256 3W H-bridge driver
• Has an internal oscillator so if SYNC signal is lost from DCB it will still run
• Short circuit protection• Thermal shutdown• Used on RBSP, submitted to APL Jan 2013 for approval Voltage (V) Load Current (mA) Power (W)
FV1 P15V 14.095 4.15 0.05849425
FV1 N15V 14.091 4.51 0.06355041
FV2 P15V 14.59 5.26 0.0767434
FV2 N15V 14.58 5.33 0.0777114
VIN 3.3V 124.8 0.411
Selda Heavner 15FIELDS iPDR – Antenna Electronics Board
LAYOUT and PARTS
• LAYOUT– AEB ETU Layout started in October 2013.
• MASS and POWER– ± 12V and ± 100V is now generated by LNPS. Helped mass. – Power updates are submitted to LNPS. No issues .
• PARTS – MAX256 approval submitted to APL January 2013– DAC121S101 has not been used on heritage designs.
Submitted to APL and approved. 12-bit , low power – Multiplexer on AEB selected: UT16MX110.
• ISSUES– Connecting 12V to heater resistor on preamp (V5)- resolved at
Peer Review– DAC needs to be at mid-scale when powered on. New DAC is
at zero after power on reset.
Selda Heavner 16FIELDS iPDR – Antenna Electronics Board
AEB Peer Review Recommendations
No. Detailed Comment Action Status
1Put a relay on AEB to turn on and off the heater. See if RC filtering is necessary and look into +/- supply instead of single supply to see if that will reduce possible EMI.
Added RC filtering on AEB ETU schematic open
2 Add “on box bias on V5” on chart, level 4 requirement update
Added relays on AEB schematic closed
3 Remove LF coax requirement from AEB and Redo coax diagram. Updated block diagram. closed
4 What happens to the output when the sync is removed from AEB? Is it a smooth transition? Test and document
Test at ETU level by removing the sync signal. open
5Test DAC turn on characteristics when connected to preamp box. What happens when the DAC comes on at 0 volts instead of mid-scale?
Test at ETU level integration with preamp. open
6 Question about the output stage of the heritage design: floating ground driver circuit (Q19, Q20).
Heritage design. It has been used on several missions no changes required.
closed
No RFAs
Selda Heavner 17FIELDS iPDR – Antenna Electronics Board
AEB Status and Schedule
AEB Engineering Test Unit (ETU) design is completed. Schematic is finalized after the peer review.
AEB ETU layout started end of October 2013.
AEB ETU Bill of Materials submitted to Quality Assurance.
ETU parts procuring began.
Selda Heavner 18FIELDS iPDR – Antenna Electronics Board
AEB Backup Slides
BACKUP SLIDES
Selda Heavner 19FIELDS iPDR – Antenna Electronics Board
AEB CHANNEL(n) BLOCK DIAGRAM
LNPS 1 for n= 1,2LNPS 2 for n= 3,4
AEB_P12V
AEB_N12V
AEB_P100V
AEB_N100V
Preamp (n)
PA(n)_LFout
BIAS(n)STUB(n)HEATSHIELD(n)
AEB FLOATERSUPPLY
+15VF(n)-15VF(n)FGND(n)
AD584AEBVREF
5V
VREF_BIAS(n)VREF_STUB(n)
VREF_HEATSHIELD(n)
AEB DACDAC_V_BIAS(n)DAC_V_STUB(n)
DAC_V_HEATSHIELD(n)
DCB (n= 1,2) TDS (n= 3,4)
BIAS_HSK(n) AEB MUXSTUB_HSK(n)
HEATSHIELD_HSK(n)
DCB (n= 1,2) TDS (n= 3,4)
±15VF FGND(n)
CHANNEL(n)
Selda Heavner 20FIELDS iPDR – Antenna Electronics Board
AEB CHANNEL 5 BLOCK DIAGRAM
LNPS 1
AEB_P12V
AEB_N12V
AEB_P100V
AEB_N100V
Preamp 5
PA5_LFout
BIAS5STUB5
AEB FLOATERSUPPLY
+15VF-15VFFGND
AD584AEBVREF
5V
VREF_BIAS5VREF_STUB5
AEB DACDAC_V_BIAS5DAC_V_STUB5
DCB TDS
BIAS_HSK5 AEB MUXSTUB_HSK5
DCB TDS
CHANNEL(5)
Selda Heavner 21FIELDS iPDR – Antenna Electronics Board
AEB LAYOUT
LNPS 1 TDS
Preamp1 (PA1)
Preamp2 (PA2)
Preamp5 (PA5)
RFSDCB
HFMF
MF
HF
J32 J31J37 J36
J34
J33
DAC CONTROL MUX
RELAY SWITCHES
V1
V2
V5
FLOATER POWER
J35
±5V PA REGULATOR
DFBJ38
Traces all LF
Coax for MFTraces V5 LF
Goes to AEB as Channel Input and goes to DFB
Coax only
Leave empty board space for cable to sit.
Leave empty board space for cable to sit.
NOTE: ALL LF signals should be placed in an internal layer.