shinko electric industries co., ltd. 2 package design center nagano, japan shinko.co.jp

An Object-Oriented Internet-based Framework for Chip Package Thermal & Stress SimulationIPACK2001-15810

Shinko Electric Industries Co., Ltd. 2

Package Design CenterNagano, Japanwww.shinko.co.jp

InterPACK'01The Pacific Rim/ASME International Electronic Packaging Technical Conference and Exhibition

July 8–13, 2001, Kauai, Hawaii, USA

Georgia Tech 1

Engineering Information Systems Labeislab.gatech.edu

1Russell S. Peak, 2Ryuichi Matsuki, 1Miyako W. Wilson, 1Donald Koo,1Andrew J. Scholand, 2Yukari Hatcho, 1Sai Zeng

2Georgia Tech Engineering Information Systems Lab eislab.gatech.edu© 1993-2001 GTRC

Phase 1 Summary - Shinko Project

Abstract Accepted for InterPACK'01http://www.asme.org/conf/ipack01/

An Object-Oriented Internet-based Framework forChip Package Thermal and Stress Simulation

1Russell S. Peak, 2Ryuichi Matsuki, 1Miyako W. Wilson, 1Donald Koo,1Andrew J. Scholand, 2Yukari Hatcho, 1Sai Zeng

1Engineering Information Systems LabGeorgia Institute of Technology

Atlanta, Georgia USAhttp://eislab.gatech.edu/

2Package Design CenterShinko Electric Industries Co., Ltd.

Nagano, Japanhttp://www.shinko.co.jp/

AbstractSimulating the behavior of electronic chip packages like ball grid arrays (BGAs) is important to guide andverify their designs. Thermal resistance, thermomechanical stress, and electromagnetics impose some ofthe main challenges that package designers need to address. Yet because packages are composed ofnumerous materials and complex shapes, with current methods an analyst may spend hours to days creatingsimulations like finite element analysis (FEA) models.

This paper overviews work to reduce design cycle time by automating key aspects of FEA modeling andresults documentation. The main objective has been automating FEA-based thermal resistance modelcreation for a variety of package styles: quad flat packs (QFPs), plastic BGAs (PBGAs), and enhancedBGAs (EBGAs). Pilot production tools embody analysis integration techniques that leverage rich productmodels and idealize them into FEA models. We have also demonstrated how the same rich product modelscan drive basic stress models with different idealizations.

In this framework, Internet standards like CORBA enable worldwide access to simulation solvers (e.g.,Ansys and Mathematica). Automation and ease-of-use enable access by chip package designers and otherswho are not simulation specialists. Pilot industrial usage has shown that total simulation cycle time can bedecreased 75%, while modeling time itself can be reduced 10:1 or more (from hours to minutes).


Chip Package Products Shinko

Plastic Ball Grid Array (PBGA) Packages

Quad Flat Packs (QFPs)


Traditional VTMB FEA Model CreationManually Intensive: 6-12 hours

FEA Model Planning Sketches - EBGA 600 Chip Package

VTMB = variable topology multi-body


Outline

Analysis Integration Background– CAD-CAE Interoperability Research & Development

Chip Package Analysis Tool Overview On Automating Variable Topology Multi-Body

(VTMB) FEA Problems Summary


X-Analysis Integration TechniquesX = Design, Mfg., Sustainment, …

a. Multi-Representation Architecture (MRA)

1 Solution Method Model

ABB SMM

2 Analysis Building Block

4 Context-Based Analysis Model3

SMMABBAPM ABB

CBAM

APM

Design Tools Solution Tools

Printed Wiring Assembly (PWA)

Solder Joint

Component

PWB

body3body2

body1

body4

T0

Printed Wiring Board (PWB)

SolderJointComponent

AnalyzableProduct Model

b. Explicit Design-Analysis Associativity

c. Analysis Module Creation Methodology

I n f o r m a l A s s o c i a t i v i t y D i a g r a m

C o n s t r a i n e d O b j e c t - b a s e d A n a l y s i s M o d u l eC o n s t r a i n t S c h e m a t i c V i e w

P l a n e S t r a i n B o d i e s S y s t e m

P W A C o m p o n e n t O c c u r r e n c e

CL

1

m a t e r i a l ,E( , )g e o m e t r y

b o d y

p l a n e s t r a i n b o d y , i = 1 . . . 4P W B

S o l d e rJ o i n t

E p o x y

C o m p o n e n tb a s e : A l u m i n a

c o r e : F R 4

S o l d e r J o i n t P l a n e S t r a i n M o d e l

t o t a l h e i g h t , h

l i n e a r - e l a s t i c m o d e l

A P M A B B

3 A P M 4 C B A M

2 A B Bc

4b o d y 3b o d y

2b o d y

1h oT

p r i m a r y s t r u c t u r a l m a t e r i a l

ii

i

1 S M M

D e s i g n M o d e l A n a l y s i s M o d e l

A B B S M M

s o l d e rs o l d e r j o i n t

p w b

c o m p o n e n t

1 . 2 5

d e f o r m a t i o n m o d e l

t o t a l h e i g h t

d e t a i l e d s h a p e

r e c t a n g l e

[ 1 . 2 ]

[ 1 . 1 ]

a v e r a g e

[ 2 . 2 ]

[ 2 . 1 ]

cT c

T s

i n t e r - s o l d e r j o i n t d i s t a n c ea p p r o x i m a t e m a x i m u m

s j

L s

p r i m a r y s t r u c t u r a l m a t e r i a lt o t a l t h i c k n e s s


P l a n e S t r a i n

g e o m e t r y m o d e l 3

a

s t r e s s - s t r a i nm o d e l 1



B o d i e s S y s t e m

x y , e x t r e m e , 3

T 2

L 1

T 1

T 0

L 2

h 1

h 2

T 3T s j

h s

h c

L c

x y , e x t r e m e , s jb i l i n e a r - e l a s t o p l a s t i c m o d e l


p r i m a r y s t r u c t u r a l m a t e r i a l l i n e a r - e l a s t i c m o d e lc o m p o n e n to c c u r r e n c e

s o l d e r j o i n ts h e a r s t r a i nr a n g e

[ 1 . 2 ]

[ 1 . 1 ]l e n g t h 2 +

3 A P M 2 A B B 4 C B A M

F i n e - G r a i n e d A s s o c i a t i v i t y

ProductModel Selected Module

Analysis Module Catalogs

MCAD

ECAD

Analysis Procedures

CommercialAnalysis ToolsAnsys

Abaqus

Solder Joint Deformation Model

Idealization/Defeaturization

CommercialDesign Tools

PWB

Solder JointComponent

APM CBAM ABB SMM

Ubiquitous Analysis(Module Usage)

Ubiquitization(Module Creation)

CAE

Physical Behavior Research,Know-How, Design Handbooks, ...


An Introduction to X-Analysis Integration (XAI) Short Course Outline

Part 1: Constrained Objects (COBs) Primer– Nomenclature

Part 2: Multi-Representation Architecture (MRA) Primer – Analysis Integration Challenges – Overview of COB-based XAI

Part 3: Example Applications» Airframe Structural Analysis (Boeing)» Circuit Board Thermomechanical Analysis

(DoD: ProAM; JPL/NASA)» Chip Package Thermal Analysis (Shinko)

– SummaryPart 4: Advanced Topics & Current Research


Outline





Tool Usage OverviewPreliminary Design Analysis Module Setup & Usage

Automated FEA Meshing & SolutionThermal Results Documentation

Assistance

1

2a

2b

3a 3b


Flexible High Diversity Design-Analysis Integration

Electronic Packaging Examples: Chip Packages/Mounting Shinko Electric Project: Phase 1 (completed 9/00)

EBGA, PBGA, QFP

CuGround

PKG

Chip

Analysis Modules (CBAMs) of Diverse Behavior & Fidelity

FEAAnsys

General MathMathematica

Analyzable Product Model

XaiTools

XaiToolsChipPackage

ThermalResistance

3D

Modular, ReusableTemplate Librariestemperature change,T

material model

temperature, T

reference temperature, To

cte,

youngs modulus, E

force, F

area, A stress,

undeformed length, Lo

strain,

total elongation,L

length, L

start, x1

end, x2

mv6

mv5

smv1

mv1mv4

E

One D LinearElastic Model(no shear)

T

e

t

thermal strain, t

elastic strain, e

mv3

mv2

xFF

E, A,

LLo

T, ,

yL

r1

12 xxL

r2

oLLL

r4

AF

sr1

oTTT

r3LL

m a t e r i a l

e f f e c t i v e le n g t h , L e f f

d e f o rm a t i o n m o d e l

l in e a r e l a s t ic m o d e l

L o

T o r s i o n a l R o d

G

J

r

2

1

s h e a r m o d u l u s , G

c r o s s s e c t i o n :e f f e c t i v e r in g p o l a r m o m e n t o f i n e r t i a , J

a l 1

a l 3

a l 2 a

li n k a g e

m o d e : s h a f t t o r s i o n

c o n d i t io n re a c t io n

t s1

A

S l ee v e 1

A t s2

d s2

d s1

S l e e v e 2

L

S h a f t

L ef f

s

T

o u t e r r a d i u s , r o a l 2 b

s t r e s s m o s m o d e l

a l l o w a b le s t r e s s

t w i s t m o s m o d e l

M a r g i n o f S a f e t y( > c a s e )

a l l o w a b lea c t u a l

M S

M a r g i n o f S a f e t y( > c a s e )

a l l o w a b l ea c t u a l

M S

a l l o w a b let w i s t Analysis Tools

Design Tools

PWB DBMaterials DB*

Prelim/APM Design ToolXaiTools ChipPackage

ThermalStress

Basic3D**

** = Demonstration module

BasicDocumentation

Automation AuthoringMS Excel


Using Internet/Intranet-based Analysis SolversThick Client Architecture

Client PCs

XaiTools

Thick Client

Users

Internet

June’99-Present:EIS Lab - Regular internal useU-Engineer.com - Demo usage: - US - Japan

Nov.’00-Present:Electronics Co. - Began production usage (dept. Intranet)

Future:Company Intranet and/orU-Engineer.com(commercial) - Other solvers

Iona orbixdj

Mathematica

Ansys

Internet/Intranet

XaiTools AnsysSolver Server


XaiTools Math.Solver Server

CORBA Daemon


FEA Solvers

Math Solvers

CORBA Servers

CO

RB

A IIO

P...

Self-ServeEngineering Service Bureau (ESB)

Server Machines


APM Design ToolPreliminary Design of Packages - PBGA Screens

APM = analyzable

product model


Example Chip Package Idealizations (PBGA)

[ Outer Balls ] Average Thermal Conductivity

x 1

x 2

y 1y 2

% Ball Area = (Pi * (ball diameter / 2)^ 2) / (x2 * y2 - x1 * y1 )

Vertical Direction v: v = Vff+(1-Vf )m [W/mK]Horizontal Direction h: 1/h = Vf/f+(1-Vf )/m [W/mK]

Where: f: thermal conductivity of solder ball [W/mK] m: thermal conductivity of air [W/mK] Vf: volume ratio of solder ball

- =

V i a + A i r A i r V i a

R r

S R r n 2 2

E q u a t i o n f o r T o t a l S e c t i o n a l V i a A r e a

S : t o t a l s e c t i o n a r e a o f v i a sR : o u t e r r : i n n e r n : n u m b e r o f v i a

l x r y 2r : a radius of balll : a side length of squarex : number of ballsy : number of squares

l

l

r + r r =5 - 10 Balls

[ Inner Balls (Thermal Balls) ](Ball value in all directions)

Thermal Conductivity

Idealization for solder-joint/thermal ball

Idealization for thermal via

Courtesy of Shinko - see [Koo, 2000]


Generic COB Browser with design and analysis objects

(attributes and relations)

CustomizedAnalysis Module Tool

with idealized package cross-section

COB-based Analysis TemplateTypical Input Objects for EBGA Thermal Resistance Module

COB = constrained

object


COB-based Analysis TemplateTypical Highly Automated Results

FEATemperature Distribution

Thermal Resistancevs.

Air Flow Velocity

Auto-CreatedFEA Inputs

(for Mesh Model)

Analysis Module Tool

COB = constrained

object


Test Cases - ShinkoAuto-Generated FEA Mesh Model of PBGA 256 with Thermal Vias

FEA mesh model with strong inter-body coupling

29 idealized bodies10 idealized materials

1 main pattern~3 sub patterns

Small Idealized Vias

Thin Copper Layers


Results ValidationEBGA 352 (4L-PCB)

0

2

4

6

8

10

12

14

0 1 2 3 4

Air Flow Velocity [m/s]

ja

[deg

reeC

/W] COSMOS (PB)

COSMOS (BB)

ANSYS (PB)

ANSYS (BB)

Measure

Thermalresistance

Good comparisons: (a) simulation via VTMB algorithm (in XCP)(b) simulation via traditional manual approach (c) physical measurements

(a)

(b)(c)


Outline





Traditional VTMB FEA Model CreationManually Intensive: 6-12 hours

FEA Model Planning Sketches - EBGA 600 Chip Package

VTMB = variable topology multi-body


12

3

12

3

12

4

1a

2

3a

1b

1c

3b 3c

3a 3b

2

1a 1b 1c

1d 1e

3

1a 1b1c1d

23

4a 4b 4c

Idealized Analytical Bodies Decomposed FEA Geometry Models

original

topology change (no body change)

body change (includes topology change)

Variable Topology Multi-Body (VTMB) FEA Meshing Challenges

Labor-intensive “chopping”

Meshing & Solving

DesignModel


Product Information-Driven FEA MethodologyPurpose of VTMB Methodology

algorithmij

Design Types i = 1…m Analysis Types j = 1…n

Design Instances Analysis Instances

VTMB FEA ModelsVTMB

Methodologycreate algorithmij

once

for a given ij j{1…n} (not all design types have all analysis types)e.g.) for i=1(EBGA), j=1(thermal resistance) j=2 (thermal stress) for i=2 (PWB), j=1 (warpage)

Chip package APMs thermal resistance CBAMs

PWB APMsthermal stress CBAMs

ANSYS SMMs

VTMB= variable topology multi-body

use algorithmijmany times


MethodologyScope of VTMB algorithmij for cbamij

Conditions &Next-Higher

CBAMs

Boundary Condition Objects & Discipline

Analyzable Product Model

Part Feature& Assembly Structure

Behavior/Mode

MoSallowableactual

Objectives

AnalysisContext

Context-BasedAnalysis Model

(CBAM)idealizations,

allowables

Step 1a

boundary variables

Step 1b

AssociativityLinkages,

Step 4

Pseudo-Analysis Building Blocks(pseudo-ABBs)

Analysis Subsystems

SolutionMethod Models

(SMMs)

transformations,Step 2

Step 3

VTMBalgorithmij

for cbamij

[Koo, 2000]

[Tamburini, 1999]

[Peak, 2001]


Design Changes with Large Topology Impact Example Variations: PBGAs & EBGAs

EBGA 600with2 Steps

EBGA 325withNo Steps

PBGA 313with

Thermal Vias &Thermal Balls

2D partial views of 3D models


Idealized Analytical Models

FEA Mesh Models

thin & large thick & small


z-direction topology changes

Design Change with Small Topology ImpactHeat Spreader Size Variations - EBGA 600


Test Cases - ShinkoAuto-Generated FEA Model: QFP PCDPH

FEA mesh model with strong inter-body coupling

23 idealized bodies9 idealized materials

1 main pattern~3 sub patterns


Design Changes with Large Topology Impact

Example Variations: QFPs

QFP 128 SLDie Pad

QFP 208 DPHHS/Tape



Basic Stress Analysis Module ToolHighly automated FEA model creation

Re: thermal model:• Same APM (but different idealizations)• CORBA-based solvers, etc.

Pattern-based meshing• Adjustable mesh density

PBGA 625


Multi-Fidelity IdealizationsMode-dependent Idealized Geometries; Same Dimension

Thermal Resistance

Thermal Stress

FEA ModelIdealized Geometry (3D)

Common Design ModelCu(0.15)BT-Resin (0.135)

0.56

(Air)

(0.135)

Al Fin (1.5)Adhesive(0.05)

FEA ModelIdealized Geometry (3D)


Outline





Pilot & Initial Production Usage ResultsProduct Model-Driven Analysis

Analysis Model Creation ActivityWith TraditionalPractice

With VTMBMethodology* Example

Create initial FEA model (QFP cases) 8-12 hours 10-20 minutes QFP208PIN

Create initial FEA model (EBGA cases) 6-8 hours 10-20 minutes EBGA352PIN

Create initial FEA model (PBGA cases) 8-10 hours 10-20 minutes PBGA256PIN

Create variant - small topology change 0.3-6 hours (10-20 minutes) - Moderate dimension change

(e.g., EBGA 600 heat sink size variations)

Create variant - moderate topology change (6-8 hours)- (10-20 minutes) - Add more features

(e.g., increase number of EBGA steps)

Create variant - large topology change (6-8 hours)+ (10-20 minutes)-or N/A

Add new types of features

(e.g., add steps to EBGA outer edges)

Reduced FEA modeling time > 10:1 (days/hours minutes) Reduced simulation cycle > 75%

Enables greater analysis intensity Better designs Leverages XAI / CAD-CAE interoperability techniques

– Objects, Internet/web services, ubiquitization methodology, …

References[1] Shinko 5/00 (in Koo, 2000)[2] Shinko evaluation 10/12/00

VTMB = variable topology multi-body technique [Koo, 2000]


Summary of Tools and Services offered via Georgia Tech Research Corp.

http://eislab.gatech.edu/

XaiTools FrameWork™

– General-purpose analysis integration toolkit Product-Specific Toolkits

– XaiTools PWA-B™

– XaiTools ChipPackage™

U-Engineer.com™

– Internet-based engineering service bureau (ESB)– Self-serve automated analysis modules Full-serve consulting

Research, Development, and Consulting– Analysis integration & optimization – Short courses– Product-specific analysis module catalogs – Internet/Intranet-based ESB development– Knowledge-based engineering & information technology

» PDM, STEP, GenCAM, XML, UML, Java, CORBA, Internet, …– CAD/CAE/CAM, parametric FEA, thermal & mechanical analysis


For Further Information ... EIS Lab web site: http://eislab.gatech.edu/

– Publications, project overviews, tools, etc.– See: Publications DAI/XAI Suggested Starting Points

X-Analysis Integration (XAI) Technologyhttp://eislab.gatech.edu/pubs/reports/EL002/

XaiTools™ home page: http://eislab.gatech.edu/tools/XaiTools/

Pilot commercial ESB: http://www.u-engineer.com/– Internet-based self-serve analysis– Analysis module catalog for electronic packaging– Highly automated front-ends to general FEA & math tools

http://eislab.gatech.edu/

http://eislab.gatech.edu/pubs/reports/EL002/



http://eislab.gatech.edu/tools/XaiTools/

http://www.u-engineer.com/


Nomenclature ABB-SMM transformation idealization relation between design and analysis attributes APM-ABB associativity linkage indicating usage of one or more iABB analysis building blockAMCOM U. S. Army Aviation and Missile CommandAPM analyzable product modelCAD computer aided designCAE computer aided engineeringCBAM context-based analysis modelCOB constrained objectCOI constrained object instanceCOS constrained object structureCORBA common ORB architectureDAI design-analysis integrationEIS engineering information systemsESB engineering service bureauFEA finite element analysisFTT fixed topology templateGUI graphical user interfaceIIOP Internet inter-ORB protocolMRA multi-representation architectureORB object request brokerOMG Object Management Group, www.omg.comPWA printed wiring assembly (a PWB populated with components)PWB printed wiring boardSBD simulation-based designSBE simulation-based engineeringSME small-to-medium sized enterprise (small business)SMM solution method modelProAM Product Data-Driven Analysis in a Missile Supply Chain (ProAM) project (AMCOM)PSI Product Simulation Integration project (Boeing)STEP Standard for the Exchange of Product Model Data (ISO 10303).VTMB variable topology multi-bodyXAI X-analysis integration (X= design, mfg., etc.)XCP XaiTools ChipPackage™

XFW XaiTools FrameWork™

XPWAB XaiTools PWA-B™

shinko electric industries co., ltd. 2 package design center nagano, japan shinko.co.jp

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