[sic-en-2013-15] accurate power circuit loss estimation method for power converters with si-igbt and...

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606 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 60, NO. 2, FEBRUARY 2013

Accurate Power Circuit Loss Estimation Methodfor Power Converters With Si-IGBT

and SiC-Diode Hybrid PairKazuto Takao and Hiromichi Ohashi, Life Member, IEEE

AbstractAn accurate power circuit loss estimation methodhas been developed for designing power converters with hybridpairs of silicon (Si) insulated-gate bipolar transistor (Si-IGBT)and silicon carbide (SiC) Schottky barrier diode/SiC p-i-n diode.An analytical model of the switching losses of the hybrid pairsis proposed to achieve high accuracy and short calculation time.The nonlinearity of the device parameters and the stray induc-tance in the circuit are considered in the model. For the accu-rate power loss calculation, an empirical parameter extractionmethod is introduced for extracting device parameters. The cal-culated circuit power losses are compared with measurementresults, and good agreements are confirmed. By using the proposedmethod, the power loss of a power converter utilizing 4.5-kVSi-IGBT/SiC-p-i-n-diode hybrid pairs is estimated to investigatethe upper limitation of the switching frequency.

Index TermsInsulated-gate bipolar transistors (IGBTs), p-i-ndiode, power loss, Schottky barrier diode.

I. INTRODUCTION

H IGH-POWER medium-voltage power converters supportvarious social infrastructures including railway systems,industrial drive systems, and electric power systems. Insulated-gate bipolar transistor (IGBT) and p-i-n diode are frequently

utilized in high-power medium-voltage power converters. Re-cently, hybrid pairs of silicon (Si) IGBT (Si-IGBT) and sili-con carbide (SiC) Schottky barrier diode (SiC-SBD)/SiC p-i-ndiode have been actively developed for high-power converterapplications [1][4].

In the power converter design, power losses of the power de-vices are important design parameters because they determineefficiency of the power converter circuits and cooling systemsof the power devices [5], [6]. An accurate power loss estimationmethod of the power devices is needed for the efficient powerconverter circuit design. In addition, the short calculation timeis also an important feature to calculate the power losses invarious circuit conditions.

Manuscript received July 15, 2012; revised October 3, 2012; acceptedOctober 10, 2012. Date of publication January 9, 2013; date of currentversion January 18, 2013. The review of this paper was arranged by EditorE. Seebacher.

K. Takao is with the Electron Devices Laboratory, Corporate Researchand Development Center, Toshiba Corporation, Kawasaki 212-8582, Japan,on leave from Power Electronics Research Center, National Institute of Ad-vanced Industrial Science and Technology, Tsukuba 305-8561, Japan (e-mail:[email protected]).

H. Ohashi is with the Energy Technology Research Institute, NationalInstitute of Advanced Industrial Science and Technology, Tsukuba 305-8561,Japan (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2012.2226179

Power losses of the power devices consist of conductionlosses and switching losses. The conduction loss can beestimated based on the static IV characteristic of the powerdevice, while the switching loss is influenced by the circuitstray parameters such as stray inductances and capacitances[7][9]. This means that the consideration of the correlationbetween the power semiconductor device parameters andcircuit stray parameters is indispensable for the accurate power

loss estimation.Circuit simulators are widely utilized to estimate the powerlosses of power devices. They calculate the voltage and currentwaveforms of the power devices based on device compactmodels such as SPICE models. The influence of the circuit strayparameters can be estimated by using circuit simulators. Fromthe simulated voltage and current waveforms, the switchinglosses are calculated. For this purpose, a lot of physics-basedIGBT and p-i-n diode models have been developed [10][13].In order to make physics-based models, the physical deviceparameters of the IGBTs are needed. Generally, the informationof the internal structure of the IGBTs is not opened to circuitdesigners. Hence, the extraction of the accurate physical device

parameters is difficult. Other issues of the circuit simulator areinaccurate switching waveforms and nonconvergences. Theseare often encountered in particularly high-speed switchingconditions. Furthermore, it is not suitable for massive dataprocessing to compare a lot of circuit design cases. For thesereasons, power converter circuit designers have difficulty in thepower loss estimation by using the circuit simulators.

In order to resolve the aforementioned issues, an analyticalpower loss model is successfully developed for power convertercircuits utilizing power MOSFETs [7][9]. The model consid-ers the influences of circuit stray inductances and the nonlin-earity of the junction capacitances of the power MOSFETs.The model demonstrates good tradeoff between the accuracy

and simulation time. However, the analytical loss model forIGBTs and p-i-n diodes, which are bipolar devices, has not beendeveloped.

This paper proposes a novel power loss estimation methodbased on an analytical power loss model of Si-IGBT and SiC-SBD/p-i-n-diode pairs. In the proposed method, switching lossof the hybrid pairs is calculated by analytical power loss modelsderived based on the equivalent circuits for the Si-IGBT, SiC-SBD, and SiC p-i-n diode. To realize accurate power lossestimation, an empirical method for the parameter extractionis introduced. Experimental verifications of the power lossesestimated by the proposed method are carried out. By usingthe proposed method, power losses of the high-voltage Si-IGBT

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TAKAO AND OHASHI: LOSS ESTIMATION METHOD FOR CONVERTERS WITH HYBRID PAIR 607

Fig. 1. Equivalent circuits for the Si-IGBT, SiC-SBD, and SiC p-i-n diode.

and SiC-p-i-n-diode hybrid pair are calculated to investigate theupper limitation of the switching frequency.

II. ANALYTICAL POWER LOS S MODELS FOR

Si-IGBT/SiC-D IODE HYBRID PAIRS

In the proposed analytical power loss estimation method, thepower losses are estimated from their switching waveforms.The switching waveforms are described by analytical modelderived based on the equivalent circuit of power devices. Thedevice parameters in the analytical model are described byapproximation formulas. Fitting coefficients in the approxi-mation formulas are empirically extracted based on measuredswitching waveforms.

A. Equivalent Circuits of Si-IGBT, SiC-SBD,

and SiC p-i-n Diode

Power loss of a power device consists of conduction lossand switching loss. The conduction loss is calculated from thestatic IV characteristic. In the proposed power loss estimationmethod, measured static IV characteristics are utilized to

calculate the conduction loss.The switching loss is influenced by the circuit voltage, cur-

rent, stray inductances in the circuit, and gate drive conditions.In the proposed method, analytical switching models are uti-lized to calculate the switching loss.

Fig. 1 shows equivalent circuits for the Si-IGBT, SiC-SBD,and SiC p-i-n diode to establish the analytical switching lossmodels. The Si-IGBT and SiC p-i-n diode are bipolar devicesso that they have diffusion capacitances (CD) that representminority carrier storage in the drift regions.

To realize the accurate power loss estimation, the modelparameters in Fig. 1 are described with empirically obtainedfitting parameters or equations extracted from switching wave-

forms. The intention of employing the empirical model is toimprove the accuracy of the calculation results. In addition,

Fig. 2. Equivalent circuit of a chopper.

other advantages of the empirical model are simple and easyto implement.

B. Switching Models and Parameter Extraction Procedures

for the Si-IGBT

To analyze the switching behavior of power devices, achopper circuit with an inductive load is assumed. Fig. 2shows the equivalent circuit of the chopper. Stray inductances(Ls1, Ls2, Ls3, Ls4, Ls5, and Lsg) are taken into account in theequivalent circuit. The schematic of typical switching wave-forms of the Si-IGBT in the chopper is shown in Fig. 3. Theswitching waveforms of the power devices can be divided insome periods based on the physical behavior [7][9].

1) Turn-On Phase: In the period of I, the collector currentic increases toward the load current IL with increasing the gate-emitter voltage vge. The ic is given as follows [14]:

ic = gm(vge Vth) (1)

where gm is the transconductance and Vth is the thresholdvoltage of the Si-IGBT. The analytical model of vge which


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Fig. 3. Schematic of typical switching waveforms under a low-gate-resistancecondition.

considered the influence of the source stray inductance Ls5 isdescribed in [3].

In the proposed method, ic is described with an empiricalequation as a function of vge. The empirical equation is ex-tracted from the icvge curve. Because the Si-IGBT is thebipolar device, the carrier distribution in the n drift region atthe turn-on transient is different from that of the steady state.Therefore, the empirical equation of ic is extracted from turn-on waveforms.

The collectoremitter voltage vce is decreased by inductivevoltage of the stray inductance in the main circuit loop Ls(=Ls1 + Ls2 + Ls3 + Ls4 + Ls5) and is described as follows:

vce = Vcc Lsdicdt

(2)

where Vcc is the dc link voltage.In the period of II, the collector-emitter voltage vce decreasesand is described as follows:

vce = V

ce

(VGH + VGL) VGPon

Rg Cgc

t (3)

where VGH and VGL are applied gate drive voltages at the ONstate and OFF state, respectively, VGPon is the gateemittervoltage during this period, and Vce is vce at t = t2. Cgc is thejunction capacitance between the gate and collector electrodesand is described as follows:

Cgc =

WSCAgd =

2 vce

qNB

1

2

Agd (4)

where is the permittivity of silicon, WSC is the width of thedepletion layer in the drift region,Agc is the cross-sectional areabetween the gate and collector electrodes, q is the unit charge,and NB is the total carrier density in the depletion layer. NBconsists of the doping carrier density in the drift region, thecarrier density by the hole current, and the carrier density bythe electron current [15]. By using the vce and vge waveforms,Cgc is described as follows:

Cgc =Igdvcedt

=

VGPonRg

dvcedt

(5)

where Ig is the gate current and VGPon is the gate voltage atthis period. VGPon has a constant value because ic is constant

(= IL) in this period. From the waveforms of vge and vce, Cgccan be extracted.

In this period, the SiC diode is reverse biased, and the reversediode current idiode is added to the ic. Therefore, ic is describedby the following equation:

ic = IL + idiode. (6)

In the case of the SiC-SBD, idiode is the charging currentof the junction capacitance. In the case of the SiC p-i-n diode,idiode is the reverse recovery current by discharging the diffu-sion capacitance. An analytical model ofidiode of the SiC p-i-ndiode is described in Section II-C.

2) Turn-Off Phase: In the period of III, vge decreasesrapidly and becomes smaller than Vth before vce reaches Vccunder low-gate-resistance conditions [16]. The channel currentdisappears in this situation. Therefore, ic is independent ofvge,and vce is given by the following equation [15]:

vce =1

2NB

WBQ0

b

1 + b IL t (7)

where WB is the width of drift region, Q0 is the stored chargein the n drift region at steady ON state, and b is the mobilityratio. Equation (7) is redescribed into the following form:

vce = a IL t (8)

where a represents 1/2 NB WB/Q0 b/(1 + b) and is ex-tracted from the vce waveform. Notice that a is the functionof the IL because Q0 is the function of the IL.

In the period of IV, ic is the discharge current of the diffusioncapacitance CD of the Si-IGBT. This current is expressed asfollows under high lifetime situation [11]:

ic = IL exp (1

p-n-p)

tc

(9)

where p-n-p is the common-base current gain of the p-n-ptransistor in the Si-IGBT at this period and c is the carriertransit time. These parameters can be extracted from the icwaveform.

Fig. 4 shows the parameter extraction flowchart for theSi-IGBT. First of all, the gate input capacitance Ciss is ex-tracted by the static CV characteristic. Then, other modelparameters are extracted from the switching waveforms. Byusing the extracted parameters, waveform and switching losscalculations are implemented. The calculated waveforms andswitching losses are compared with the measured ones. In some

case, the extracted device parameters do not perfectly representthe nonlinearity of the real devices, and some errors may beobserved in calculated waveforms and switching losses. Whenthe error is not acceptable, the coefficients in approximationformulas of device parameters should be adjusted. The criterionto adjust device parameters is the acceptable error determinedby circuit designers.

C. Switching Models and Parameter Extraction Procedures

for the SiC Diodes

A schematic of the turn-off waveforms of the SiC p-i-n diodeis shown in Fig. 5. In the period of I-d, the diode current iddecreases until the peak reverse recovery current IRM with thesame current slope di/dt before time td1. The reverse recovery


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Fig. 4. Flowchart of parameter extraction for the Si-IGBT.

Fig. 5. Schematic of turn-off waveforms of the SiC p-i-n diode.

Fig. 6. Schematic of turn-off waveforms of the SiC-SBD.

current consists of the discharge currents ofCD and Cj . In thecase of the p-i-n diode, CD is much larger than Cj .

In the period of II-d, id is still in the reverse recovery state.In this period, the diode voltage vd enters the reverse-blockingstate. id is described as follows [17]:

id = IRM exp

t

RR

(10)

where IRM is the peak reverse recovery current and RR is thediode reverse recovery time constant which can be measured

Fig. 7. Flowchart of parameter extraction for the SiC diodes.

TABLE IDEVICE PARAMETERS

from the current waveform. The diode voltage vd is describedas follows:

vd = Vcc vce + Ls diddt . (11)

At time td3, vd corresponds to (Vcc vce).In the period of III-d, id is constant to its OFF-state current,

and vd reverse biased until Vcc.The turn-off waveforms of the SiC-SBD are shown in Fig. 6.

The reverse current of the SiC-SBD is caused by the chargingof the Cj . At time td1, the SiC-SBD enters its reverse-blockingstate. The Cj of the SiC-SBD starts charging, and the chargingcurrent flows. id and vd form the ringing waveforms by theresonance of theCj and Ls. Therefore, the id and vd waveformsafter td1 can be formulated by using Cj and Ls.

Fig. 7 shows the parameter extraction flowcharts for the

SiC-SBD and SiC p-i-n diode. First of all, the static CjV char-acteristics are measured. The Cj is represented as a function of


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Fig. 8. (Dashed) Calculated and (solid) measured waveforms. (a) Turn-on of the 600 V/6 A Si-IGBT. (b) Turn-off of the 600 V/6 A Si-IGBT. (c) Turn-on of the4.5-kV Si-IGBT. (d) Turn-off of the 4.5-kV Si-IGBT.

the reverse-biased voltage. In the case of the SiC p-i-n diode,the reverse recovery charge Qrr and rr are extracted from theswitching waveforms. By using all the extracted parameters, the

switching waveforms and reverse recovery loss are calculatedand compared with the measured ones. If the calculated resultsare not acceptable, the parameters should be adjusted to obtainthe acceptable error.

III. EXPERIMENTAL VERIFICATION OF THE

ANALYTICAL SWITCHING MODELS

The switching waveforms, which are calculated with theanalytical switching models shown in Section II, are com-pared with the measured waveforms to evaluate the accuracyof the models. The 600-V Si-IGBT/SiC-SBD and 4.5-kV Si-IGBT/SiC-p-i-n-diode hybrid pairs are demonstrated. Further-

more, the switching energies are estimated from the calculatedwaveforms and compared to the measured values. The modelparameters of the 600 V/6 A Si-IGBT and 600 V/6 A SiC-SBDboth produced by Infineon, 4.5 kV/50 A Si-IGBT produced byToshiba, and 4.5 kV/25 A SiC p-i-n diode fabricated by the Ad-vanced Industrial Science and Technology [18] are extracted.Two 4.5 kV/25 A SiC-p-i-n-diode chips are connected in paral-lel to use with the 4.5 kV/50 A Si-IEGT. Table I summarizesthe extracted parameters of the semiconductor devices. Theparameters of the 600-V Si-IGBT and SiC-SBD are extractedat the temperature of 150 C, and the parameters of the 4.5-kVSi-IGBT and SiC p-i-n diode are extracted at the temperature of125 C.

Fig. 8 shows the calculated (dashed) and measured (solid)switching waveforms for the 600 V/6 A Si-IGBT and

4.5 kV/50 A Si-IGBT. The switching waveforms are obtainedin the chopper shown in Fig. 2.

In the case of the 600 V/6 A Si-IGBT, input dc voltage is

300 V, and stray inductance in the main circuit loopLs is82 nH.The gate resistance is 10 , and the gate applied voltage is+15 V. In the case of the 4.5 kV/50 A Si-IGBT, input dc voltageis 2500 V, and stray inductance in the main circuit loop Ls is3.5 H. The gate resistance is 100 , and the gate appliedvoltage is +15/10 V.

The waveform calculations are implemented by using thecircuit parameters of the experiment. In Fig. 8(a) and (b), deviceparameters of the 600 V/6 A Si-IGBT and 600-V SiC-SBDare utilized. On the other hand, in Fig. 8(c) and (d), deviceparameters of the 4.5 kV/50 A Si-IGBT and 5-kV SiC p-i-ndiode are utilized. As seen in Fig. 8, a good agreement betweenthe measured waveforms and calculated waveforms is obtained.

The results indicate that the proposed method can exactlyestimate the influence of circuit parameters including the strayinductance.

Turn-on and turn-off switching energies are estimated bytime integrating the products of vce and ic waveforms. Theswitching energies obtained by measured and calculated wave-forms are shown in Fig. 9. As seen in the figure, the differencebetween the measured and calculated switching energies iswithin 10%. The error of the Si-IGBT switching energies,which are calculated with the circuit simulator (PSPICE), isevaluated in [13]. In that simulation, despite utilizing the op-timized device parameters of the physics-based IGBT model,the error in the worst case is 52%. Therefore, the accuracy of

the proposed method is significantly improved compared to theconventional circuit simulator.


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Fig. 9. Dependence on switching energies on load current IL. (a) Turn-on switching energyEon of the 600 V/6 A Si-IGBT. (b) Turn-off switching energy Eoffof the 600 V/6 A Si-IGBT. (c) Eon of the 4.5-kV Si-IGBT. (d) Eoff of the 4.5-kV Si-IGBT.

IV. ESTIMATION OF THE SWITCHING-F REQUENCY

LIMITATION OF THE HIG H-VOLTAGE

Si-IGBT/SiC-p-i-n-DIODE HYBRID PAI R

Reduction in size and weight of high-power medium-voltage

power converters is essential for saving space and cutting thecost. One of the issues is that they often need bulky and heavymagnetic components such as transformers and LC filters[19]. In order to shrink the size of the magnetic components,a high-switching-frequency operation of power converters isrequired. For realizing the high-switching-frequency operation,high-voltage Si-IGBT/SiC-p-i-n-diode hybrid pairs have beeninvestigated [20]. In this section, the switching-frequency limi-tation of the high-voltage Si-IGBT/SiC-p-i-n-diode hybrid pairis investigated from the point of view of the power loss. Thepower loss of the Si-IGBT is calculated by the proposed methodin this work. The model parameters of 4.5 kV/50 A Si-IGBTand two parallel 4.5 kV/25 A SiC p-i-n diodes extracted in the

previous section are utilized for the power loss calculation.Fig. 10 shows the turn-on and turn-off switching energies

(Eon and Eoff, respectively) dependence on the gate resistanceRg of the Si-IEGT at Tj = 125

C. The Eon is proportionalto the Rg. In contrast, the Eoff is not influenced by the Rg inthe range smaller than 100 . Both Eon and Eoff increase withincreasing the IL.

Utilizing the Eon and Eoff data shown in Fig. 10, the depen-dence of the total power loss of the Si-IGBT Ptotal, which con-sists of the conduction loss and switching loss, on the switchingfrequency is estimated. In the power loss calculation, a standardtwo-level inverter circuit shown in Fig. 11 is assumed. Theinverter specifications are listed in Table II.

Fig. 12 shows the dependence of the total power lossPloss of the Si-IEGT on the switching frequency fsw.

Fig. 10. Calculated switching energies of the 4.5 kV/50 A Si-IGBT. (a) Turn-on switching energy Eon. (b) Turn-off switching energy Eoff.

TABLE IIINVERTER SPECIFICATIONS

With a conventional forced liquid cooling technique, the

maximum allowable power loss per chip of the Si-IEGTis about 270 W. Therefore, the switching frequencies of


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Fig. 11. Equivalent circuit of a two-level inverter used for power loss calcula-tion of the 4.5 kV/50 A Si-IGBT.

Fig. 12. Dependence of the total power lossPloss of the 4.5 kV/50 A Si-IGBTon the switching frequency fsw.

2 kHz at Rg = 100 and 2.9 kHz at Rg = 20 can beavailable.

V. CONCLUSION

A novel power loss estimation method for Si-IGBT/SiC-SBDand Si-IGBT/SiC-p-i-n-diode hybrid pairs has been presentedto realize high accuracy and fast calculation. The proposedmethod is validated by comparing the calculated results withthe measurement results. The error of the calculated switchingenergies is within 10%. The results indicate that the proposedmethod could implement an accurate power loss design ofpower converters utilizing hybrid pairs.

By using the proposed method, the switching-frequency lim-itation of the high-voltage Si-IGBT/SiC-p-i-n-diode hybrid pairis investigated from the viewpoint of the power loss. The resultsindicate that 2.9-kHz operations of a 4.5-kV Si-IGBT would be

possible with the SiC p-i-n diode.

REFERENCES

[1] W. Bartsch, S. Gediga, H. Koehler, R. Sommer, and G. Zaiser, Compar-ison of Si- and SiC-powerdiodes in 100 A-modules, in Proc. 12th EPE,Aalborg, Denmark, Sep. 2007, pp. 18, [CD-ROM].

[2] K. Takao, Y. Tanaka, K. Sung, K. Wada, T. Shinohe, T. Kanai, andH. Ohashi, 3-level power converter with high-voltage SiC-PiN diode andhard-gate-driving of IEGT for future high-voltage power conversion sys-tems, in Proc. IEEE Appl. Power Electron. Conf., 2010, pp. 11011107.

[3] H. Mirzaee, A. De, A. Tripathi, and S. Bhattacharya, Design comparisonof high power medium-voltage converters based on 6.5 kV Si-IGBT/Si-PiN diode, 6.5 kV Si-IGBT/SiC-JBS diode, 10 kV SiC MOSFET/SiC-JBS diode, in Proc. IEEE ECCE, 2011, pp. 24212428.

[4] T. Duong, A. Hefner1, K. Hobart, S. Ryu, D. Grider, D. Berning, J. M.

Ortiz-Rodriguez, E. Imhoff, and J. Sherbondy, Comparison of 4.5 kVSiC JBS and Si PiN diodes for 4.5 kV Si IGBT anti-parallel diode applica-tions, in Proc. IEEE Appl. Power Electron. Conf., 2012, pp. 10571063.

[5] U. Drofenik and J. W. Kolar, A general scheme for calculating switching-and conduction-losses of power semiconductors in numerical circuit sim-ulations of power electronic systems, in Proc. IPEC, 2005, pp. 16041610, [CD-ROM].

[6] Y. Hayashi, K. Takao, T. Shimizu, and H. Ohashi, Power converterintegration design based on evaluation platform concept, in Proc. 4th

Int. CIPS, 2006, pp. 14, [CD-ROM].[7] Y. Xiao, H. Shah, T. P. Chow, and R. J. Gutmann, Analytical model-

ing and experimental evaluation of interconnect parasitic inductance onMOSFET switching characteristics, in Proc. APEC, 2004, pp. 516521.[8] K. Takao, Y. Hayashi, S. Harada, and H. Ohashi, Novel evaluation ap-

proach for an ultra high speed low loss power converter, in Proc. EPE-PEMC, 2004, [CD-ROM].

[9] Y. Ren, M. Xu, J. Zhou, and F. C. Lee, Analytical loss model of powerMOSFET, IEEE Trans. Power Electron., vol. 21, no. 2, pp. 310319,Mar. 2006.

[10] A. R. Hefner and D. L. Blackburn, An analytical model for the steady-state and transient characteristics of the power insulated-gate bipolar tran-sistor, Solid State Electron., vol. 31, no. 10, pp. 15131532, Oct. 1988.

[11] P. R. palmer, E. Santi, J. L. Hudgins, X. Kang, J. C. Joyce, and P. Y.Eng, Circuit simulator models for the diode and IGBT with full temper-ature dependent features, IEEE Trans. Power Electron., vol. 18, no. 5,pp. 12201229, Sep. 2003.

[12] T. R. McNutt, A. R. Hefner, Jr., H. Alan Mantooth, J. Duliere, D. W.Berning, and R. Singh, Silicon carbide PiN and merged PiN Schottky

power diode models implemented in the Saber circuit simulator, IEEETrans. Power Electron., vol. 19, no. 3, pp. 573581, May 2004.

[13] A. T. Bryant, X. Kang, E. Santi, P. R. Palmer, and J. L. Hudgins, Two-step parameter extraction procedure with formal optimization for physics-based circuit simulator IGBT and p-i-ndiode models,IEEE Trans. Power

Electron., vol. 21, no. 2, pp. 295309, Mar. 2006.[14] B. J. Baliga, Power Semiconductor Devices. Boston, MA: PWS-Kent,

1995, pp. 388395.[15] T. Ogura, H. Ninomiya, K. Sugiyama, and T. Inoue, Turn-off switching

analysis considering dynamic avalanche effect for low turn-off loss high-voltage IGBTs, IEEE Trans. Electron Devices, vol. 51, no. 4, pp. 629635, Apr. 2004.

[16] K. Sheng, F. Udera, and G. A. J. Amaratunga, Optimum carrier distri-bution of the IGBT, Solid State Electron., vol. 44, no. 9, pp. 15731583,Sep. 2000.

[17] P. O. Lauritzen and C. L. Ma, A simple diode model with reverse recov-

ery, IEEE Trans. Power Electron., vol. 6, no. 2, pp. 188191, Apr. 1991.[18] Y. Tanaka, K. Takao, K. Sung, K. Wada, T. Kanai, and H. Ohashi, Devel-opment of 6 kV-class SiC-PiN diodes for high-voltage power inverter, inProc. Int. Symp. Power Semicond. Devices ICs, 2010, pp. 213216.

[19] K. Kunomura, M. Onishi, M. Kai, N. Iio, and N. Nakajima, Electronicfrequency converter feeding single phase circuit for Shinkansen, in Proc.

IPEC, 2010, pp. 31363143.[20] K. Takao, Y. Tanaka, K. Sung, K. Wada, T. Shinohe, T. Kanai, and

H. Ohashi, High-frequency switching high-power converter with SiC-PiN diodes and Si-IEGTs, in Proc. IEEE ECCE, 2010, pp. 45584563.

Kazuto Takao received the Ph.D. degree in energyscience from Toyama University, Toyama, Japan,in 2002.

He is currently with the Electron Devices Labora-tory, Corporate Research and Development Center,Toshiba Corporation, Kawasaki, Japan.

Hiromichi Ohashi (LM12) received the Ph.D. de-gree in electronics from Tohoku University, Sendai,Japan.

He is with the Energy Technology Research Insti-tute, National Institute of Advanced Industrial Sci-ence and Technology, Tsukuba, Japan.

[sic-en-2013-15] accurate power circuit loss estimation method for power converters with si-igbt and...

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