sige meeting, geneva 1 fast silicon sensors. sige meeting, geneva fast sensors 2 n-well p-substrate...
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SiGe Meeting, Geneva 1
Fast Silicon Sensors
SiGe Meeting, Geneva
• Fast sensors
2
N-well
P-substrate
Time
SiGe Meeting, Geneva
• Fast sensors
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NMOS PMOSN-well
P-substrate
Time
SiGe Meeting, Geneva
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Time
20-40ps
500ps
InformationT1,A1T2,A2T3,A3
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N-well
P-substrate
Time
NPN
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Time
~60ps
InformationT1
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N-well
P-substrate
Time
VDD+~2V
GND
SiGe Meeting, Geneva
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TimeTime
~60ps
SiGe Meeting, Geneva
AMS
• ams 0.35µm SiGe-BiCMOS process is based on the proven 0.35µm mixed-signal CMOS process and includes an additional high performance analog oriented SiGe HBT transistor module.
• This advanced RF-process offers high-speed HBT-transistors with excellent analog performance such as high fmax and low noise as well as complementary MOS transistors with the option of 5V I/O CMOS transistors.
• Accurately modeled high linear precision capacitors are available as Poly1 / Poly2 or Metal2 / Metal3 versions.
• The modular integration of linear resistors, high quality varactors and thick Metal 4 spiral inductors makes this process ideally suitable for a wide range of high performance RF applications up to 20 Gb/s.
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SiGe Meeting, Geneva
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N-well
P-substrate
Time
NPN
+50V
0V
SiGe Meeting, Geneva
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SiGe Meeting, Geneva
IHP
• A high-performance 0.25 µm technology with npn-HBTs up to fT/fmax= 180/220 GHz.• SG25H3:• A 0.25 µm technology with a set of npn-HBTs ranging from a higher RF performance (fT/fmax= 110 GHz/180
GHz) to higher breakdown voltages up to 7 V.• SGB25V:• A cost-effective technology with a set of npn-HBTs up to a breakdown voltage of 7 V. • SG13S:• A high-performance 0.13 µm BiCMOS with npn-HBTs up to fT / fmax= 250/300 GHz, with 3.3 V I/O CMOS and
1.2 V logic CMOS.• SG13G2:• A 0.13 µm BiCMOS technologies with same device portfolio as SG13S but much higher bipolar performance with
fT/fmax = 300/500 GHz• The backend offers 3 (SG13: 5) thin and 2 thick metal layers (TM1: 2 µm, TM2: 3 µm). • The following Modules are available• GD:• Additional integrated complementary RF LDMOS devices with nLDMOS up to 22 V, pLDMOS up to -16 V
breakdown voltage and an • isolated nLDMOS device. (available in SGB25V)• H3P:• Additional pnp-HBTs with fT/fmax = 90/120 GHz for complementary bipolar applications. (available in SG25H3)• RF-MEMS switch:• Additional capacitive MEMS switch devices for frequencies between 30 GHz to 100 GHz. (available in SG25H1
and SG25H3 technology) • LBE:• The Localized Backside Etching module is offered to remove silicon locally to improve passive performance.
(available in all technologies)
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SiGe Meeting, Geneva
PET
S IP M s
R eadou t ch ip
F P G A
U S B C h ipSupply vo ltages
U S B C ab le
P C B 1
P C B 2
P C B 3
P C B 4
SIP M signa ls
D ig ita l output signa ls – tim e & energy Contro l
B ias vo ltages
D ig ita l output signa ls
S c in tilla to rs
• PET – Detector for PET/MR
n10-8s
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Signal
• Signal
I ~ nPh1,2
Ph3,4
Ph4
Ph_n
Schwelle
1mV~10ns
~100ps
SiGe Meeting, Geneva 18
Readout channel
• Readout channel
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
Threshold Hit
Start Stop
Input
Comparator
Integrator
Start ADC
Fine/Coarse TSDO(TS)
Comp-
S
R
CNT DAC
DAC
CTSn
CTS2
CTS1
CTS0
FTS3
FTS2
FTS1
RCk
Ck
CCk
DO(I)
RCk
Hit
ClearHit
+
GTh Ld Ld
ConfInComparator Hit Logic Integrator TS Latch CMOS DACs
FTS0FTS0
FTS1
FTS0
FTS1
FTS0
FTS2
FTS1
FTS0
FTS2
FTS3
FTS1
FTS0
FTS2
FTS3
CTS0
CTSn
CTS2
CTS1
CTS0
FTS3
FTS2
FTS1
FTS0
345
CompComp
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
IThn
ITh2
ITh1
ITh0
CThn
CTh0
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TC5 A5A4A3A2A1
TC4TC3
ThN
ThP
TC2TC1
(B) CM FB
(A) Diff. FB
(C) Preamplifier
AC (D) DCL buffer
DCL
VCM
VCM
In
Out
Trans-conductor (TCi)
2IFB
2I0Itune Itune
Amplifier stage (Ai)M2 M2*
Amplifier
SiGe Meeting, Geneva 20
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
Threshold Hit
Start Stop
Input
Comparator
Integrator
Start ADC
Fine/Coarse TSDO(TS)
Comp-
S
R
PIn
Ld
SIn
SOutCkPInQ
CNT
SIn
SOutCk
Q
DAC
DAC
Ld
CTSn
CTS2
CTS1
CTS0
FTS3
FTS2
FTS1
RCk
Ck
CCk
DO(I)
RCk
Hit
ClearHit
+
GTh Ld Ld
ConfInComparator Hit Logic Integrator TS Latch CMOS DACs
FTS0FTS0
FTS1
FTS0
FTS1
FTS0
FTS2
FTS1
FTS0
FTS2
FTS3
FTS1
FTS0
FTS2
FTS3
CTS0
CTSn
CTS2
CTS1
CTS0
FTS3
FTS2
FTS1
FTS0
345
CompComp
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
IR0
IR1
IR2
IRn
TSR2
TSR1
TSR0
IThn
ITh2
ITh1
ITh0
CThn
CTh0
Readout