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Signal Intelligence and Software Defined Signal Intelligence and Software-Defined Radio with COTS Technologies g
Sacha Emery Sacha Emery ATE Systems Engineer
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AgendaAgenda• Introduction• Introduction
• Optimised signal processing with multicore and FPGAsp g p g
• Timing and synchronisation
• Hardware platform for Signal Intelligence
• User Solutions
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Introduction
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What is EW?What is EW?Electronic Warfare
S ill• Surveillance• Threat targeting• Jamming• Deception• Active Cancellation• EMP• ….“Electronic Warfare (EW) is the struggle for control of the Electronic Warfare (EW) is the struggle for control of the
electromagnetic spectrum” - AOC
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Signal IntelligenceSignal IntelligenceSIGINT = COMINT + ELINT + MASINTSIGINT COMINT ELINT MASINT
COMINT (COMmunications INTelligence)( g )• Interception of communications between people or machines
ELINT (ELectronics INTelligence)( g )• Detection and analysis of non-communications electronic transmissions• Electronic Warfare: radiation from electronic systems; jamming radiation
MASINT (Measurement And Signatures INTelligence)• Scientific and technical intelligence obtained by quantitative and qualitative analysis of
data (metric angle spatial wavelength time dependence modulation plasma and data (metric, angle, spatial, wavelength, time dependence, modulation, plasma and hydromagnetic)
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Overview of a SIGINT System
AntennaRF Front-End IF Digitising Baseband
Signal Processing
Disk Storage
Signal Processing
Vector Signal AnalyzerAmplifier Bandpass Filter
(optional)
FPGA In-line Processing
Transceiver
LNAOR
User Interface
Host CPU Processing
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SIGINT System Requirementsy q• Performance
• Fast Spectrum Sweep• Real‐time demodulation• High System Bandwidth
Wid B d idth & Hi h D i R di iti• Wide Bandwidth & High Dynamic Range digitizers• Ability to Stream to Disk for Long Periods of Time
• FlexibilityFlexibility• Programmable User Interface• Ability to Add User‐defined Demodulation• Alarming, Trending & Reporting
• System• COTS• COTS• Derived from Industry Standards• Small Size & Low Power
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Small Size & Low Power
Benefiting from COTS Technologyg gy
Application Areas
SIGINT Receiver SIGINT Payload Generation for Test
Application Areas
GPS SynchronisationNavigation Data
Signal Processing
Data Bus, Timing, Synchronisation
Navigation Data
RF front-end, Digitising
Multifunctional Radar Systems for Fighter Aircraft
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Comparing Build and COTS Virtual p gInstrumentation
Build COTS Virtual InstrumentationBuild COTS Virtual InstrumentationIs the required knowledge to implement design available?
Is modular hardware available?
Fixed solution design Increased test system flexibility
Rigid state of the art architecture today
Higher-performance architectures
Burden to verify the behaviour of the built system
Lower test system investments
S i f l t I d t t t l itSourcing of replacement components requires managing
Increased test system longevity
Modular design requires high investment
Easier to manage obsolescenceinvestment
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Overview of a SIGINT System
AntennaRF Front-End IF Digitising Baseband
Signal Processing
Disk Storage
Signal Processing
Vector Signal AnalyzerAmplifier Bandpass Filter
(optional)
FPGA In-line Processing
Transceiver
LNAOR
User Interface
Host CPU Processing
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RF Signal Path for RF Signal Path for Signal Intelligence
www.ni.com/modularinstruments/
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NI RF Hardware ProductsRF Hardware• 1.3 to 6.6 GHz Vector Signal Analyzer
RF and Communications Software• Spectrum Measurements Toolkit
Modulation Toolkit• 1.3 to 6.6 GHz Vector Signal Generator• 6.6 GHz CW Generator• 8.0 GHz Amplifier 0.5 dB gain resolution
• Modulation Toolkit• GPS Toolkit for LabVIEW
• 8.0 GHz Attenuator 0.5 dB att. resolution• 3.0 GHz Pre-Amp• 6 GHz True-RMS Power Meter• Up to 26.5 GHz, mux, GP relays
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6.6 GHz RF SuitePXIe-5663E VSA• 10 MHz to 6.6 GHz
PXIe-5673E VSG• 85 MHz to 6.6 GHz
• Bandwidth 50 MHz (3dB)• <-158 dBm/Hz typical noise floor at 1 GHz• Single stage heterodyne downconverter
• Modulation bandwidth (3dB) >100 MHz• -112 dBc/Hz phase noise at 10 kHz (1 GHz)• Direct (homodyne) RF upconversiong g y ( y ) p
• RF List ModeRF List ModeFrequency Settling Time:
450us (PXIe-5663E)400us (PXIe-5673E)
Amplitude Settling Time 50us (PXIe-5663E)
• MIMO system up to 4 RF coherent channels• Record and Playback
http://www.ni.com/automatedtest/mimo.htm
• capabilities
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NI PXIe-5665: 3.6 GHz Signal/Spectrum AnalyzerS k d k i i i RF fSurpasses rack-and-stack instrumentation in RF performance
• SpecificationsSpecifications– Freq Range: 20 Hz to 3.6 GHz– Analysis BW: 25/50 MHz with DDC– Noise Floor : < -154 dBm/Hz (<-165 dBm/Hz)– IP3: > +24 dBm (700 MHz to 3.6 GHz)
– Phase Noise: -129 dBc/Hz (800 MHz at 10 kHz offset)( )
– Form Factor: PXI Express (x4), 5 slots
• FeaturesFeatures– RF List Mode– Multichannel receiver architecture– High-speed data streaming and P2P
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Four-Channel Phase-Coherent AcquisitionLocal Oscillator Downconverters
q
Sh d LOShared LO
Shared ADC Shared ADC Clock
Digitisers
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Digitisers
Direction Finding with Phase-Coherenceg
• Three or more receive antennasThree or more receive antennas• Unique propagation delay to each receiver• Direction can be calculated through phase difference• Direction can be calculated through phase difference
Rx0
Tx
Rx1
Rx2Tx Rx2
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Triangulation – NI User Solution g
PXI 6682 S h i ti M d l• PXI-6682 Synchronization ModuleGPS synchronization (accuracy of 15 ns to signal) ns to signal) Future time events, clocks, and timestampingtimestamping
• PXI-5661 Vector Signal Analyzer20 MH V t Si l A l 20 MHz Vector Signal Analyzer
• PXI chassis and controller• PXI-8250 System Monitor
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Overview of a SIGINT System
AntennaRF Front-End IF Digitising Baseband
Signal Processing
Disk Storage
Signal Processing
Vector Signal AnalyzerAmplifier Bandpass Filter
(optional)
FPGA In-line Processing
Transceiver
LNAOR
User Interface
Host CPU Processing
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Data Processing forData Processing forSignal Intelligence
zone.ni.com/wv/app/doc/p/id/wv-2512 /
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Traditional Data Transfer ModelTraditional Data Transfer Model(device to/from memory & CPU)
In Oput (e.g. Digit
StreamStor
Host ProcessHost Process
utput (e.g. Arbtizer or RAID)
singsing
bor RAID)
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FPGA + Multicore Processingg
LabVIEW for LabVIEW for Windows/Linux/RTOS LabVIEW FPGA
•User Interface•In-line processing•Real-time response
•Host DSP on Multicore processor
•Real-time response
Stimulus/Generation Modules
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Modules
FPGA Processing with NI FlexRIO
• Xilinx Virtex 5 SXT series FPGAs• Xilinx Virtex-5 SXT-series FPGAs• Direct access to FPGA GPIO• Use with adapter module for I/O• Peer-to-peer streaming
800 MB/ PXI E b k l• 800 MB/s across PXI Express backplane• 16 simultaneous streams
• Onboard DRAM• 2x 256 MB banks
1 6 GB/ b k• 1.6 GB/s per bank• Enhanced Synchronisation
• Share PXI 10 MHz reference clock or DSTAR_A with adapter modulehttp://zone.ni.com/devzone/cda/tut/p/id/4799
http://sine ni com/nips/cds/view/p/lang/it/nid/208164
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http://sine.ni.com/nips/cds/view/p/lang/it/nid/208164
Peer-to-Peer Example:Peer to Peer Example:Process Input Data, fetch results
InpLV put (e.g. Digit
V FPGA Data
Host Control izer)
Processing
& Results
Low to medium BW High BW
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Peer-to-Peer Example:Peer to Peer Example:Daisy-chained processing
Input
Processing
Processing
Processing
Processing
Host Computter
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A Hi hl P d i D l E i f E iA Highly Productive Development Environment for Engineers
Analysis LibrariesHardware APIs Custom User Interfaces
Programming ApproachesDeployment Targets Technology Abstractions
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Programming ApproachesDeployment Targets Technology Abstractions
SIGINT Processing with LabVIEWg• In-band power, adjacent-channel power, burst timing, BER,
EVM, MER, ρ, and more• Advanced RF, spectral measurement, and modulation softwareAdvanced RF, spectral measurement, and modulation software• Custom modulation formats and channel coding and
impairments• Wavelet and filter-bank design for short-duration signal
characterisation, noise reduction, and detrendingTi f l i l ti l hi l t l f i l • Time-frequency analysis -- analytical, graphical tools for signals with evolving frequency content
• Digital Filter Design• Time-series analysis -- statistical analysis for description,
explanation, prediction, and control• Sound and Vibration
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Communications System in LabVIEWCommunications System in LabVIEWTransmitter
Communications Channel
Receiver
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SIGINT Systems with Virtual InstrumentationSIGINT Systems with Virtual InstrumentationSIGINT Receiver
GPSRF
GPS Synchronization Navigation
LabVIEW FPGA
GPS Synchronization Navigation Data
• 10 MHz to 6.6 GHz• RF list mode
Data Bus Timing & Synchronization
Signal Processing
• RF list mode• GPS synchronisation• In-line signal processing (SDR)• Data streaming up to 600MB/s• Customer defined HMI
RF front-end, Digitizing
HMIRecord & Playback
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High-Speed Data Streaming g Speed ata St ea gSpectrum Monitoring - Huari Telecom
• Identification of interference signals within a particular signals within a particular bandwidth of interest
• Continuously acquire y qwaveforms for long periods of time
• 20 MHz of RF bandwidth for 5+ hours
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Test & Measurement System for SIGINT Payload wa
reSo
ftw
are
RF In RF OutIF In RF Multiplexer
Hard
w
Record & Playback
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RF Data Streaming & PlaybackRF Data Streaming & Playback
NTS Technology• PXI & LabVIEW based• Uses Conduant Streamstore• Real-time recording (20MHz Bandwidth)• Post processed in the lab• Real-time playback capability
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SummarySummary• Commercial Off The Shelf platforms are a viable Commercial Off The Shelf platforms are a viable
solution in an ever increasingly complex arena of signal intelligencesignal intelligence.
• The embedded use of FPGAs into the signal stream to allow real-time processing and response is a key factor.response is a key factor.
• The tool chain needs to be maintainable and t l hil t b i d bl f th easy to learn whilst being expandable for the
future.
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Digital Radar Timing Generator for the Advanced Hawkeye Program – LMCO
Challenge: Produce a digital radar timing Challenge: Produce a digital radar timing generator having multiple synchronisedpulse outputs of various pulse widths and delays, having 25 ns accuracy, and to be adj stable on the fladjustable on the fly.
Result: “We chose to use the configurable FPGA module Using LabVIEW code for FPGA module. Using LabVIEW code for the I/O and control combined with our own VHDL code we were able to achieve long repetition cycles of complex pulse groups. The timing generator is used in conjunction The timing generator is used in conjunction with a rack full of RF test equipmentcontrolled by LabVIEW for testing radar systems. In addition we use the FPGA to make simulators and emulators for various
Products: LabVIEW, LabVIEW FPGA, RF hardwaremake simulators and emulators for various
serial protocols including standard UARTS, packet communications, I2C and SPI.
hardware
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Thank You!Thank You!For more information please visitFor more information, please visitwww.ni.com/aerospace-defense
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