tca9509 level-translating i c and smbus bus · pdf filev cca v ccb 10 k w 3.3 v slave 400 khz...

BUS A

TCA9509

SDA SDAA SDA

SCL SCLA SCL

EN

BUS B

1.1 V

SDAB

SCLB

VCCB

VCCA

10 kW

3.3 V

SLAVE

400 kHz

BUS

MASTER

400 kHz

10 kW10 kW

1.1 V

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

TCA9509SCPS225C –AUGUST 2011–REVISED DECEMBER 2017

TCA9509 Level-Translating I2C and SMBUS Bus Repeater

1

1 Features1• Two-Channel Bidirectional Buffer• I2C Bus and SMBus Compatible• Operating Supply Voltage Range of

2.7 V to 5.5 V on B side• Operating Voltage Range of 0.9 V to 5.5 V on

A-Side• Voltage-Level Translation From

0.9 V to 5.5 V and 2.7 V to 5.5 V• Active-High Repeater-Enable Input• Requires No External Pullup Resistors on

Lower-Voltage Port-A• Open-Drain I2C I/O• 5.5-V Tolerant I2C and Enable Input Support

Mixed-Mode Signal Operation• Lockup-Free Operation• Accommodates Standard Mode and Fast Mode

I2C Devices and Multiple Masters• Supports Arbitration and Clock Stretching Across

Repeater• Powered-Off High-Impedance I2C Bus Pins• Supports 400-kHz Fast I2C Bus Operating Speeds• Available in

– 1.6-mm × 1.6-mm, 0.4-mm height, 0.5-mmPitch QFN Package

– 3-mm × 3-mm Industry Standard MSOPPackage

• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II

• ESD Protection Exceeds JESD 22– 2000-V Human-Body Model (A114-A)– 1000-V Charged-Device Model (C101)

2 Applications• Servers• Routers (Telecom Switching Equipment)• Industrial Equipment• Products with many I2C slaves and/or long PCB

Traces

3 DescriptionThis TCA9509 integrated circuit is an I2C bus/SMBusRepeater for use in I2C/SMBus systems. It can alsoprovide bidirectional voltage-level translation (up-translation/down-translation) between low voltages(down to 0.9 V) and higher voltages (2.7 V to 5.5 V)in mixed-mode applications. This device enables I2Cand similar bus systems to be extended, withoutdegradation of performance even during level shifting.

The TCA9509 buffers both the serial data (SDA) andthe serial clock (SCL) signals on the I2C bus, thusallowing 400-pF bus capacitance on the B-side. Thisdevice can also be used to isolate two halves of abus for voltage and capacitance.

The TCA9509 has two types of drivers – A-sidedrivers and B-side drivers. All inputs and B-side I/Osare overvoltage tolerant to 5.5 V. The A-side I/Os areovervoltage tolerant to 5.5 V when the device isunpowered (VCCB and/or VCCA = 0 V).

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

TCA9509VSSOP (8) 3.00 mm × 3.00 mmX2QFN (8) 1.60 mm × 1.60 mm

(1) For all available packages, see the orderable addendum atthe end of the data sheet.

Simplified Schematic

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TCA9509SCPS225C –AUGUST 2011–REVISED DECEMBER 2017 www.ti.com

Product Folder Links: TCA9509

Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated

Table of Contents1 Features .................................................................. 12 Applications ........................................................... 13 Description ............................................................. 14 Revision History..................................................... 25 Description (continued)......................................... 36 Pin Configuration or Functions............................ 37 Specifications......................................................... 4

7.1 Absolute Maximum Ratings ...................................... 47.2 ESD Ratings.............................................................. 47.3 Recommended Operating Conditions ...................... 47.4 Thermal Information .................................................. 57.5 Electrical Characteristics.......................................... 57.6 Timing Requirements ................................................ 57.7 I2C Interface Timing Requirements.......................... 6

8 Parameter Measurement Information .................. 79 Detailed Description .............................................. 8

9.1 Overview ................................................................... 8

9.2 Functional Block Diagram ......................................... 89.3 Feature Description................................................... 99.4 Device Functional Modes.......................................... 9

10 Application and Implementation........................ 1010.1 Application Information.......................................... 1010.2 Typical Application ............................................... 10

11 Power Supply Recommendations ..................... 1312 Layout................................................................... 14

12.1 Layout Guidelines ................................................. 1412.2 Layout Example .................................................... 14

13 Device and Documentation Support ................. 1513.1 Receiving Notification of Documentation Updates 1513.2 Community Resources.......................................... 1513.3 Trademarks ........................................................... 1513.4 Electrostatic Discharge Caution............................ 1513.5 Glossary ................................................................ 15

14 Mechanical, Packaging, and OrderableInformation ........................................................... 15

4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (January 2012) to Revision C Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementationsection, Power Supply Recommendations section, Layout section, Device and Documentation Support section, andMechanical, Packaging, and Orderable Information section. ................................................................................................. 1

• Added junction temperature to the Absolute Maximum Ratings ............................................................................................ 4• Changed thermal information for RVH and DGK packages .................................................................................................. 5• Changed VILC, added Test Conditions with new MIN and TYP values in the Electrical Characteristics table ....................... 5• Updated Bus A (0.9-V to 5.5-V Bus) Waveform..................................................................................................................... 6• Updated Bus B (2.7-V to 5.5-V Bus) Waveform..................................................................................................................... 6

Changes from Revision A (October 2011) to Revision B Page

• Added DGK package and package information to datasheet. .............................................................................................. 1

Changes from Original (August 2011) to Revision A Page

• Corrected VCCA operating voltage lower limit, to 0.9V at multiple instances in document. .................................................... 1• Changed Operating Supply Voltage Range value error in FEATURES for B side. Changed from (0.9 V to 5.5 V on B

side) to (2.7 V to 5.5 V on B side). ......................................................................................................................................... 1• Changed Operating Voltage Range value error in FEATURES for A side. Changed (2.7 V to VCCB – 1 V on A side)

to (0.9 V to VCCB – 1 V on A side)........................................................................................................................................... 1


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3

2

5

6

6

481

3

2

5

6

7

481V

CCA

SCLA

SDAA

SCLB

SDAB

GN

DV

CC

B

EN

TCA9509

1 8VCCA

VCCB

4 5GND EN

3 6SDAA SDAB

2 7SCLA SCLB

3

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5 Description (continued)The bus port B drivers are compliant with SMBus I/O levels, while the A-side uses a current sensing mechanismto detect the input or output LOW signal which prevents bus lock-up. The A-side uses a 1 mA current source forpull-up and a 200 Ω pull-down driver. This results in a LOW on the A-side accommodating smaller voltageswings. The output pull-down on the A-side internal buffer LOW is set for approximately 0.2 V, while the inputthreshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When the A-sideI/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up conditionfrom occurring. The output pull-down on the B-side drives a hard LOW and the input level is set at 0.3 of SMBusor I2C-bus voltage level which enables B side to connect to any other I2C-bus devices or buffer.

The TCA9509 drivers are not enabled unless VCCA is above 0.8 V and VCCB is above 2.5 V. The enable (EN) pincan also be used to turn the drivers on and off under system control. Caution should be observed to only changethe state of the EN pin when the bus is idle.

6 Pin Configuration or Functions

RVH Package8-Pin X2QFN

Top ViewDGK Package8-Pin VSSOP

Top View

Pin FunctionsPIN

I/O DESCRIPTIONNAME NO.VCCA 1 Supply A-side supply voltage (0.9 V to 5.5 V)SCLA 2 I/O Serial clock bus, A side.SDAA 3 I/O Serial data bus, A side.GND 4 Supply Supply groundEN 5 Input Active-high repeater enable input

SDAB 6 I/O Serial data bus, B side. Connect to VCCB through a pull-up resistor.SCLB 7 I/O Serial clock bus, B side. Connect to VCCB through a pull-up resistor.VCCB 8 Supply B-side and device supply voltage (2.7 V to 5.5 V)

ThermalAttach Pad - - Thermal Attach Pad is not electrically connected and it is recommended to be attached to

GND for best thermal performance. This is for the RVH package only.


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4




(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

7 Specifications

7.1 Absolute Maximum Ratingsover operating free-air temperature range (unless otherwise noted) (1)

MIN MAX UNITVCCB Supply voltage –0.5 6 VVCCA Supply voltage –0.5 6 VVI Enable input voltage (2) –0.5 6 VVI/O I2C bus voltage (2) –0.5 6 VIIK Input clamp current VI < 0 –20

mAIOK Output clamp current VO < 0 –20Pd Max power dissipation 100 mWTJ Junction temperature 125 °CTstg Storage temperature –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD RatingsVALUE UNIT

V(ESD)Electrostaticdischarge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000V

Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000

(1) Low-level supply voltage

7.3 Recommended Operating ConditionsMIN MAX UNIT

VCCA Supply voltage, A-side bus 0.9 (1) 5.5 VVCCB Supply voltage, B-side bus 2.7 5.5 V

VIH High-level input voltageSDAA, SCLA 0.7 × VCCA VCCA

VSDAB, SCLB 0.7 × VCCB 5.5EN 0.7 × VCCA 5.5

VIL Low-level input voltageSDAA, SCLA –0.5 0.3

VSDAB, SCLB –0.5 0.3 × VCCB

EN –0.5 0.3 × VCCA

IOL Low-level output currentSDAA, SCLA 10 µASDAB, SCLB 6 mA

TA Operating free-air temperature –40 85 °C


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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics applicationreport.

(2) The package thermal impedance is calculated in accordance with JESD 51-7.

7.4 Thermal Information

THERMAL METRIC (1)TCA9509

UNITRVH (X2QFN) DGK (VSSOP)8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance (2) 160.3 222.9 °C/WRθJC(top) Junction-to-case (top) thermal resistance 66.4 109.5 °C/WRθJB Junction-to-board thermal resistance 115.9 144.5 °C/WψJT Junction-to-top characterization parameter 0.8 34.5 °C/WψJB Junction-to-board characterization parameter 116.2 142.7 °C/WRθJC(bot) Junction-to-case (bottom) thermal resistance 80.5 n/a °C/W

7.5 Electrical CharacteristicsVCCB = 2.7 V to 5.5 V, VCCA = 0.9 V to (VCCB-1), TA = –40°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VIK Input clamp voltage II = –18 mA –1.5 –0.5 V

VOL Low-level output voltage

SDAA, SCLAIOL = 10 μA,VILA = VILB = 0 V,VCCA = 0.9 to 1.2 V

0.18 0.25

V

SDAA, SCLAIOL = 20 μA,VILA = VILB = 0 V,1.2V < VCCA ≤ (VCCB – 1 V)

0.2 0.3

VOL – VILcLow-level input voltage belowlow-level output voltage SDAA, SCLA 50 mV

VILcSDA and SCL low-level inputvoltage contention SDAA, SCLA

VCCA ≥ 1.5 V and VCCB ≥ 3.15 V 110 150mV

VCCA < 1.5 V or VCCB < 3.15 V 50 100

VOLB Low-level output voltage SDAB, SCLB IOL = 6 mA 0.1 0.2 V

ICC Quiescent supply current for VCCAAll port A Static high 0.25 0.45 0.9

mAAll port A Static low 1.25

ICC Quiescent supply current for VCCB All port B Static high 0.5 0.9 1.1 mA

II Input leakage current

SDAB, SCLBVI = VCCB ±1

μA

VI = 0.2 V 10

SDAA, SCLAVI = VCCA ±1

VI = 0.2 V 10

ENVI = VCCB ±1

VI = 0.2 V –10

IOHHigh-level output leakagecurrent

SDAB, SCLBVO = 3.6 V

10μA

SDAA, SCLA 10

CIOA I/O capacitance of A-side SCLA, SDAA VI = 0 V 6.5 7 pF

CIOB I/O capacitance of B-side SCLB, SDAB VI = 0 V 5.5 6.2 pF

(1) EN should change state only when the global bus and the repeater port are in an idle state.

7.6 Timing Requirementsover recommended operating free-air temperature range (unless otherwise noted)

MIN MAX UNITtsu Setup time, EN high before Start condition (1) 100 nsth Hold time, EN high after Stop condition (1) 100 ns


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9th CLOCK PULSE — ACKNOWLEDGE 2 V/DIV

SCL

SDA

9th CLOCK PULSE — ACKNOWLEDGE 0.5 V/DIV

SCL

SDA

V OF TCA9509OL

V OF MASTEROL

6




(1) Typical values were measured with VCCA = VCCB = 2.7 V at TA = 25°C, unless otherwise noted.

7.7 I2C Interface Timing RequirementsTA = –40°C to 85°C (unless otherwise noted)

PARAMETER VCCA(INPUT)

VCCB(OUTPUT) TEST CONDITIONS MIN TYP (1) MAX UNIT

tPHL Propagation delayport A to port B

1.9 V 5 V EN High123.1 127.2 132.8

nsport B to port A 88.1 88.8 89.8

tPLH Propagation delayport A to port B

1.9 V 5 V EN High122.6 125.7 131.7

nsport B to port A 123 124.1 126.9

trise Transition timeport A

1.9 V 5 V EN High40.1 40.9 41.9

nsport B 57.3 57.5 58.4

tfall Transition timeport A

1.9 V 5 V EN High14.5 16.4 17.9

nsport B 18.7 19.4 20.2

tPLH2

Propagation delay50% of initial lowon Port A to 1.5 Von Port B

port A to port B 1.9 V 5 V 176 177.3 178 ns

fMAX

Maximumswitchingfrequency

400 KHz

Figure 1. Bus A (0.9-V to 5.5-V Bus) Waveform

Figure 2. Bus B (2.7-V to 5.5-V Bus) Waveform


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50% 50%

VCC

0 V

Input

30%30%

70%70%VCC

tf tr

VOL

Output

VCCOVCCI

DUT

Input

OUTIN

CL1 MW

1.35 kW

7




8 Parameter Measurement Information

PIN CL

SCLA, SDAA (A-side) 50 pFSDAB, SCLB (B-side) 50 pF

A. RT termination resistance should be equal to ZOUT of pulse generators.B. CL includes probe and jig capacitance.C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate

≥ 1 V/ns.D. The outputs are measured one at a time, with one transition per measurement.E. tPLH and tPHL are the same as tpd.

Figure 3. Test Circuit and Voltage Waveforms


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SDAB

SCLBSCLA

SDAA

EN

VCCA

1 mA

GND

1 8

VCCA

VCCB

4

3

2

5

6

7

VCCA

1 mA

VCCA

1 mA


8




9 Detailed Description

9.1 OverviewThis TCA9509 integrated circuit is an I2C bus/SMBus Repeater for use in I2C/SMBus systems. It can also providebidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9 V) andhigher voltages (2.7 V to 5.5 V) in mixed-mode applications. This device enables I2C and similar bus systems tobe extended, without degradation of performance even during level shifting.

The TCA9509 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing400-pF bus capacitance on the B-side. This device can also be used to isolate two halves of a bus for voltageand capacitance.

The TCA9509 has two types of drivers – A-side drivers and B-side drivers. All inputs and B-side I/O’s areovervoltage tolerant to 5.5V. The A-side I/O’s are overvoltage tolerant to 5.5 V when the device is unpowered(VCCB and/or VCCA = 0V).

9.2 Functional Block Diagram


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9




9.3 Feature Description

9.3.1 Two-Channel Bidirectional BufferThe TCA9509 is a two-channel bidirectional buffer with level-shifting capabilities, featuring an integrated currentsource on the A-side.

9.3.2 Integrated A-Side Current SourceThe A-side ports of the TCA9509 feature an integrated 1 mA current source, eliminating the need for externalpull-up resistors on SDAA and SCLA.

9.3.3 Standard Mode and Fast Mode SupportThe TCA9509 supports standard mode as well as fast mode I2C. The maximum system operating frequency willdepend on system design and delays added by the repeater.

9.4 Device Functional ModesTable 1 lists the functional modes for the TCA9509.

Table 1. Function TableINPUT

EN FUNCTION

L Outputs disabled

H SDAA = SDABSCLA = SCLB


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BUSMASTER400 kHz

SDA

SCL

1.2 V

5 k 5 k

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA9509

SDA

SCL

SLAVE400 kHz

3.3 V


10




10 Application and Implementation

NOTEInformation in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TI’s customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.

10.1 Application InformationThe TCA9509 is 5-V tolerant, so it does not require any additional circuitry to translate between 0.9-V to 5.5-Vbus voltages and 2.7-V to 5.5-V bus voltages.

When the B-side of the TCA9509 is pulled low by a driver on the I2C bus and the falling edge goes below 0.3VCCB, it causes the internal driver on the A-side to turn on, causing the A-side to pull down to about 0.2 V (VOL).When the A-side of the TCA9509 falls, a comparator detects the falling edge and causes the internal driver onthe B-side to turn on and pull the B-side pin down to ground. In order to illustrate what would be seen in a typicalapplication, refer to Figure 1. If the bus master in Figure 4 were to write to the slave through the TCA9509,waveforms shown in Figure 2 would be observed on the B bus. This looks like a normal I2C bus transmission,except that the high level may be as low as 0.9 V, and the turn on and turn off of the acknowledge signals areslightly delayed.

On the A-side bus of the TCA9509, the clock and data lines would have a positive offset from ground equal tothe VOL of the TCA9509. After the eighth clock pulse, the data line is pulled to the VOL of the master device,which is close to ground in this example. At the end of the acknowledge, the level rises only to the low level setby the driver in the TCA9509 for a short delay, while the B-bus side rises above 0.3 VCCB and then continueshigh. It is important to note that any arbitration or clock stretching events require that the low level on the A-busside at the input of the TCA9509 (VIL) be at or below VILC to be recognized by the TCA9509 and then transmittedto the B-bus side.

10.2 Typical Application

Figure 4. Typical Application, A-side Connected to Master

10.2.1 Design RequirementsA typical application is shown in Figure 4. In this example, the system master is running on a 1.2-V I2C bus,and the slave is connected to a 3.3-V bus. Both buses run at 400 kHz. Master devices can be placed oneither bus. For the level translating application, the following should be true: VCCA ≤ (VCCB – 1 V)

• VCCA = 0.9 V to 5.5 V• VCCB = 2.7 to 5.5 V• A-side ports must not be connected together• Pullup resistors should not be placed on the A-side ports


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BUSMASTER400 kHz

SDA

SCL

3.3 V

5 k 5 k

EN

SDAB

SCLB

SDAA

SCLA

VCCB VCCA

TCA9509

SDA

SCL

SLAVE400 kHz

1.8 V

EN

SDAB

SCLB

SDAA

SCLA

VCCB VCCA

TCA9509

SDA

SCL

SLAVE400 kHz

3.3 V

BUS B

BUS A BUS CCopyright © 2017, Texas Instruments Incorporated

1.65 V

11




Typical Application (continued)10.2.2 Detailed Design Procedure

10.2.2.1 Clock Stretching SupportThe TCA9509 can support clock stretching, but care needs to be taken to minimize the overshoot voltagepresented during the hand-off between the slave and master. This is best done by increasing the pull-up resistorvalue on B-side ports.

10.2.2.2 VILC and Pulldown Strength RequirementsFor the TCA9509 to function correctly, all devices on the A-side must be able to pull the A-side below the voltageinput low contention level (VILC). This means that the VOL of any device on the A-side must be below VILC min.

The VOL can be adjusted by changing the IOLthrough the device which is set by the pull-up resistance value. Thepull-up resistance on the A-side must be carefully selected to ensure that the logic levels will be transferredcorrectly to the B-side.

Figure 5. Typical Star Application

Multiple B-sides of TCA9509 s can be connected in a star configuration, allowing all nodes to communicate witheach other. The A-sides should not be connected together when used in a star/parallel configuration.


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BUSMASTER400 kHz

SDA

SCL

1.65 V

5 k 5 k

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA9509

SDA

SCL

SLAVE400 kHz

3.3 V

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA9509

5.0 V

BUS A BUS B BUS CCopyright © 2017, Texas Instruments Incorporated

BUSMASTER400 kHz

SDA

SCL

1.2 V

5 k 5 k

EN

SDAA

SCLA

SDAB

SCLB

VCCA VCCB

TCA9509

SDA

SCL

SLAVE400 kHz

3.3 V

EN

SDAB

SCLB

SDAA

SCLA

VCCB VCCA

TCA9509

1.65 V

BUS A BUS B BUS CCopyright © 2017, Texas Instruments Incorporated

12




Typical Application (continued)

Figure 6. Typical Series Application, Two B-Sides Connected Together

Figure 7. Typical Series Application, A-side Connected to B-Side

To further extend the I2C bus for long traces/cables, multiple TCA9509 devices can be connected in series aslong as the A-side is connected to the B-side and VCCA ≤ (VCCB – 1 V) must also be met. Series connections canalso be made by connecting both B-sides together while following power supply rule VCCA ≤ (VCCB – 1 V). I2C busslave devices can be connected to any of the bus segments. The number of devices that can be connected inseries is limited by repeater delay/time-of-flight considerations on the maximum bus speed requirements.


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11 Power Supply RecommendationsVCCB and VCCA can be applied in any sequence at power up. The TCA9509 includes a power-up circuit thatkeeps the output drivers turned off until VCCB is above 2.5 V and the VCCA is above 0.8 V. After power up andwith the EN high, a low level on the B-side (below 0.3 × VCCB) turns the corresponding A-side driver (either SDAor SCL) on and drives the A-side down to approximately 0.2 V. When the B-side rises above 0.3 × VCCB, the A-side pull-down driver is turned off and the external pull-up resistor pulls the pin high. When the A-side falls firstand goes below 0.3 × VCCA, the B-side driver is turned on and the B-side pulls down to 0 V. The A-side pull-downis not enabled unless the A-side voltage goes below 0.4 V. If the A-side low voltage does not go below 0.5 V, theB-side driver turns off when the A-side voltage is above 0.7 × VCCA. If the A-side low voltage goes below 0.4 V,the A-side pull-down driver is enabled, and the A-side is able to rise to only 0.5 V until the B-side rises above 0.3× VCCB.

A 100nF a decoupling capacitor should be placed as close to the VCCA and VCCB pins in order to provide properfiltering of supply noise.


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To VCCB Plane

0402

Cap

To VCCA Plane

SCLB

SDAB

EN

VCCB

SCLA

SDAA

GND

VCCA

0402

Cap

= Via to GND Plane

14




12 Layout

12.1 Layout GuidelinesThere are no special layout procedures required for the TCA9509.It is recommended that the decoupling capacitors be placed as close to the VCC pins as possible.

12.2 Layout Example

Figure 8. Example Layout


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13 Device and Documentation Support

13.1 Receiving Notification of Documentation UpdatesTo receive notification of documentation updates, navigate to the device product folder on ti.com. In the upperright corner, click on Alert me to register and receive a weekly digest of any product information that haschanged. For change details, review the revision history included in any revised document.

13.2 Community ResourcesThe following links connect to TI community resources. Linked contents are provided "AS IS" by the respectivecontributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms ofUse.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaborationamong engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and helpsolve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools andcontact information for technical support.

13.3 TrademarksE2E is a trademark of Texas Instruments.All other trademarks are the property of their respective owners.

13.4 Electrostatic Discharge CautionThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

13.5 GlossarySLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable InformationThe following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.


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PACKAGE OPTION ADDENDUM

www.ti.com 24-May-2017

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

TCA9509DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 (7KO ~ 7KQ)

TCA9509RVHR ACTIVE X2QFN RVH 8 5000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 7K

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

http://www.ti.com/product/TCA9509?CMP=conv-poasamples#samplebuy

http://www.ti.com/product/TCA9509?CMP=conv-poasamples#samplebuy

PACKAGE OPTION ADDENDUM

www.ti.com 24-May-2017

Addendum-Page 2

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

TCA9509DGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

TCA9509RVHR X2QFN RVH 8 5000 180.0 8.4 1.8 1.8 0.5 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TCA9509DGKR VSSOP DGK 8 2500 364.0 364.0 27.0

TCA9509RVHR X2QFN RVH 8 5000 202.0 201.0 28.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 2

http://www.ti.com/lit/slua271

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