technology computer aided design (tcad) laboratoryrudan/materiale_didattico/diapositive/… ·...

1 G. Betti Beneventi

Technology Computer Aided

Design (TCAD) Laboratory

Lecture 6, Metal-Oxide-

Semiconductor Field-Effect-

Transistor (MOSFET)

Giovanni Betti Beneventi

E-mail: [email protected] ; [email protected]

Office: Engineering faculty, ARCES lab. (Ex. 3.2 room), viale del Risorgimento 2, Bologna

Phone: +39-051-209-3773

Advanced Research Center on Electronic Systems (ARCES)

University of Bologna, Italy

[Source: Synopsys]


Outline

• Review of basic properties of the MOSFET

• Sentaurus Workbench setup (SWB)

• Implementation of Input files

– Sentaurus Structure Editor (SDE) command file

– Sentaurus Device (SDevice)

• command file

• parameter file

• Run the simulation

• Post-processing of results


The MOSFET: a qualitative introduction (1)

• MOSFET= Metal-Oxide-Semiconductor Field-Effect Transistor

• Workhorse of all digital systems since ‘70s

– Good electrical switch (little parasitic effects)

– High integration density and relatively simple manufacturing process

• Structure

– 4 terminals device: source (S), drain (D), gate (G), bulk (B)

– The voltage applied to the gate determines if and how much current flows between the source and the

drain port. The body serves to modulate device characteristics and parameters.

– The device can be considered as a voltage-controlled switch. When the voltage applied to the gate is

larger than a given value called the threshold voltage 𝑉𝑇, a conducting channel is formed between drain

and source. Then, in the presence of a voltage difference between drain and source, current flows.

Conversely, when the gate voltage is lower than 𝑉𝑇 no channel exists and the switch is open.

NMOS

(bulk contact not shown)



• Two types of MOSFET:

– NMOS: n+ drain and source regions embedded in a p-type substrate. Above 𝑉𝑇, the current is

carried out by electrons (drift) moving through an n-type channel between source and drain.

– PMOS p+ drain and source regions embedded in a n-type substrate. Above 𝑉𝑇, the current is

carried out by holes (drift) moving through a p-type channel between source and drain.

– Since (above 𝑉𝑇) either electrons or holes contribute to current flow, MOSFET is said to be a

unipolar device (in pn-junction diodes both electrons and holes contribute to the current, so

the diode is a bipolar device).

– In the most used silicon technology, the CMOS (Complementary MOS) technology, both

NMOS and PMOS are present.

NMOS PMOS

n-substrate



Consider an NMOS

• 𝑽𝑮𝑺 = 𝟎, drain, source and bulk connected to ground. The substrate-

source and substrate-drain junctions are reverse-biased pn-junctions

high-resistance between source and drain

• 0 < 𝑽𝑮𝑺 < 𝑽𝑻, gate and substrate form the plates of a capacitor with

the gate oxide as the dielectric. The positive gate voltage causes

positive charge to accumulate on the gate electrode and negative

charge on the substrate side. The latter manifests itself initially by

repelling mobile holes. Hence, a depletion region is formed below

the gate. This depletion region is similar to the one occurring in a pn-

junction diode.

• 𝑽𝑮𝑺 = 𝑽𝑻: as the gate voltage increases, the potential at the silicon

surface at some point reaches a critical value, where the

semiconductor surface inverts to n-type material. Further increases in

the gate voltage produce no further changes in the depletion-layer

width, but results in additional electrons at the thin inversion layer

directly under the oxide. These are drawn in the inversion layer from

the heavily doped n+ source region, the conductivity of which is

modulated by the gate-source voltage. The value of 𝑉𝐺𝑆 where strong

inversion occurs is called the threshold voltage 𝑉𝑇. 𝑉𝑇 is a function of

several quantities, most of which are material constants, such as the

difference in the work-function between gate and substrate material,

the oxide thickness, the impurity charge trapped at the surface

between channel and gate oxide and the doping.

(a)

𝑉𝐺𝑆

𝑉𝐺𝑆

𝑉𝐺𝑆

𝑉𝐺𝑆 = 0

0 < 𝑉𝐺𝑆 < 𝑉𝑇

𝑉𝐺𝑆 > 𝑉𝑇


The MOSFET: basic operation regimes (1)

• Resistive operation

• 𝑉𝐺𝑆 > 𝑉𝑇, small voltage 𝑉𝐷𝑆 applied between drain and source.

• 𝑽 𝒙 = 𝑽𝑮𝑺 − 𝑽𝑫𝑺 > 𝑽𝑻 ∀ 𝑥 ∈ channel

• Current flow is due to drift of electrons. It can be shown that

where

𝑊 effective transistor width*

(* extending perpendicular to the plane of the slide)

𝐿 effective channel length

𝜇𝑛 electron mobility

𝑡𝑜𝑥 silicon oxide thickness

𝜀𝑜𝑥 dielectric permittivity

• For small 𝑉𝐷𝑆 the quadratic term can be dropped and the 𝐼𝐷 − 𝑉𝐷𝑆characteristics is

linear (i.e. the transistor behaves like a resistor), therefore the MOSFET is said to

be working in the linear or ohmic region.

𝐼𝐷 = 𝑘′𝑛

𝑊

𝐿𝑉𝐺𝑆 − 𝑉𝑇 𝑉𝐷𝑆 −

𝑉𝐷𝑆2

2

𝑘′𝑛 = 𝜇𝑛𝐶𝑜𝑥 =

𝜇𝑛𝜀𝑜𝑥

𝑡𝑜𝑥



• Saturation region

• 𝑉𝐺𝑆 > 𝑉𝑇, high voltage 𝑉𝐷𝑆 applied between drain and source.

• As the value of 𝑉𝐷𝑆 is further increased, the assumption that the channel voltage 𝑉(𝑥) is larger

than 𝑉𝑇 all along the channel ceases to hold. At 𝑥 where 𝑉 𝑥 < 𝑉𝑇,𝑖. 𝑒. 𝑉𝐷𝑆 > 𝑉𝐺𝑆the induced

charge is zero, and the conducting channel disappears or is pinched-off.

• It can be shown that, under these conditions, the conductive channel thickness is gradually

reduced from source to drain until pinch-off occurs. Under these conditions (at least one pinch-

off point for which 𝑉 𝑥 < 𝑉𝑇 at the drain region), the transistor is said to be working in the

saturation region, and the 𝐼𝐷 − 𝑉𝐷𝑆 equation reads

• In saturation, ideally, 𝐼𝐷 does not depend on 𝑉𝐷𝑆 and has a squared dependence on 𝑉𝐺𝑆

𝐼𝐷 =𝑘′

𝑛

2

𝑊

𝐿(𝑉𝐺𝑆 − 𝑉𝑇 )2


Channel length modulation

• According to the 𝐼𝐷 equation in the saturation region, it seems that current

between source and drain contact does not depend on V𝐷𝑆 . Actually, this is

only a first order approximation. The effective length of the conductive

channel is indeed modulated by 𝐕𝑫𝑺 : increasing V𝐷𝑆 causes the depletion

region at the drain junction to grow due to the fact that 𝑉 𝑥 at the transistor

channel is decreased. This means that the actual 𝐿 is reduced, hence 𝑰𝑫

increases.

• A more accurate description of current in MOS under saturation condition is

where 𝜆 is an empirical parameter called channel-length modulation.

• In shorter transistor, the depletion region at the drain junction is larger (not

to be used as current sources).

𝐼𝐷 =𝑘′

𝑛

2

𝑊

𝐿𝑉𝐺𝑆 − 𝑉𝑇

2(1 + 𝜆𝑉𝐷𝑆) V𝐷𝑆 dependence through 𝜆


Velocity saturation

• The behavior of transistors with very short channel lengths (short-channel

devices) deviates considerably from the resistive and saturated models

presented so far. The main cause of this discrepancy is the velocity

saturation effect. In fact, while for simplicity it is usually indicated that the

carrier velocity 𝑣 = 𝜇𝐸, actually 𝜇 = 𝜇(𝐸), and in particular, at high fields, 𝜇

is reduced due to scattering effects (collisions suffered by the carriers).

• When the electric field along the channel (i.e. longitudinal component of the

electric field) reaches a critical value 𝜉𝑐 , the velocity of the carriers tends to

saturate to 𝑣𝑠𝑎𝑡 (i.e. 𝐸 increase counterbalanced by 𝜇 decrease).

~ 1.5 x 104 V/cm (higher for n-type Silicon channels)

p-type Silicon channel

𝑣𝑠𝑎𝑡 = 105 m/s Models of velocity saturation can be

introduced in the Sdevice command file in the Mobility physics section

by specifying a Field-dependent model

constant velocity

constant mobility 𝜇 = slope


Drain current vs. Voltage chart (1): output characteristics

resistive: voltage-controlled resistor

saturation: voltage-controlled current-source saturation at small 𝑉𝐷𝑆 due to

velocity saturation effects

Considering NMOS devices.

Output characteristics= 𝐼𝐷𝑆 vs. 𝑉𝐷𝑆 at fixed 𝑉𝐺𝑆


Drain current vs. Voltage chart (2): turn-on characteristics

Considering NMOS devices.

Turn-on characteristics= 𝐼𝐷𝑆 vs. 𝑉𝐺𝑆, at 𝑉𝐷𝑆 > 𝑉𝐺𝑆 (saturation condition)

saturation, 𝐼𝐷~𝑉𝐺𝑆2


The MOSFET: threshold voltage

• The turn-on phenomenon is a gradual function of the gate voltage. In semiconductor physics, the

threshold voltage is usually defined as the gate voltage for which at the semiconductor-oxide interface the

concentration of the inversion charge is higher that the concentration of the substrate doping, i.e. 𝑛 > 𝑁𝐴−

for NMOSFET, and 𝑝 > 𝑁𝐷+ for PMOSFET.

• It can be shown that, for NMOSFET 𝑉𝑇 = Φ𝑀𝑆 + 2Φ𝐹 +𝑄𝑑𝑒𝑝

𝐶𝑜𝑥

where

Φ𝑀𝑆 is the workfunction difference between the polysilicon gate and the silicon substrate

Φ𝐹 =𝑘𝑇

𝑞ln

𝑆𝑢𝑏𝐷𝑜𝑝

𝑛𝑖

𝑄𝑑𝑒𝑝 = 4𝑞𝜀𝑆𝑖 Φ𝐹 𝑆𝑢𝑏𝐷𝑜𝑝

𝐶𝑜𝑥 = 𝜀𝑆𝑖

𝑇𝑜𝑥

• Therefore, 𝑉𝑇 increases if 𝑆𝑢𝑏𝐷𝑜𝑝 increases. From a qualitative point of view it is explained since if

𝑆𝑢𝑏𝐷𝑜𝑝 is higher we have more holes at the surface and we need to increase the applied voltage to

attract a sufficient number of electrons in such a way that electrons concentration will be higher than

holes one.

• Then, 𝑉𝑇 increases if 𝐶𝑜𝑥 decreases. A lower 𝐶𝑜𝑥 means a lower electrostatic control on the channel (i.e.

lower electric field), therefore, in order to get inversion we need to apply a higher 𝑉𝐺𝑆.

• 𝑉𝑇 is pretty much independent on channel length.

where 𝑁𝐴− = 𝑆𝑢𝑏𝐷𝑜𝑝



• Subthreshold conduction

A closer inspection of the 𝐼𝐷 − 𝑉𝐺𝑆 curve (i.e.

plot of the current in log-scale) reveals that

the current does not drop abruptly to zero

when 𝑉𝐺𝑆 < 𝑉𝑇 . It becomes apparent that the

MOSFET is already partially conducting for

voltages below the threshold voltage. This

effect is called subthreshold or weak-

inversion conduction. In fact, the onset of

strong inversion means that a big number of

carriers is available for conduction, but does

not imply that no current at all can flow for

𝑉𝐺𝑆 < 𝑉𝑇 . In other words, the transition

between off- and on- conditions is not abrupt,

but gradual. It can be shown that the 𝐼𝐷 − 𝑉𝐺𝑆

curve features an exponential behavior for

𝑉𝐺𝑆 < 𝑉𝑇 ,with a slope 𝑆 upper limited to 60

mV/dec at room temperature . Under these

conditions, the diffusion process dominates

over drift.

𝑆 ≜ln (𝐼𝐷)

𝑉𝐺𝑆

= 𝑛𝑘𝑇

𝑞ln (10)

where 𝑛 is an ideality factor ≥ 1

logscale


The structure

the device is symmetric around the

vertical axis defined at x=0

Only half of the device geometry can

be defined, then the device structure

is mirrored around the vertical axis

x=0

G

S D

B


Geometrical definitions / MOSFET

x

y

Ysub=1mm

Xsub=0.5 mm

zoom

oxide: extending y from 0 to –Tox=Ygox

(very small, 2.5 nm)

Xsp

Ypol

y

x

Xg= Lg/2

Lreox

Hpol

fillet_

radius

Xj


SWB: project tools & parameters (1)

OPEN SWB FROM THE LINUX COMMAND LINE swb &

STARTING (AND SAVING) A NEW SWB PROJECT Project New New Project

Project Save as Project MOSFET

ADD TOOLS left click on No tools right click Add Name, scroll for Sde select Batch Ok

left click on Sde right click Add Name scroll for Sdevice Ok

ADD ANOTHER Sdevice TOOL left click on Sdevice right click Add Name scroll for Sdevice Ok

Double click on first Sdevice tool Input Files change name (double click on the Master

field) in the Commands field to turn_on_des.cmd

Double click on first Sdevice tool Input Files change name in the Commands field to output_des.cmd

ADD PARAMETERS (WITH THEIR DEFAULT VALUES): SDE /GEOMETRY AND DOPING Parameter Add Parameter Lg default value 0.13 Ok

Right click on Lg Add Parameter Tox default value 10

Right click on Tox Add Parameter SubDop default value 1e18

ADD PARAMETERS (WITH THEIR DEFAULT VALUES): Sdevice /MODELS AND VOLTAGES


SWB: project tools & parameters (2)

EXPERIMENT RAMIFICATION Left click just below the box Lg of first line Nodes Extend Selection To Experiments

Experiments Add Values Parameter Lg Min. Value: 0.13 Step: 0.1

Number of values: 3 Apply Ok

Then change the values to more suitable ones: F6 on n11 and write 0.250 and F6 on n20 and

write 0.500

Left click just below the box Tox of first line Nodes Extend Selection To Experiments

Experiments Add Values Parameter Tox Min. Value: 2.5e-3 Step:

1e-3 Number of values: 3 Apply Ok

Then change the values to more suitable ones: F6 on n29 and write 10e-3 and F6 on n37 and

write 20e-3

Left click just below the box SubDop of first line Nodes Extend Selection To

Experiments Experiments Add Values Parameter SubDop Min. Value:

1e18 Step: 1e18 Number of values: 3 Apply Ok

Then change the values to more suitable ones: F6 on n45 and write 1e15 and F6 on n52 and

write 1e13

DONE SWB PART


SDE command file (1)

Select SDE image tool Right Click Edit input Commands

then write in the text file the following commands:

;* CLEAR STRUCTURE

(sde:clear)

; New-replaces-old option (default)

(sdegeo:set-default-boolean "ABA")

;*** DEFINITIONS ******

; ** LATERAL (X-AXIS)

; gate length

(define Lg @Lg@)

; spacer length

(define Lsp 0.1)

(define Lreox 0.01)

(define Ltot 1)

; VERTICAL (Y-AXIS)

; substrate thickness

(define Hsub 1.0)

; gate oxide thickness

(define Tox @Tox@)



; polysilicon-gate thickness

(define Hpol 0.2)

; spacer rounding

(define fillet-radius 0.08) ; rounding radius

; pn-junction mesh resolution

(define Gpn 0.005)

; substrate doping level

(define SubDop @SubDop@)

; junction depth

(define Xj 0.1 )

(define Xsub (/ Ltot 2.0))

; define

(define Xg (/ Lg 2.0))

; define spacer x-coordinate

(define Xsp (+ Xg Lsp))

(define Ysub Hsub)



; define gate-oxide y-coordinate

(define Ygox (* Tox -1.0))

(define Ypol (- Ygox Hpol))

(define Lcont (- Xsub Xsp))

(define eps 5e-4)

; define spacer x-coordinate

(define Xsp (+ Xg Lsp))

(define Ysub Hsub)

; define gate-oxide y-coordinate

(define Ygox (* Tox -1.0))

(define Ypol (- Ygox Hpol))

(define Lcont (- Xsub Xsp))

(define eps 5e-4)

; *** GEOMETRY ***

; convention: x=length y=thickness

; substrate region

(sdegeo:create-rectangle (position 0.0 Ysub 0.0) (position Xsub 0.0 0.0)

"Silicon" "R.Substrate" )



; Creating gate oxide

(sdegeo:create-rectangle (position 0.0 0.0 0.0) (position Xsp Ygox 0.0)

"SiO2" "R.Gateox")

; Creating PolyReox (to be 'etched')

(sdegeo:create-rectangle (position 0.0 Ygox 0.0) (position Xsp Ypol 0.0)

"Oxide" "R.PolyReox")

; Creating spacers regions

(sdegeo:create-rectangle (position (+ Xg Lreox) Ygox 0.0) (position Xsp

Ypol 0.0 ) "Si3N4" "R.Spacer")

; Creating PolySi gate

(sdegeo:create-rectangle (position 0.0 Ygox 0.0 ) (position Xg Ypol 0.0)

"PolySi" "R.Polygate")

; Rounding spacers

(sdegeo:fillet-2d (find-vertex-id (position Xsp Ypol 0.0 )) fillet-radius)

;*** CONTACTS ***

; Contact declarations

(sdegeo:define-contact-set "drain" 4.0 (color:rgb 0.0 1.0 0.0 ) "##")

(sdegeo:define-contact-set "gate" 4.0 (color:rgb 0.0 0.0 1.0 ) "##")

(sdegeo:define-contact-set "substrate" 4.0 (color:rgb 0.0 1.0 1.0 ) "##")



; Contact settings

(sdegeo:define-2d-contact (find-edge-id (position (+ Xsp eps) 0.0 0.0)) "drain")

(sdegeo:define-2d-contact (find-edge-id (position eps Ypol 0.0)) "gate")

(sdegeo:define-2d-contact (find-edge-id (position eps Ysub 0.0)) "substrate")

; *** DOPING ****

; Substrate

(sdedr:define-constant-profile "Const.Substrate" "BoronActiveConcentration"

SubDop)

(sdedr:define-constant-profile-region "PlaceCD.Substrate" "Const.Substrate"

"R.Substrate")

; Poly

(sdedr:define-constant-profile "Const.Gate" "PhosphorusActiveConcentration"

1e20)

(sdedr:define-constant-profile-region "PlaceCD.Gate" "Const.Gate" "R.Polygate")

; Source/Drain base line definitions

(sdedr:define-refinement-window "BaseLine.Drain" "Line" (position Xsp 0.0 0.0)

(position Xsub 0.0 0.0))



; Source/Drain implant definition

(sdedr:define-gaussian-profile "Impl.SDprof"

"PhosphorusActiveConcentration" "PeakPos" 0 "PeakVal" 1e20 "ValueAtDepth"

SubDop "Depth" Xj "Gauss" "Factor" 0.4)

; Source/Drain implants

(sdedr:define-analytical-profile-placement "Impl.Drain" "Impl.SDprof"

"BaseLine.Drain" "NoReplace" "Eval")

; Source/Drain extensions base line definitions

(sdedr:define-refinement-window "BaseLine.DrainExt" "Line" (position Xg

0.0 0.0) (position Xsp 0.0 0.0))

; Source/Drain implant definition

(sdedr:define-gaussian-profile "Impl.SDextprof"

"PhosphorusActiveConcentration" "PeakPos" 0 "PeakVal" 5e18 "ValueAtDepth"

SubDop "Depth" (* Xj 0.25) "Gauss" "Factor" 0.25)

; Source/Drain implants

(sdedr:define-analytical-profile-placement "Impl.DrainExt" "Impl.SDextprof"

"BaseLine.DrainExt" "Symm" "NoReplace" "Eval")



; *** MESH ***

; Substrate

(sdedr:define-refinement-size "Ref.Substrate" (/ Ltot 4.0) (/ Hsub 8.0) Gpn

Gpn)

(sdedr:define-refinement-function "Ref.Substrate" "DopingConcentration"

"MaxTransDiff" 1)

(sdedr:define-refinement-region "RefPlace.Substrate" "Ref.Substrate"

"R.Substrate")

; Si Active region (channel)

(sdedr:define-refinement-window "RWin.Act" "Rectangle" (position 0.0 0.0

0.0) (position Xsub (* Xj 1.2) 0.0))

(sdedr:define-refinement-size "Ref.SiAct" (/ Lcont 4.0) (/ Xj 8.0) Gpn Gpn)

(sdedr:define-refinement-function "Ref.SiAct" "DopingConcentration"

"MaxTransDiff" 1)

(sdedr:define-refinement-placement "RefPlace.SiAct" "Ref.SiAct" "RWin.Act"

)

; Gate oxide

(sdedr:define-refinement-size "Ref.GOX" (/ Ltot 4.0) (/ Tox 4.0) Gpn (/ Tox

8.0) )

(sdedr:define-refinement-region "RefPlace.GOX" "Ref.GOX" "R.Gateox" )



; Gate Multibox

;Multibox refinements are similar to regular refinement boxes, but here,

;the requested minimum mesh spacing can be graded. It starts with the

;minimum value given at a specified side of the refinement window and is

;expanded by a given factor from one mesh line to the next until the given

;maximum is reached.

(sdedr:define-refinement-window "MBWindow.Gate" "Rectangle" (position 0

Ypol 0.0) (position (* Xg 1.0) Ygox 0.0))

(sdedr:define-multibox-size "MBSize.Gate" (/ Lg 8.0) (/ Hpol 8.0) (/ Lg

10.0) 2e-4 1.0 -1.35)

(sdedr:define-multibox-placement "MBPlace.Gate" "MBSize.Gate"

"MBWindow.Gate" )

; Channel Multibox

(sdedr:define-refinement-window "MBWindow.Channel" "Rectangle" (position

0.0 0.0 0.0) (position (* Xg 1.2) (* 0.5 Xj) 0.0))

(sdedr:define-multibox-size "MBSize.Channel" (/ Lg 8.0) (/ Xj 8.0) (/ Lg

10.0) 1e-4 1.0 1.35)

(sdedr:define-multibox-placement "MBPlace.Channel" "MBSize.Channel"

"MBWindow.Channel" )



; Gate-Drain junction

(sdedr:define-refinement-size "Ref.J" (/ 0.016 6.0) 99 (/ 0.016 7.0) 66)

(sdedr:define-refinement-window "RWin.GD" "Rectangle" (position (- Xg 0.01)

0.0 0.0) (position (+ Xg Lreox) (* Xj 0.2) 0.0) )

(sdedr:define-refinement-placement "RefPlace.GJ" "Ref.J" "RWin.GD" )

; Building mesh

(sde:build-mesh "snmesh" "" "n@node@_half_msh")

; Reflect the device

(system:command "tdx -mtt -x -M 0 -S 0 -ren drain=source n@node@_half_msh

n@node@_msh")

• Save Quit

DONE SDE PART


Sdevice turn_on_des.cmd (1)

Select left Sdevice image tool Right Click Edit input Commands

then write in the text file the following commands:

File

{

**** INPUT FILES

* geometry, contacts doping and mesh

Grid ="@tdr@"

* physical parameters

Parameter = "@parameter@"

**** OUTPUT FILES

* distributed variables

Plot = "n@node@_des.tdr"

* electrical characteristics at the electrodes

Current= "n@node@_des.plt"

}

Electrode

{

* defines which contacts have to be treated as electrodes; initial bias

* & boundary conditions



{ name="source" Voltage=0.0 }

{ name="drain" Voltage=0.0 }

{ name="gate" Voltage=0.0 }

{ name="substrate" Voltage=0.0 }

}

Physics

{

Mobility( DopingDep HighFieldSaturation Enormal )

EffectiveIntrinsicDensity( oldSlotboom )

}

Plot

{

* On mesh variables to be saved in the .tdr output file

*- Doping Profiles

Doping DonorConcentration AcceptorConcentration

*- Charge, field, potential and potential energy

SpaceCharge



ElectricField/Vector Potential

BandGap EffectiveBandGap BandGapNarrowing ElectronAffinity

ConductionBandEnergy ValenceBandEnergy

*- Carrier Densities:

EffectiveIntrinsicDensity IntrinsicDensity

eDensity hDensity

eQuasiFermiEnergy hQuasiFermiEnergy

*- Currents and current components:

eGradQuasiFermi/Vector hGradQuasiFermi/Vector

eMobility hMobility eVelocity hVelocity

Current/Vector eCurrent/Vector hCurrent/Vector

eDriftVelocity/Vector hDriftVelocity/Vector=

*- SRH & interfacial traps

SRHrecombination

tSRHrecombination

*- Band2Band Tunneling & II

eBand2BandGeneration hBand2BandGeneration Band2BandGeneration

eAvalanche hAvalanche Avalanche

}



Math

{

* use previous two solutions (if any) to extrapolate next

Extrapolate

* use full derivatives in Newton method

Derivatives

* control on relative and absolute errors

-RelErrControl

* relative error= 10^(-Digits)

Digits=5

* absolute error

Error(electron)=1e8

Error(hole)=1e8

* numerical parameter for space-charge regions

eDrForceRefDens=1e10

hDrForceRefDens=1e10

* maximum number of iteration at each step

Iterations=20



* solver of the linear system

Method=ParDiSo

* display simulation time in 'human' units

Wallclock

* display max.error information

CNormPrint

* to avoid convergence problem when simulating defect-assisted tunneling

NoSRHperPotential

}

Solve

{

* EQUILIBRIUM

coupled {poisson}

* TURN-ON

* increasing VDS to goal

quasistationary (InitialStep = 0.010 MaxStep = 0.005 MinStep=0.001

Goal {name= "drain" voltage = @vds_fixed@}

plot { range=(0, 1) intervals=1 }

)



{coupled {poisson electron hole} }

* increasing VGS to goal


Goal {name= "gate" voltage = @vgs_goal@}


)


}

We have thus far written the turn_on_des.cmd file for simulation of the turn-on characteristics

(first raise VDS, then sweep VGS).

• Since we have two instances of Sdevice we need to write another input file for the second tool.

Select right Sdevice image tool Right Click Edit input Commands then write (copy) in the

file the same commands as in the first command file at the exception of the Solve section that should

be modified as follows in the next slide


Sdevice output_des.cmd (1)

* previous part as turn_on_des.cmd

Solve

{

* EQUILIBRIUM

coupled {poisson}

* TURN-ON

* increasing VDS to goal


Goal {name= "gate" voltage = @vgs_fixed@}


)

coupled {poisson electron hole} }

* increasing VGS to goal


Goal {name= "drain" voltage = @vds_goal@}


)


}


Parameter file, Pre-processing and Run

• Since parameter file is the same for all Sdevice tools we need to write one single sdevice.par

• Write an empty parameter file to keep the parameter default values:

• Select left Sdevice image tool Right Click Edit input Parameter No Save

Quit

DONE SDevice PART

Pre-processing and Run:

Select SDE real nodes CTRL-R local:priority Run

Select left Sdevice real nodes CTRL-R local:priority Run

Select right Sdevice real nodes CTRL-R local:priority Run


Post-processing: energy bands at equilibrium

• Right click on n2 Visualize Svisual (Select File…)

• Select n2_000000_des Ok

• Precision Cuts Y 0 Plot Band Diagram

energy barrier

for electrons to

be overcome

apply positive 𝑉𝐺𝑆

source channel drain


Post-processing: energy bands at high 𝑉𝐺𝑆




energetic barrier

is disappeared

𝛻𝐸𝑓𝑛 = 𝛻𝐸𝑓𝑝 = 0

equilibrium

no net current

flow

source channel drain


Post-processing: electron concentration at high 𝑉𝐺𝑆

• Window Plot_1

• Scalars eDensity

• Range 1e18 in the maximum value (=SubDop value) in order to see the inversion layer

• Zoom in in the channel region


Post-processing: energy bands at high 𝑉𝐺𝑆 and high 𝑉𝐷𝑆




it is like an

“inclined plane”

for electrons

𝛻𝐸𝑓𝑛 ≠ 𝛻𝐸𝑓𝑝 ≠ 0

current flow


Post-processing: turn-on characteristics

• Right click on n2 Visualize Inspect (All Files)

• Select n2_des on the Datasets part gate OuterVoltage To X-Axis drain

TotalCurrent To Left-Y-Axis

• Then, select logY on the upper toolbar

• Double click on left Y-Axis scale min 1e-11

𝑉𝑇~ 0.3 V

linscale logscale

inverse slope ~ 80 mV/dec


Compute curve slope using Inspect

• Curve Inspector select Snap to First Point

• Sets two point on the curve in the subthreshold region

about 80mV/dec, meaning that

we need to increase 𝑉𝐺𝑆 of

80mV to increase the current

of one decade

inverse slope is indeed

defined as:

𝑆𝑆 =∆𝑉𝐺𝑆

log (𝐼𝐷)

subthreshold

region

(low 𝑉𝐺𝑆 zone ,

constant slope)

𝑉𝑇~ 0.3 V


Post-processing: turn-on IV varying Lg

• File Load Dataset Select n16 and n25

• Select all just loaded datasets on the Datasets part and n2 dataset gate OuterVoltage

To X-Axis drain TotalCurrent To Left-Y-Axis

Lg

• increased Lg (linearly)

reduced 𝐼𝐷 ~ constant 𝑉𝑇


Post-processing: turn-on IV varying Tox

• File Load Dataset Select n33 , n41



• Then, select logY on the upper toolbar

• extremely strong dependence on

Tox

• A change on Tox of few nm has

an enormous impact on turn-on

curves

• Devices with higher Tox suffer

from poor electrostatic control

they cannot be switched on due

to the fact that the electric field

induced at the transistor channel

is much reduced

Tox


Turn-on characteristics varying SubDop

• File Load Dataset Select n48 , n55



• increasing SubDop yield

increased 𝑉𝑇

• 𝑉𝑇 can be modulated by acting on SubDop

SubDop


Post-processing: output characteristics varying Lg

• Right click on n6, n19 and n28 Visualize Inspect (All Files)

• Select n2_des on the Datasets part drain OuterVoltage To X-Axis

TotalCurrent To Left-Y-Axis

linear

region saturation

region

Lg

• increased Lg (linearly)

reduced 𝐼𝐷 • decreased output

conductance

𝑔𝐷𝑆 =𝜕𝐼𝐷

𝜕𝑉𝐷𝑆

calculated at low 𝑉𝐷𝑆 in

the linear region


Bibliography

• J.M. Rabaey, A. Chandrakasan, B. Nikolic, Digitial Integrated Circuits: A Design

Perspective, Prentice Hall, 2003.

• Giovanni Ghione, Dispositivi per la Microelettronica, McGraw-Hill, 1998.

• B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.

• Sentaurus Synopys User’s guides

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