7SC falls strongly in the P-substrate device, also owing to lossof conductivity modulation in the base. Calculated resultsindicate that the (moderate) decrease of 7SC in the JV-substratecell is related to Auger and Shockley-Read-Hall recombi-nation. Fig. 5 depicts a perspective view of hole and electrondistribution near the back intercontacts region of N- andP-type substrate IBC solar cells. It appears that the loss ofconductivity modulation is inherent to P-substrate devicesand is confined near the P+P junction. This phenomenonenhances the 2D nature of current flow in the area betweencontacts; poor agreement with device behaviour is thusexpected if a local approach such as a ID (BSF-like) analysis4

is used.While for conventional cells the open-circuit voltage Voc is

generally higher for N-type substrate,5 it is the same for bothP- and JV-IBC devices (Fig. 4); the lack of difference isexplained by negligible recombination in the high lifetime bulkregion (T = 180 /is). Moreover, it is found that under highillumination Voc is essentially limited by heavy doping effectsin the contact regions. Further investigation is being carriedout on this particular topic.

Two conclusions follow from these results: (i) iV-type sub-strates offer a strong advantage at very high illumination forwhich IBC cells are primarily designed; (ii) ID analysis maybe insufficient to account for important local mechanisms inIBC cells, particular near the back junctions.

M. BOUMAOUR 4th October 1984F. VAN de WIELE

Universite Catholique de LouvainLaboratoire de MicroelectroniquePlace du Levant 31348 Louvain-la-Neuve, Belgium

References

1 LAMMERT, M. D., and SCHWARTZ, R. J. i The interdigitated backcontact solar cell: a silicon solar cell for use in concentrated sun-light', IEEE Trans., 1977, ED-24, pp. 337-342

2 SCHWARTZ, R. J., BOUKNIGHT, J. L., and WORLEY, M. s.: The effectsof surface potential on surface recombination and the performanceof silicon solar cells'. IEDM Technical Digest, 1978, pp. 74-77

3 BOUMAOUR, M., and VAN DE WIELE, F. : Two-dimensional analysis ofthe back region of IBC silicon solar cells'. Proceedings of 3rdinternational conference on the numerical analysis of semicon-ductor devices and integrated circuits (Galway, 1983), pp. 96-101

4 FOSSUM, J. G., NEUGROSCHEL, A., and LINDHOLM, F. A.: 'Unifyingstudy of tandem-junction, front surface field, and interdigitatedback-contact solar cells', Solid-State Electron., 1980, 23, pp. 1127-1138

5 FOSSUM, j . G., BURGESS, E. L., and LINDHOLM, F. A. : 'Silicon solar celldesigns based on physical behavior in concentrated sunlight', ibid.,1978, 21, pp. 729-737

TIME DELAY SPREAD MEASUREMENTS OFWIDEBAND RADIO SIGNALS WITHIN ABUILDING

Indexing terms: Radiowave propagation, Attenuation

Measurements of time delay spread of wideband 850 MHzdigital radio signals due to multipath propagation within alarge building are described. These measurements show amedian RMS time delay spread of 125 ns and a worst case of250 ns. Consequently, signalling rates above 400 kHz maynot be feasible.

Experiment: Studies of the attenuation of radio waves inbuildings have been reported by Cox, Murray and others.1"5

However, the propagation of UHF radio waves within build-ings is also characterised by strong multipath effects, causingdifferent rays of the signal to reach the receiver at slightlydifferent times. This could result in intersymbol interference,

which limits the usable signalling rate of digital radio commu-nications systems operating in the building.

This letter reports preliminary measurements made to char-acterise time delay spread of radio signals in buildings. Themethod used was described previously by D. C. Cox forsimilar measurements in the mobile radio environment.6 Forthis experiment, a 40 Mbits/s maximal length pseudonoisecode generated by a 10 bit feedback shift register is broadcastby a biphase modulated 850 MHz transmitter. It suffers timesmear due to the propagation environment and is then corre-lated with the identical code (running 4 kHz slower) at thereceiver. The receiver output traces out the power against timedelay profile of the received signal. The transmitter and recei-ver antennas were vertically polarised sleeve dipoles about2 m above the floor. The signal/noise ratio exceeded 15 dB inthe worst cases. The highest signal/noise ratio was determinedby the correlation noise level of the pseudonoise code, andwas better than 40 dB.

The measurements were made at the AT & T Bell Labor-atories complex in Holmdel, NJ, shown in Fig. 1. It measures315 x 110 m in plan, with an outer wall of metallised glass.Inside, it consists of four 6-floor buildings, each 145 x 36 m inplan. A large central 'cavity', 31 m wide, runs through theentire complex. Corridors encircle the outer perimeter of thecomplex and the central cavity on each floor.

bldg. 3

i ii ii 1« i

bldg. 4

i~ fI%*^_elevat0L-~---»4~Lll' 1 P ~~ towers i 1 '

bldg. 2 ^ ! |

r "ii ii ii i bldg. 1

-315m -

Fig. 1 Plan of experimental site (Holmdel complex)

Either the transmitter or the receiver was moved througheight equally spaced points along the perimeter of a 1-2 msquare, and the received power was measured at propagationdelay times within a 2 fim window. In every case it was veri-fied that no received power was visible beyond about 1-5 ^mof excess delay. The eight measurements were then poweraveraged at each time point. These averaged power-delay pro-files were obtained for 116 different combinations oftransmitter-receiver locations.

Fig. 2 shows an averaged power against time delay profileand illustrates the severity of the propagation environment.The strongest transmission path is seen about 0-5 /im after thefirst arrival. Clearly, such path characteristics are majorfactors to be considered in systems design.

-10r : : : : : : :

S-20

IQ--30

a£-40

-500 0-2 0-4 0-6 0-8 1-0 1-2 V4 1-6

time, ^ s [551/21

Fig. 2 Averaged power-delay profile

Analysis and results: The averaged power-delay profiles werenoise-clipped. The root mean square time delay spread (squareroot of the second central moment) of each of the resultingprofiles was computed. Cumulative distributions of time delayspread are presented in Fig. 3.

Curve 1 in Fig. 3 shows the cumulative distribution for allthe locations. The median value of the distribution is 125 ns,and the maximum value is 250 ns.

Curve 2 shows the cumulative distribution for a horizontalcut at the 4th floor of building 2, i.e. using only the data for

950 ELECTRONICS LETTERS 8th November 1984 Vol. 20 No. 23

which both the transmitter and receiver were on the 4th floorof the building, either in rooms, aisles or corridors. Themedian delay spread is 110 ns and the maximum is 205 ns.

VOr

oQ-0-2

1 all locations2 horizontal cut

50 100 150RMS delay spread T, ns

200 250

Fig. 3 Cumulative distributions of root mean square excess time delayspreads

Curve 3 in Fig. 3 shows the results for a vertical cut throughbuilding 2. Here, the receiver was either in various locationson the 4th floor F aisle, shown in Fig. 1, or in a room openingoff that aisle. The transmitter was placed in several locationsin the corresponding aisles on floors 2 to 6. The median of thedistribution is 115 ns, and the maximum delay spread is250 ns.

A comparison of the vertical and horizontal cut results withall of the data shows no significant differences in the timedelay spread statistics. Part of the reason is the existence ofthe large central 'cavity' referred to earlier. This tends to influ-ence the spread of signals propagating within the building.

Studies have been made to relate the RMS time delayspread to the maximum signalling rates permissible for a givenerror rate.7 8 Based on the maximum root mean square timedelay spread of 250 ns, bit rates in excess of 400 kbit/s maynot be feasible for a probability of error of 0001 or less, in thisbuilding.

Summary: An experiment to measure time delay spread ofwideband radio signals in a building was implemented. Themethod uses the correlation properties of pseudorandom noisecodes to reduce data acquisition rates while effectively probingthe medium with a narrow pulse. Measurements were made at850 MHz using biphase modulation at 40 Mbit/s. A largebuilding was studied. Preliminary data indicate that power-delay profiles have a median root mean square time delayspread of 125 ns and a maximum delay spread of 250 ns. Nosignificant differences were seen between measurements takenalong a vertical cut through the building and those along ahorizontal cut.

Signalling rates of digital communications systems in thisbuilding in excess of 400 kbit/s may not be feasible for anerror probability of 0001 or less.

Acknowledgments: The measurements were made with theassistance of R. R. Murray. Thanks are also due to H. W.Arnold and D. C. Cox for their contributions to every phaseof this project.

D. M. J. DEVASIRVATHAM 1st October 1984

Bell Communications Research Inc.Radio & Satellite Systems Research DivisionHOH L-175 Crawford Hill LaboratoryHolmdel, NJ 07733, USA

References

1 HOFFMAN, H. H., and cox, D. c : 'Attenuation of 900 MHz radiowaves propagating into a metal building', IEEE Trans., 1982,AP-30, pp. 808-811

2 cox, D. c , MURRAY, R. R., and NORRIS, A. w.: 'Measurements of 800MHz radio transmission into buildings with metallic walls', BellSyst. Tech. J., 1983, 62, pp. 2695-2717

3 cox, D. c , MURRAY, R. R., and NORRIS, A. w.: '800 MHz attenu-ations measured in and around suburban houses', AT & T BellLabs. Tech. J., 1984, 63, pp. 921-954

ALEXANDER, s. E.: 'Radio propagation within buildings at900 MHz', Electron. Lett., 1982,18, pp. 913-914ALEXANDER, S. E.: 'Characterising buildings for propagation at900 MHz', ibid., 1983,19, p. 860cox, D. c : 'Delay Doppler characteristics of multipath propaga-tion at 910 MHz in a suburban mobile radio environment', IEEETrans., 1972, AP-20, pp. 625-635JAKES, w. c. (Ed): 'Microwave mobile communications' (Wiley-Interscience Publications, New York, 1974), pp. 236-240BELLO, p. A., and NELIN, B. D.: 'The effect of frequency selectivefading on the binary error probabilities of incoherent and differen-tially coherent matched filter receivers', IEEE Trans., 1963. CS-11,pp. 170-186

DIGITAL MEASUREMENT OF POLYSILICONTO DIFFUSION MISALIGNMENT FOR ASILICON GATE MOS PROCESS

Indexing terms: Semiconductor devices and materials, Mea-surement

A MOS structure which digitally measures the misalignmentbetween polysilicon and diffusion which occurs during pro-cessing is presented. The ultimate resolution of the structureis dependent only on the process resolution, with the mea-surement being based on conduction due to misaligned poly-silicon gates. The design automatically compensates for anyoveretching which may have occured during processing.

Introduction: With geometries shrinking for VLSI circuits theuse of parametric testing for both the verification of existingprocess and for the development of new processes has bynecessity increased. The tolerance on all process steps is nowmuch tighter. This letter addresses the problem of misalign-ment between layers, which is critical for the successful fabri-cation of integrated circuits. The automatic measurement andits relationship to other factors in the process is of importanceif the process is to be optimised for high yield or some otherparameter.

Previous techniques which have been used for this type ofparametric measurement have been analogue in nature andrelied on a uniform resistive layer of some kind.1'2 A digitalstructure which uses a vernier to measure misalignment byelectrical contact between two conductors has previously beenpresented, and this removes the above dependence.3 A newstructure which depends on transistor action to give a digitalmeasurement of misalignment between polysilicon and diffu-sion is proposed in this letter.

Design considerations: The main element of this structure istwo enhancement transistors connected in parallel as shown inFig. la. When the gate is earthed the transistors are bothswitched off and there is no conduction path between A andB.

When the polysilicon strip which forms the gates of thetransistor pair of Fig. la is misaligned as shown in Fig. \b aconduction path occurs between the source and drain. Anarray of transistors with the gates progressively misaligned,such as those shown in the schematic diagram of Fig. 2a, whentested for conduction can be used to evaluate the misalign-ment between the polysilicon and diffusion layers. In thisexample the transistor in the middle of the off transistors givesthe misalignment, which in this case is zero. Fig. 2b shows thestructure with 0-2 pm misalignment, which is once again givenby the central off transistor. The number of off transistors willbe a function of the degree of over or under etch, but provid-ing the etching is uniform over the structure length this willnot affect the measurement.

According to typical design rules the overlap of the poly-silicon gate should be 1-5 /.. Normally this is to prevent apossible conduction path around the end of the gate, butbecause this is the mechanism used to measure misalignment

ELECTRONICS LETTERS 8th November 1984 Vol. 20 No. 23 951