tla5000 golden demo for hardware engineersweb.mit.edu/6.111/www/s2005/guides/tla5000 golden... ·...

TLA5000 Golden Demo for Hardware Engineers

TLA5000 Golden Demo for Hardware Engineers v1.3 1/36

Introduction

Overview

Who Should Use this Demo?

• Anyone that needs to demo the capabilities of the TLA5000 and has access to a TLA5000 and the TLA5000 demo board.

Target Audience for Demo: Hardware Engineers

Demo Details

The TLA5000 EasySetup wizard allows new and infrequent users of the TLA5000 to quickly configure the logic analyzer and get data into a waveform window. Along with showing the EasySetup wizard, this demo shows how the TLA5000 can be used with a TDS Oscilloscope to quickly debug and characterize problems associated with improper bus timings.

This quick demo allows you to demonstrate EasySetup, glitch triggering, MagniVu, iView and setup/hold triggering.

Conventions

Throughout this document are items in red font and enclosed in a red box with the “bomb” symbol. These items are competitive landmines that can be planted as required.

Application Story: Text enclosed by a blue box is an application example that can be woven into the demo.

Note: Notes are used to indicate key reminders for the demo and topic/concepts that could be explained further.



Equipment Requirements The following equipment is needed:

• TLA520x with iView cable

• P6418 or P6417 probe

Note: Most customers will purchase the TLA5000 with a P6418 probe so I recommend that you do the demo with the P6418 probe.

• TLA5000 Demo Board with USB Cable (for power)

• TDS Oscilloscope for iView demos

Demo Procedure

Setting up the Equipment

1. Power-up the TLA5000 and the TDS5000

2. Connect the USB cable to the demo board and to the TLA5000. The green LED on the TLA5000 demo board should be lit.

Note: Do not connect the probe to the TLA5000 or the demo board at this point!

Demo Procedure

EasySetup 1. When the instrument power-ups, you should be at the EasySetup wizard introduction screen. If

the EasySetup Wizard does not start, you can start it by clicking on the EasySetup icon on the toolbar or by accessing it through the System Menu



2. Explain the EasySetup Wizard

Note: Reinforce the key points in the first paragraph of this screen – the EasySetup wizard guides the infrequent or new user through the basic steps to connect, configure, and run the TLA5000 to provide a first look at key signals on their target system.

Note: Point out the preference choices in the top-right of the screen – the user can choose to run the EasySetup wizard at start-up or not.

• Click Yes to start the EasySetup Wizard

3. Connect the probe to the TLA5000 logic analyzer as directed.

• Click Next to continue the wizard



4. Connect the probe to the TLA5000 Demo Board as directed

Note: This screen is intended to guide those users using flying leadsets.

Note: P6418 Probe – Connect the A3 podlet to J1 making sure you get the podlet ground oriented properly. Connect the CKO pod to J3 again making sure the ground is oriented correctly.

• Click Next to continue the wizard.

5. Set the Probe Voltage Threshold of the logic analyzer

The EasySetup wizard now looks at the signal activity on the probe you’ve just attached to the TLA5000 and the TLA5000 demo board.

Note: The threshold voltage determines at which voltage the signal is considered a logic low and a logic high.

The Threshold shown is the default value and may not be best for the circuit under test.

• Demonstrate the four ways of setting the threshold: using the pull-down menu to select a known logic family, typing in the value, using the arrows to increase/decrease the value, or by using autoset.

• Click Autoset to set the Voltage Thresholds. Autoset should set the threshold to about 2V

Tektronix is the only company that offers Autoset on a logic analyzer.



• Click Next to continue the Wizard

6. The logic analyzer is now configured to take a timing acquisition using the parameters described.



Note: Now is a good time to briefly explain the differences between a state and a timing acquisition.

There are two basic types of clocking modes supported by the logic analyzer - asynchronous and synchronous.

Asynchronous Clocking: With asynchronous clocking, the logic analyzer generates its own internal clock signal that is used to sample data from the system under test. All samples are taken at regular, fixed intervals. Acquisitions taken with asynchronous clocking are often referred to as timing acquisitions.

Synchronous Clocking: With synchronous clocking, the system under test generates a clock signal that is used to drive when the logic analyzer samples are taken. The clock signal may be a fixed frequency, or it may be highly erratic. Acquisitions taken with synchronous clocking are often referred to as state acquisitions.

• Click Finish - Simple as that – your first logic analyzer acquisition is complete.

Note: The EasySetup wizard creates a new waveform window named EasySetup1. Make sure that you use this window in the next steps – not the Waveform1 window. You may even want to delete the Waveform1 window to avoid any possible confusion.

7. Go to the EasySetup1 Waveform Window

• Maximize the EasySetup1 Window

• Zoom in to about 2ns/div



“The traces in white are what you would see with other monolithic logic analyzers. Only with the magnifying glass that MagniVu offers can you see what is really going on with your data and how fast it really is changing. The TLA5000 not only offers better deep-memory timing resolution but has the added advantage of MagniVu.”

Agilent 1680A TLA5000

Deep-Memory Timing 400MHz/800MHz

(Full/Half Channels)

500MHz/1GHz/2GHz

(Full/Half/Quarter Channels)

High-Resolution Timing N/A 125 ps MagniVu

• Explain elements of the EasySetup1 Waveform Window. Some potential topics: Explain difference between the deep-memory traces (in white) and the MagniVu traces (in blue); Resize waveform traces; Bus Form vs. Individual signals. Expand and collapse the A3.

Glitch Trigger

Application Story: After using EasySetup to quickly acquire data, let’s continue our debug of the board. Our board crashes periodically and we suspect that one of our key control buses may have some sort of signal integrity problem. The bus of interest is 4-bits wide. We will now use the TLA5000 to find and isolate any potential termination, crosstalk, or ground bounce problems.

8. Go to the Setup Window



• Remove the A3(3-0) signals from the A3 group. You can optionally rename the A3 group to something like “control” and give names to the individual bits of the bus.

9. Go to the Trigger Window.

• Explore the EasyTrigger list and explain the basic concept of EasyTriggers. I like to pick one such as Trigger on A followed by B within N samples. Fill in the some of the values and show how the EasyTrigger is translated to the PowerTrigger.

Note: If you can, now is a good time to explain the State-based triggering of the TLA family.

• From the EasyTrigger list, select Trigger on glitch (Simple Events section)

• Select the Define Glitches… button to select which signals can cause a glitch trigger. Since we only want to look for glitches on the A3 bus, uncheck CK0 and A2.

Note: Make sure you point out the power of Glitch Trigger. In this case, we are using the glitch trigger to look at a 4-bit bus to detect a glitch on any of the signals. We could also use



Glitch trigger to monitor a 32-bit bus looking for glitches on any of the signals. You don’t need to specify before hand (like you do for a scope) which signal you want to monitor for a glitch.

• Select Force Main Prefill to fill the TLA acquisition memory before triggering

• Make sure the Trigger Position is set to 50%.

Note: The TLA will now look for 2 or more edges during the sample interval.

10. Go to the EasySetup 1 Waveform Window

• Start an acquisition by clicking on the green Run button or by pressing the Run/Stop button on the TLA5000 front panel.

• Zoom in to 10ns/div on the waveform detail with the Zoom In button.



“With other monolithic logic analyzers, this is what you would see. You would be able to trigger on the glitch but you not be able to determine which one of our 3 control bits had the problem - you would only know that at this point in time one of the signals on this had a glitch. To further troubleshoot the problem, you would need to grab a scope and check them one at a time using the scope’s glitch trigger. This could take a long time if you were checking a 16-bit control bus or a 32-bit address bus. Wouldn’t it be nice to be able to determine which specific signal has the glitch?”

The following excerpt is taken from the 1680A’s on-line help:


• Change the Acquire mode to Glitches. The TLA will now look for 2 or more edges during the sample interval.



• Start an acquisition by clicking on the green Run button or by pressing the Run/Stop button on the TLA5000 front panel.



• The A3 bus is four signal lines: A3(7..4). By expanding the bus (Right click on the A3 waveform label and select Expand Channels) we can quickly see that the A3(6) signal is the signal with the glitch.



“Like other monolithic logic analyzers, the TLA5000 can trigger on a glitch but it can go one step further and by using the glitch acquire mode, actually mark the signal that has a glitch. The red flag here is used to visually represent that a glitch was detected. No other logic analyzer can do this. We can do this because of our innovative MagniVu architecture. All TLA logic analyzers have MagniVu high-speed timing. The TLA5000 MagniVu can sample up to 8 GHz or 125 ps. MagniVu is always acquiring data through the same logic analyzer probes.

Note: The A3(6) is the signal with the glitch.



Note: The TLA5000 series uses a single 8 GHz sampler that is used to look for multiple edges during the 4 ns glitch deep timing.

Logic Analyzer Triggers On and Displays Glitches

136 ChLogic

AnalyzerProbe

8 GHz Sampler

250 psGlitch Det.

TLA 4 ns Deep Timing at 16 Mb

Red bar indicates multiple transitions between 4 ns sample points

One SamplePeriod

Glitch is more than one transition between samples

Sample

Data

Logic Analyzer Triggers On and Displays GlitchesLogic Analyzer Triggers On and Displays Glitches

136 ChLogic

AnalyzerProbe

8 GHz Sampler

250 psGlitch Det.

TLA 4 ns Deep Timing at 16 Mb

Red bar indicates multiple transitions between 4 ns sample points

One SamplePeriod

Glitch is more than one transition between samples

Sample

Data

Three measurement activities are occurring simultaneously.

1. A data sample (up to 4M) is stored every 4 ns.

2. A glitch indicator is stored for every sample on every channel that has a glitch.

MagniVu

Note: MagniVu is like having a second logic analyzer acquiring all the data, all the time, on all the channels through the same probe and it stores up to 16 Kbits samples and provides the high resolution timing details you need. MagniVu can be set to sample at 125, 250, 500 ps and 1 ns. The trigger position is adjustable and is independent of the logic analyzer’s system trigger.

Note: We will use the high-resolution of MagniVu to get a better idea of the nature of our glitch.



• Expand the MagniVu: A3 bus by right clicking its waveform label and select Expand Channels

• Resize the MagniVu: A3(6) trace.

Note: The glitch details are clearly seen with MagniVu 8 GHz (125 ps) timing. The TLA5000 is the world’s fastest monolithic timing logic analyzer.

• Zoom in to 2ns/div.

• Use the cursors to measure the glitch width.



“With the unique glitch acquire mode of the TLA5000 we were able to pinpoint the bad signal and then using MagniVu, something no other monolithic logic analyzer offers, we can now see a little more information about the glitch.”

Using iView to examine the glitch

Application Story: The next step in the debugging our 4-bit control bus is to measure the analog characteristics of the A3(6) glitch. To do this, we will have the logic analyzer trigger on the glitch to isolate the fault and use iView to trigger the oscilloscope and to display the analog waveform on the TLA5000 logic analyzer.

12. Go to the EasySetup 1 Window

• Set the Time/Div back to 20ns by pressing the Zoom Out button (or turning the Horizontal scale knob).



TDS5104

13. Power-up the TDS5104 oscilloscope if not already powered-up.

14. Attach the scope probe to channel 1 of the TDS5104 and probe J7 on the TLA5000 Demo Board. Attach the ground lead nearby.

Note: The arrows by the scope probe points DO NOT indicate GND. These arrows point to the signals. All of the GNDS are located on the pins towards the center of the board. The signals are on the pins towards the outside of the board.

J9J1

J3

Scope Probe Points

J5 (FF-D)J7 (Burst)J4 (FF-Q)J12 (Stub)

J10 (Pulse)J11 (Xtalk1)

J8 (Xtalk2)J6 (FF-Clk)

USB

J9J1

J3

Scope Probe Points


J10 (Pulse)J11 (Xtalk1)

J8 (Xtalk2)J6 (FF-Clk)

USB



15. Go to the Setup menu

• Press the Default Setup button

Attach the scope probe to channel 1 of the TDS5104 and probe J7 on the TLA5000 demo board. Attach the ground lead nearby.

• Press Autoset

16. You can load the saved setup – TDS5K Setup for TLA5000 Golden Demo - Metastable with TLA5000 Demo Board.set or you can follow steps 17 - 18. If you load the saved setup, skip to Step 19.

17. Go to the horizontal menu

• Horizontal – Set trigger position to 95% • Change the scale to 200 ns

18. Go the Vertical Menu

• Select Channel 1. • Change the Scale to 750 mV per division • Set the Offset to 3V.

Using the iView Wizard

Note: The process of adding an external oscilloscope to the TLA5000 is easy with the iView Setup wizard.

19. Start the iView Wizard

The process of adding an external oscilloscope to the TLA5000 is easy with the iView Setup wizard.

• Select TLA System->Add External Oscilloscope. This will start the iView setup wizard.



• Select the TDS5104 and Click Next.

Other scope vendors have recently tried to demo their ability to use iView to link to the TLA. If your customer brings this up, your best response is FUD – (1) “The iView (iLink) capability has superior customer value in part because of the simplicity and consistency of operation that it provides. Recent events have convinced us that we cannot provide either the simplicity or consistency with Non-Tektronix Oscilloscopes. Looking to the future, the iView capability will enforce this restriction."



• The next screen shows how to attach the iView cable to the TLA5000. Attach the cable as directed and Click Next.

• The next screen shows how to connect the iView cable to the TDS5104. Attach the cable as directed and Click Next.

• The next screen determines how the TLA5000 detects the GPIB address of the TDS5000. Choose the default and recommended selection of having the TLA5000 automatically detect the GPIB address of the TDS5104. Click Next



• We want to see the analog waveform correlated with the digital signals so place the TDS5104 data into the waveform display named EasySetup1 (the default choice). Click Next.

• Configure the TLA so that it generates the trigger for the TDS5104 (default setting). Click Next.



• The final screen of the iView setup wizard summarizes all of the settings that will be applied to the TLA5000 and TDS5104. Click Finish.


• After completing the iView Setup wizard, the oscilloscope channels have been added to the EasySetup1 waveform display.



• Since we are only using Channel 1 of the TDS5104, we will delete all the other scope channels and resize the TDS5104: Channel1 waveform

Using iView to Characterize the Problem

• Run the TLA by clicking on the green Run button or by pressing the Run/Stop button on the front panel of the instrument.

Note: Analog data is acquired by the TDS5104 and displayed on the TLA5000



• Now let’s zoom back in to see the details of our glitch. Zoom in on the waveform details with

the Zoom In button.



Note: You may need to adjust the alignment of the Analog and Digital data. See page Appendix A: iView Time Correlation on page 31 for details on how to do this.

Setup Hold Triggering

Application Story: We now have successfully captured a symptom of the problem. We need to now move from symptom to root cause. What could be causing this glitch? It could one of several things: crosstalk, ground bounce, signal termination issues, or maybe a setup or hold violation on the input side of this circuit. The engineer’s job now is to form hypothesis and test them. The goal of a test tool is to allow him to quickly prove or disprove his hypothesis. Let’s test our last possibility – the glitch is being caused by a setup/hold problem. We will set the TLA5000 to trigger on any setup or hold violations. This capability is unique to the TLA family of logic analyzers. Agilent does not have this capability


• Load the TLA5000 GD for HW Setup 1.tla system file (File->Load System…) • Change the Clocking to External

Note: This is a good time to reiterate the difference between internal and external clocking.



• Change the Acquire mode to Setup/Hold

22. Go to the Trigger Window

• In the Easy Trigger Tab Simple Events selection, select Trigger on Group setup/hold Violation

• Click on Define Violation. Uncheck FF-CLK and FF-Q. Set the setup time for FF-D to 1.875 ns and the hold time to 1.125 ns

Note: The exact values are not important.

• Make sure Force Main Prefill is checked • Set Trigger Position to 50%




• Run an Acquisition • Change Time/Div to 20ns

• You can use cursors to measure the time between the rising edge of the FF-CLK signal and the change in the FF-D input and see that it is in violation of the specifications.

The ability to acquire and trigger on setup/hold violations is a feature that can only be found in TLA logic analyzers. Agilent does not have this capability which can greatly simplify and speed-up validation. Each microprocessor or bus has AC specifications that state the



required setup/hold times. For example, the PCI bus states XXXX. On Friday night, simply set-up up the TLA5000 to trigger on and display setup/hold violations, start up the system under test and the logic analyzer – then go home for the weekend. When you come back Monday morning, if the TLA5000 never triggered, your system never had a setup or hold violation. If it did trigger, The AT1680 does not have the capability to trigger on a setup/hold violation. This method is much simpler than using a scope to validate a signal at a time.

Another good landmine at this point is to point out the fact that we used the capability to acquire both state and timing information at the same time. Once we detected the setup/hold violation, we turned to MagniVu to get the detailed timing information (at 125pS resolution). Agilent can not do simultaneous state and timing acquisitions with the 1680.

Setup Hold Fault Counting

Application Story: We now have used the TLA5000 to find the symptom and the root cause of the problem on our control bus. We’ve seen that our glitch is caused by a setup/hold problem on our board. You can see that even though we triggered on a setup/hold violation, it did not cause a metastable event. Vendors have worked really hard to make their devices immune to metastable events but the more times we violate the setup/hold specification, the more likely we will have a metastable event. Let’s use some more features of the TLA5000 to determine how frequently we have a setup/hold violation. This will give us insight into how bad the problem could be.

Go to the Setup Window

24. Load TLA5000 GD for HW Setup 2.tla setup. (File->Load System…)



Note: Explain the basics of this trigger program. The basic idea is that we will use a timer to count to 5s and count all setup/hold violations that occur within that timeframe. Counter 2 is used to count the number of setup/hold faults.

25. Open the status window by clicking the Status button icon.

• The status monitor gives a snapshot into the system as it is running

• Press the run button and while the acquisition is running point out the progress on the Status Monitor. After 5 seconds, the acquisition will stop.

In this case, we had over 6 million setup/hold violations.



Summary

This TLA5000 Golden Demo allows you to highlight several of the key advantages of the TLA5000:

• Glitch triggers and flags

• iView

• Setup/Hold triggers and flags

Remember: practice makes perfect.



Appendix A: iView Time Correlation The iView time correlation specification from the TLA manual is specified in Table A-73 below.

Time correlation uncertainty = 2 ns + logic analyzer sample period + external oscilloscope sample period.

Time correlation uncertainty for this measurement is 2 ns + 4 ns + .800 ns = 6.8 ns.

Manual time alignment can be done by using Cursor 1 and Cursor 2 to measure the time from the leading edge of LA 1: Mag_A2(5) to the greater than 2.0 V level on the leading edge of theTDS5104: Channel1 waveform. The delta time in this example is 2.8 ns.

1. Go to the Waveform Window

• Time Alignment in the Data menu.



• Select the TDS5104 Data Source and change the Adjust time offset to negative measured value (in this example –2.8 ns)



• The TDS5104: Channel1 waveform has been shifted 2.8 ns to the left in alignment with the MagniVu: A3(6) waveform.



Appendix B: TLA5000 Demo Board Description

Meet the TLA5000 Demo BoardJ9J1

J3

Scope Probe Points


J10 (Pulse)J11 (Xtalk1)J8 (Xtalk2)J6 (FF-Clk)

USB

J9J1

J3

Scope Probe Points


J10 (Pulse)J11 (Xtalk1)J8 (Xtalk2)J6 (FF-Clk)

USB



J1 – P6417 & P6418 Logic Analyzer Probe

ThresholdLA ProbeSignalJ1

A3(7)

A3(6)

A3(5)

A3(4)

A3(3)

A3(2)

A3(1)

A3(0)

Pin 16

Pin 14

Pin 12

Pin 10

Pin 8

Pin 6

Pin 4

Pin 2

FF-D

BURST

FF-Q

CLOCK_DIV2

STUB

PULSE

XTALK1

XTALK2

TTL

LVPECL

TTL

TTL

LVPECL

LVPECL

LVPECL

LVPECL


A3(7)

A3(6)

A3(5)

A3(4)

A3(3)

A3(2)

A3(1)

A3(0)

Pin 16

Pin 14

Pin 12

Pin 10

Pin 8

Pin 6

Pin 4

Pin 2

FF-D

BURST

FF-Q

CLOCK_DIV2

STUB

PULSE

XTALK1

XTALK2

TTL

LVPECL

TTL

TTL

LVPECL

LVPECL

LVPECL

LVPECL

Pin 2

Pin 16


CK0Pin 2 Clock TTL


CK0Pin 2 Clock TTL

J9 – P6419 Logic Analyzer Probe

TTLCK0FF-CLK

TTLA2(0)FF-D

LVPECLA2(1)BURST

TTLA2(2)FF-Q

TTLA2(3)COUNT3

J9

ThresholdLA ProbeSignal

A2(4)

A2(5)

A2(6)

A2(7)

A3(2)

A3(4)

A3(6)

A3(7)

COUNT2

COUNT1

COUNT0

CLOCK_DIV2

STUB

PULSE

XTALK1

XTALK2

TTL

TTL

TTL

TTL

LVPECL

LVPECL

LVPECL

LVPECL

TTLCK0FF-CLK

TTLA2(0)FF-D

LVPECLA2(1)BURST

TTLA2(2)FF-Q

TTLA2(3)COUNT3

J9

ThresholdLA ProbeSignal

A2(4)

A2(5)

A2(6)

A2(7)

A3(2)

A3(4)

A3(6)

A3(7)

COUNT2

COUNT1

COUNT0

CLOCK_DIV2

STUB

PULSE

XTALK1

XTALK2

TTL

TTL

TTL

TTL

LVPECL

LVPECL

LVPECL

LVPECL



Scope Probe Points

ConnectorSignal

J6J8

J11J10J12J4J7J5

FF-CLKXTALK2XTALK1PULSESTUBFF-Q

BURSTFF-D

ConnectorSignal

J6J8

J11J10J12J4J7J5

FF-CLKXTALK2XTALK1PULSESTUBFF-Q

BURSTFF-D

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