tle202x-ep, tle202xa-ep excalibur high-speed low-power precision operational · pdf...

TLE202x-EP, TLE202xA-EPEXCALIBUR HIGH-SPEED LOW-POWER PRECISION

OPERATIONAL AMPLIFIERS

�

SGLS235D− FEBRUARY 2004 − REVISED SEPTEMBER 2010

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

� Controlled Baseline− One Assembly/Test Site, One Fabrication

Site

� Extended Temperature Performance of−40°C to 125°C

� Also Available in −55°C to 125°C� Enhanced Diminishing Manufacturing

Sources (DMS) Support

� Enhanced Product-Change Notification

� Qualification Pedigree†

� Supply Current . . . 300 μA Max† Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extendedtemperature range. This includes, but is not limited to, HighlyAccelerated Stress Test (HAST) or biased 85/85, temperaturecycle, autoclave or unbiased HAST, electromigration, bondintermetallic life, and mold compound life. Such qualificationtesting should not be viewed as justifying use of this componentbeyond specified performance and environmental limits.

� High Unity-Gain Bandwidth . . . 2 MHz Typ

� High Slew Rate . . . 0.45 V/μs Min

� Supply-Current Change Over Full TempRange . . . 10 μA Typ at VCC ± = ± 15 V

� Specified for Both 5-V Single-Supply and±15-V Operation

� Phase-Reversal Protection

� High Open-Loop Gain . . . 6.5 V/μV(136 dB) Typ

� Low Offset Voltage . . . 100 μV Max

� Offset Voltage Drift With Time0.005 μV/mo Typ

� Low Input Bias Current . . . 50 nA Max

� Low Noise Voltage . . . 19 nV/√Hz Typ

description

The TLE202x and TLE202xA devices are precision, high-speed, low-power operational amplifiers using a newTexas Instruments Excalibur process. These devices combine the best features of the OP21 with highlyimproved slew rate and unity-gain bandwidth.

The complementary bipolar Excalibur process utilizes isolated vertical pnp transistors that yield dramaticimprovement in unity-gain bandwidth and slew rate over similar devices.

The addition of a bias circuit in conjunction with this process results in extremely stable parameters with bothtime and temperature. This means that a precision device remains a precision device even with changes intemperature and over years of use.

This combination of excellent dc performance with a common-mode input voltage range that includes thenegative rail makes these devices the ideal choice for low-level signal conditioning applications in eithersingle-supply or split-supply configurations. In addition, these devices offer phase-reversal protection circuitrythat eliminates an unexpected change in output states when one of the inputs goes below the negative supplyrail.

A variety of options are available in small-outline packaging for high-density systems applications.

The Q-suffix devices are characterized for operation over the full automotive temperature range of −40°C to125°C.

Copyright © 2007 Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TLE202x-EP, TLE202xA-EPEXCALIBUR HIGH-SPEED LOW-POWER PRECISIONOPERATIONAL AMPLIFIERS

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2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ORDERING INFORMATION

TAVIOmaxAT 25°C PACKAGE† ORDERABLE

PART NUMBERTOP-SIDEMARKING

300 μV SOIC (D) Tape and reel TLE2021AQDREP 2021AE

500 μV SOIC (D) Tape and reel TLE2021QDREP 2021QE

40°C to 125°C300 μV SOIC (D) Tape and reel TLE2022AQDREP 2022AE

−40°C to 125°C500 μV SOIC (D) Tape and reel TLE2022QDREP 2022QE

750 μV SOP (DW) Tape and reel TLE2024AQDWREP 2024AE

1000 μV SOP (DW) Tape and reel TLE2024QDWREP 2024QE

−55°C to 125°C 500 μV SOIC (D) Tape and reel TLE2021MDREP 2021ME† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available

at www.ti.com/sc/package.

1

2

3

4

8

7

6

5

OFFSET N1IN−IN+

VCC − /GND

NCVCC+OUTOFFSET N2

TLE2021D PACKAGE(TOP VIEW)

1

2

3

4

8

7

6

5

1OUT1IN−1IN+

VCC − /GND

VCC+2OUT2IN−2IN+

TLE2022D PACKAGE(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1OUT1IN−1IN+VCC +2IN+2IN−

2OUTNC

4OUT4IN−4IN+VCC − /GND3IN+3IN−3OUTNC

TLE2024DW PACKAGE

(TOP VIEW)

NC − No internal connection



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equivalent schematic (each amplifier)

IN −Q23 Q25

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

Q11

Q12

Q13

Q14

Q15

Q16

Q17

Q18

Q19

Q20

Q21

Q22

Q24

Q26

Q27

Q28

Q29

Q30

Q31

Q32

Q33

Q34

Q35

Q36

Q37

Q38

Q39

Q40D1 D2

D3

D4IN +

OUT

OFFSET N1(see Note A)

VCC+

VCC− /GND

C1

R1

R2

R3

R4

R5

C2

R6

R7

C4

C3

OFFSET N2(see Note A)

ACTUAL DEVICE COMPONENT COUNT

COMPONENT TLE2021 TLE2022 TLE2024

Transistors 40 80 160

Resistors 7 14 28

Diodes 4 8 16

Capacitors 4 8 16


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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage, VCC+ (see Note 1) 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC− (see Note 1) −20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage, VID (see Note 2) ±0.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (any input, see Note 1) ±VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO (each output): TLE2021 ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLE2022 ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TLE2024 ±40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Total current into VCC+ 80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current out of VCC− 80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA: Q suffix −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, RθJA (see Notes 4 and 5): D (8-pin) 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW (16-pin) 57°C/W. . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 3 seconds: D package 300°C. . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC +, and VCC− .2. Differential voltages are at IN+ with respect to IN−. Excessive current flows if a differential input voltage in excess of approximately

±600 mV is applied between the inputs unless some limiting resistance is used.3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable

ambient temperature is PD = (TJ(max) − TA)/θJA. Selecting the maximum of 150°C can affect reliability.5. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

MIN MAX UNIT

Supply voltage, VCC ±2 ±20 V

Common mode input voltage VVCC = ± 5 V 0 3.2

VCommon-mode input voltage, VIC VCC ± = ±15 V −15 13.2V

Operating free air temperature TQ suffix −40 125

°COperating free-air temperature, TAM suffix −55 125

°C



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TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwisenoted)

PARAMETER TEST CONDITIONS T †TLE2021-EP TLE2021A-EP

UNITPARAMETER TEST CONDITIONS TA†

MIN TYP MAX MIN TYP MAXUNIT

V Input offset voltage25°C 120 600 100 400

VVIO Input offset voltageFull range 800 550

μV

αVIO

Temperature coefficient of input offset voltage

Full range 2 2 μV/°C

Input offset voltagelong-term drift (see Note 4)

VIC = 0, RS = 50 Ω 25°C 0.005 0.005 μV/mo

I Input offset current25°C 0.2 6 0.2 6

nAIIO Input offset currentFull range 10 10

nA

I Input bias current25°C 25 70 25 70

nAIIB Input bias currentFull range 90 90

nA

VCommon-mode input

R 50 Ω

25°C0to

3.5

−0.3to4

0to

3.5

−0.3to4

VVICRCommon mode inputvoltage range RS = 50 Ω

Full range0to

3.2

0to

3.2

V

VHigh-level output 25°C 4 4.3 4 4.3

VVOHHigh level output voltage

R 10 kΩFull range 3.8 3.8

V

VLow-level output

RL = 10 kΩ25°C 0.7 0.8 0.7 0.8

VVOLLow level output voltage Full range 0.95 0.95

V

ALarge-signal differential V 1 4 V to 4 V R 10 kΩ

25°C 0.3 1.5 0.3 1.5V/ VAVD differential

voltage amplificationVO = 1.4 V to 4 V, RL = 10 kΩ

Full range 0.1 0.1V/μV

CMRRCommon-mode

V V min R 50 Ω25°C 85 110 85 110

dBCMRRCommon mode rejection ratio VIC = VICRmin, RS = 50 Ω

Full range 80 80dB

kSupply-voltage rejection ratio V 5 V to 30 V

25°C 105 120 105 120dBkSVR rejection ratio

(ΔVCC ± /ΔVIO)VCC = 5 V to 30 V

Full range 100 100dB

I Supply current25°C 170 300 170 300

AICC Supply currentFull range 300 300

μA

ΔICC

Supply currentchange over operatingtemperature range

VO = 2.5 V, No load

Full range 9 9 μA

† Full range is −40°C to 125°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated

to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.


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PARAMETER TEST CONDITIONS T †TLE2021MDREP


MIN TYP MAXUNIT

25°C 120 600V I t ff t lt

25°C 120 600VVIO Input offset voltage

25 C 120 600μVVIO Input offset voltage

Full range 850μV

αVIO Temperature coefficient of input offset voltage Full range 2 μV/°C

Input offset voltage long-term drift (see Note 4)VIC = 0 RS = 50 Ω 25°C 0.005 μV/mo

I Input offset current

VIC = 0, RS = 50 Ω25°C 0.2 6

nAIIO Input offset currentFull range 10

nA

I Input bias current25°C 25 70

nAIIB Input bias currentFull range 90

nA

V Common mode input voltage range R 50 Ω

25°C0to

3.5

−0.3to4

VVICR Common-mode input voltage range RS = 50 Ω

Full range0to

3.2

V

V High level output voltage25°C 4 4.3

VVOH High-level output voltage

R 10 kΩFull range 3.8

V

V Low level output voltage

RL = 10 kΩ25°C 0.7 0.8

VVOL Low-level output voltageFull range 0.95

V

A Large signal differential voltage amplification V 1 4 V to 4 V R 10 kΩ25°C 0.3 1.5

V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V, RL = 10 kΩFull range 0.1

V/μV

CMRR Common mode rejection ratio V V min R 50 Ω25°C 85 110

dBCMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 ΩFull range 80

dB

k Supply voltage rejection ratio (ΔV /ΔV ) V 5 V to 30 V25°C 105 120

dBkSVR Supply-voltage rejection ratio (ΔVCC ± /ΔVIO) VCC = 5 V to 30 VFull range 100

dB

I Supply current25°C 170 300

AICC Supply currentVO = 2 5 V No load

Full range 300μA

ΔICCSupply current change over operatingtemperature range

VO = 2.5 V, No load

Full range 9 μA





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TLE2021 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwisenoted)






μV

αVIO

Temperature coefficient of input offset voltage



VIC = 0, RS = 50 Ω 25°C 0.006 0.006 μV/mo



nA



nA

VCommon-mode input

R 50 Ω

25°C−15

to13.5

−15.3to14

−15to

13.5

−15.3to14


Full range−15

to13.2

−15to

13.2

V

VMaximum positivepeak output voltage

25°C 14 14.3 14 14.3VVOM + peak output voltage

swingR 10 kΩ

Full range 13.8 13.8V

VMaximum negativepeak output voltage

RL = 10 kΩ25°C −13.7 −14.1 −13.7 −14.1

VVOM − peak output voltageswing Full range −13.6 −13.6

V

ALarge-signal differential voltage V ±0 V R 10 kΩ

25°C 1 6.5 1 6.5V/ VAVD differential voltage

amplificationVO = ±0 V, RL = 10 kΩ


CMRRCommon-mode

V V min R 50 Ω25°C 100 115 100 115


Full range 96 96dB

kSupply-voltage rejection ratio V ± 2 5 V to ±15 V

25°C 105 120 105 120dBkSVR rejection ratio

(ΔVCC ± /ΔVIO)VCC ± = ± 2.5 V to ±15 V

Full range 100 100dB



μA

ΔICC

Supply currentchange over operating temperaturerange

VO = 0, No load

Full range 10 10 μA




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PARAMETER TEST CONDITIONS T †TLE2021MDREP

PARAMETER TEST CONDITIONS TA†

MIN TYP MAX UNIT

25°C 120 500V I t ff t lt

25°C 120 500VVIO Input offset voltage

25 C 120 500μVVIO Input offset voltage

Full range 800μV

αVIO Temperature coefficient of input offset voltage Full range 2 μV/°C

Input offset voltage long-term drift (see Note 4)VIC = 0 RS = 50 Ω 25°C 0.006 μV/mo

I Input offset current

VIC = 0, RS = 50 Ω25°C 0.2 6

nAIIO Input offset currentFull range 10

nA

I Input bias current25°C 25 70

nAIIB Input bias currentFull range 90

nA

V Common mode input voltage range R 50 Ω

25°C−15

to13.5

−15.3to14

VVICR Common-mode input voltage range RS = 50 Ω

Full range−15

to13.5

V

V Maximum positive peak output voltage swing25°C 14 14.3

VVOM+ Maximum positive peak output voltage swing

R 10 kΩFull range 13.8

V

V Maximum negative peak output voltage swing

RL = 10 kΩ25°C −13.7 −14.1

VVOM− Maximum negative peak output voltage swingFull range −13.6

V

A Large signal differential voltage amplification V ±0 V R 10 kΩ25°C 1 6.5

V/ VAVD Large-signal differential voltage amplification VO = ±0 V, RL = 10 kΩFull range 0.5

V/μV

CMRR Common mode rejection ratio V V min R 50 Ω25°C 100 115

dBCMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 ΩFull range 96

dB

k Supply voltage rejection ratio (ΔV /ΔV ) V ± 2 5 V to ±ℑ° V25°C 105 120

dBkSVR Supply-voltage rejection ratio (ΔVCC ± /ΔVIO) VCC± = 2.5 V to ±ℑ° VFull range 100

dB

I Supply current25°C 200 350

AICC Supply currentVO = 0 No load

Full range 350μA

ΔICCSupply current change over operatingtemperature range

VO = 0, No load

Full range 10 μA





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V Input offset voltage25°C 600 400


μV

Temperature coefficient ofFull range 2 2 V/°CαVIO

Temperature coefficient ofinput offset voltage Full range 2 2 μV/°C

Input offset voltageV 0 R 50 Ω 25°C 0 005 0 005 V/mo

Input offset voltagelong-term drift (see Note 4) VIC = 0, RS = 50 Ω 25°C 0.005 0.005 μV/mo



nA



nA

0 −0.3 0 −0.325°C

0to

−0.3to

0to

−0.3to

VCommon-mode input

R 50 Ω

25 C to3.5

to4

to3.5

to4


0 0V

voltage range

Full range0to

0toFull range to

3.2to

3.2

V High level output voltage25°C 4 4.3 4 4.3



V


RL = 10 kΩ25°C 0.7 0.8 0.7 0.8

VVOL Low-level output voltageFull range 0.95 0.95

V

ALarge-signal differential

V 1 4 V to 4 V R 10 kΩ25°C 0.3 1.5 0.4 1.5

V/ VAVDLarge signal differentialvoltage amplification VO = 1.4 V to 4 V, RL = 10 kΩ


CMRRCommon-mode rejection

V V min R 50 Ω25°C 85 100 87 102


Full range 80 82dB

kSupply-voltage rejection

V 5 V to 30 V25°C 100 115 103 118

dBkSVRSupply voltage rejection ratio (ΔVCC ± /ΔVIO) VCC = 5 V to 30 V

Full range 95 98dB



μA

ΔISupply current change overoperating temperature

VO = 2.5 V, No load

Full range 37 37 μAΔICC operating temperaturerange





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μV

αVIOTemperature coefficient

Full range 2 2 V/°CαVIOTemperature coefficientof input offset voltage Full range 2 2 μV/°C

Input offset voltagelong term drift V 0 R 50 Ω 25°C 0 006 0 006 V/molong-term drift(see Note 4)

VIC = 0, RS = 50 Ω 25°C 0.006 0.006 μV/mo



nA



nA

−15 −15.3 −15 −15.325°C

−15to

−15.3to

−15to

−15.3to

VCommon-mode input

R 50 Ω

25 C to13.5

to14

to13.5

to14


−15 −15Vvoltage range

Full range−15

to−15

toFull range to13.2

to13.2

VMaximum positive peak 25°C 14 14.3 14 14.3

VVOM +Maximum positive peakoutput voltage swing


V

VMaximum negative peak

RL = 10 kΩ25°C −13.7 −14.1 −13.7 −14.1

VVOM−Maximum negative peakoutput voltage swing Full range −13.6 −13.6

V


V ±10 V R 10 kΩ25°C 0.8 4 1 7

V/ VAVDLarge signal differentialvoltage amplification VO = ±10 V, RL = 10 kΩ

Full range 0.8 1V/μV


V V min R 50 Ω25°C 95 106 97 109

dBCMRRCommon mode rejectionratio VIC = VICRmin, RS = 50 Ω

Full range 91 93dB


V ±2 5 V to ±15 V25°C 100 115 103 118

dBkSVRSupply voltage rejectionratio (ΔVCC ± /ΔVIO) VCC ± = ±2.5 V to ±15 V

Full range 95 98dB



μA

ΔISupply current changeover operating

VO = 0, No load

Full range 60 60 μAΔICC over operating temperature range






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μV

αVIOTemperature coefficientof input offset voltage



VIC = 0, RS = 50 Ω 25°C 0.005 0.005 μV/mo



nA



nA

VCommon-mode input

R 50 Ω

25°C0to

3.5

−0.3to4

0to

3.5

−0.3to4


Full range0to

3.2

0to

3.2

V

V High level output voltage25°C 3.9 4.2 3.9 4.2



V


RL = 10 kΩ25°C 0.7 0.8 0.7 0.8

VVOL Low-level output voltageFull range 0.95 0.95

V


V 1 4 V to 4 V R 10 kΩ25°C 0.2 1.5 0.3 1.5

V/ VAVDLarge signal differentialvoltage amplification VO = 1.4 V to 4 V, RL = 10 kΩ



V V min R 50 Ω25°C 80 90 82 92


Full range 80 82dB

kSVRSupply-voltage rejection

V ±2 5 V to ±15 V25°C 98 112 100 115

dBkSVRSupply voltage rejectionratio (ΔVCC± /ΔVIO) VCC ± = ±2.5 V to ±15 V

Full range 93 95dB



μA

ΔICC

Supply current changeover operating temperature range

VO = 0, No load





�









μV

αVIOTemperature coefficientof input offset voltage



VIC = 0, RS = 50 Ω 25°C 0.006 0.006 μV/mo



nA



nA

VCommon-mode input

R 50 Ω

25°C−15

to13.5

−15.3to14

−15to

13.5

−15.3to14


Full range−15

to13.2

−15to

13.2

V

VMaximum positive peak 25°C 13.8 14.1 13.8 14.2

VVOM +Maximum positive peakoutput voltage swing


V

VMaximum negative peak

RL = 10 kΩ25°C −13.7 −14.1 −13.7 −14.1

VVOM−Maximum negative peakoutput voltage swing Full range −13.6 −13.6

V


V ±10 V R 10 kΩ25°C 0.4 2 0.8 4

V/ VAVDLarge signal differential voltage amplification VO = ±10 V, RL = 10 kΩ



V V min R 50 Ω25°C 92 102 94 105


Full range 88 90dB


V ±2 5 V to ±15 V25°C 98 112 100 115

dBkSVRSupply voltage rejectionratio (ΔVCC ± /ΔVIO) VCC ± = ±2.5 V to ±15 V

Full range 93 95dB



μA

ΔISupply current changeover operating

VO = 0, No load

Full range 85 85 μAΔICC over operating temperature range






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TLE2021 operating characteristics, VCC = 5 V, TA = 25°CPARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT

SR Slew rate at unity gain VO = 1 V to 3 V, See Figure 1 25°C 0.5 V/μs

VEquivalent input noise voltage f = 10 Hz 25°C 21

nV/HzVnEquivalent input noise voltage(see Figure 2) f = 1 kHz 25°C 17

nV/Hz

VPeak-to-peak equivalent input f = 0.1 to 1 Hz 25°C 0.16

VVN(PP)Peak to peak equivalent inputnoise voltage f = 0.1 to 10 Hz 25°C 0.47

μV

In Equivalent input noise current 25°C 0.9 pA/Hz

B1 Unity-gain bandwidth See Figure 3 25°C 1.2 MHz

φm Phase margin at unity gain See Figure 3 25°C 42°

TLE2021 operating characteristics at specified free-air temperature, VCC = ±15 V

PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT

SR Slew rate at unity gain V ±10 V See Figure 125°C 0.45 0.65

V/ sSR Slew rate at unity gain VO = ±10 V, See Figure 1Full range 0.4

V/μs


nV/HzVnEquivalent input noise voltage(see Figure 2) f = 1 kHz 25°C 15

nV/Hz

VPeak-to-peak equivalent input f = 0.1 to 1 Hz 25°C 0.16

VVN(PP)Peak to peak equivalent inputnoise voltage f = 0.1 to 10 Hz 25°C 0.47

μV

In Equivalent input noise current 25°C 0.09 pA/Hz

B1 Unity-gain bandwidth See Figure 3 25°C 2 MHz

φm Phase margin at unity gain See Figure 3 25°C 46°† Full range is −40°C to 125°C for the Q-suffix devices.

TLE2022 operating characteristics, VCC = 5 V, TA = 25°CPARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SR Slew rate at unity gain VO = 1 V to 3 V, See Figure 1 0.5 V/μs

VEquivalent input noise voltage f = 10 Hz 21

nV/√HzVnEquivalent input noise voltage(see Figure 2) f = 1 kHz 17

nV/√Hz

V Peak to peak equivalent input noise voltagef = 0.1 to 1 Hz 0.16

VVN(PP) Peak-to-peak equivalent input noise voltagef = 0.1 to 10 Hz 0.47

μV

In Equivalent input noise current 0.1 pA/√Hz

B1 Unity-gain bandwidth See Figure 3 1.7 MHz

φm Phase margin at unity gain See Figure 3 47°


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TLE2022 operating characteristics at specified free-air temperature, VCC = ±15 VPARAMETER TEST CONDITIONS TA

† MIN TYP MAX UNIT



V/μs

VEquivalent input noise f = 10 Hz 25°C 19

nV/√HzVnEquivalent input noisevoltage (see Figure 2) f = 1 kHz 25°C 15

nV/√Hz

VPeak-to-peak equivalent f = 0.1 to 1 Hz 25°C 0.16

VVN(PP)Peak to peak equivalentinput noise voltage f = 0.1 to 10 Hz 25°C 0.47

μV

In Equivalent input noise current 25°C 0.1 pA/√Hz


φm Phase margin at unity gain See Figure 3 25°C 52°† Full range is −40°C to 125°C.

TLE2024 operating characteristics, VCC = 5 V, TA = 25°CPARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SR Slew rate at unity gain VO = 1 V to 3 V, See Figure 1 0.5 V/μs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz 21

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz 17

nV/√Hz

V Peak to peak equivalent input noise voltagef = 0.1 to 1 Hz 0.16

VVN(PP) Peak-to-peak equivalent input noise voltagef = 0.1 to 10 Hz 0.47

μV

In Equivalent input noise current 0.1 pA/√Hz

B1 Unity-gain bandwidth See Figure 3 1.7 MHz

φm Phase margin at unity gain See Figure 3 47°

TLE2024 operating characteristics at specified free-air temperature, VCC = ±15 V (unless otherwisenoted)

PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT



V/μs


nV/√HzVnEquivalent input noise voltage (see Figure 2) f = 1 kHz 25°C 15

nV/√Hz

V Peak to peak equivalent input noise voltagef = 0.1 to 1 Hz 25°C 0.16

VVN(PP) Peak-to-peak equivalent input noise voltagef = 0.1 to 10 Hz 25°C 0.47

μV

In Equivalent input noise current 25°C 0.1 pA/√Hz


φm Phase margin at unity gain See Figure 3 25°C 52°† Full range is −40°C to 125°C.



�



PARAMETER MEASUREMENT INFORMATION

−15 V

15 V

20 kΩ

VI

20 kΩ

VO

20 kΩ

VI

30 pF(see Note A)

VO

5 V

20 kΩ

−

+

−

+

(a) SINGLE SUPPLY

NOTE A: CL includes fixture capacitance.

(b) SPLIT SUPPLY

30 pF(see Note A)

Figure 1. Slew-Rate Test Circuit

2.5 V

5 V

VO

2 kΩ

20 Ω

20 Ω20 Ω20Ω

VO

−15 V

15 V

2 kΩ

−

+

−

+

(a) SINGLE SUPPLY

(b) SPLIT SUPPLY

Figure 2. Noise-Voltage Test Circuit

2.5 V

−

+

−

+

VO

10 kΩ

15 V

−15 V

10 kΩ

100ΩVIVI

10 kΩ

VO

100 Ω

10 kΩ

5 V

(a) SINGLE SUPPLY


(b) SPLIT SUPPLY

30 pF(see Note A)

30 pF(see Note A)

Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit


�



PARAMETER MEASUREMENT INFORMATION

10 kΩ0.1 μF

10 kΩ

−

+

VO

10 kΩ

VI

5 V

−

+

VO

10 kΩ

VI

15 V

− 15 V

(a) SINGLE SUPPLY


(b) SPLIT SUPPLY

30 pF(see Note A)

30 pF(see Note A)

Figure 4. Small-Signal Pulse-Response Test Circuit

typical values

Typical values presented in this data sheet represent the median (50% point) of device parametric performance.



�



TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

VIO Input offset voltage Distribution 5, 6, 7

IIB Input bias currentvs Common-mode input voltagevs Free-air temperature

8, 9, 1011, 12, 13

II Input current vs Differential input voltage 14

VOM Maximum peak output voltagevs Output currentvs Free-air temperature

15, 16, 1718

VOH High-level output voltagevs High-level output currentvs Free-air temperature

19, 2021

VOL Low-level output voltagevs Low-level output currentvs Free-air temperature

2223

VO(PP) Maximum peak-to-peak output voltage vs Frequency 24, 25

AVD Large-signal differential voltage amplificationvs Frequencyvs Free-air temperature

2627, 28, 29

IOS Short-circuit output currentvs Supply voltagevs Free-air temperature

30 − 3334 − 37

ICC Supply currentvs Supply voltagevs Free-air temperature

38, 39, 4041, 42, 43

CMRR Common-mode rejection ratio vs Frequency 44, 45, 46

SR Slew rate vs Free-air temperature 47, 48, 49

Voltage-follower small-signal pulse response 50, 51

Voltage-follower large-signal pulse response 52 − 57

VN(PP) Peak-to-peak equivalent input noise voltage0.1 to 1 Hz0.1 to 10 Hz

5859

Vn Equivalent input noise voltage vs Frequency 60

B1 Unity-gain bandwidthvs Supply voltagevs Free-air temperature

61, 6263, 64

φm Phase marginvs Supply voltagevs Load capacitancevs Free-air temperature

65, 6667, 6869, 70

Phase shift vs Frequency 26


�




Figure 5

16

12

8

4

3000−3000

600

20

VIO − Input Offset Voltage − μV

Per

cen

tag

e o

f U

nit

s −

%

−600

ÎÎÎÎP Package

VCC ± = ±15 V231 Units Tested From 1 Wafer Lot

DISTRIBUTION OF TLE2021INPUT OFFSET VOLTAGE

TA = 25°C

−450 −150 150 450

Figure 6

−600

Per

cen

tag

e o

f U

nit

s −

%

VIO − Input Offset Voltage − μV

20

2000

−400 −200 0

4

8

12

16

400 600


ÎÎÎÎÎÎÎÎÎÎÎ398 Amplifiers Tested From 1 Wafer LotVCC ± = ±15 V

TA = 25°CP Package

Figure 7

−1

Per

cen

tag

e o

f U

nit

s −

%

VIO − Input Offset Voltage − mV

16

10

−0.5 0 0.5

796 Amplifiers Tested From 1 Wafer LotVCC ± = ±15 VTA = 25°CN Package

4

8

12


Figure 8

TA = 25°C

VCC ± = ±15 V

−35

−30

−25

−20

−15

−10

−5

1050−5−100

15

−40

VIC − Common-Mode Input Voltage − V

IIB −

Inp

ut

Bia

s C

urr

ent −

nA

−15

IBI

TLE2021INPUT BIAS CURRENT

vsCOMMON-MODE INPUT VOLTAGE



�




Figure 9

−15

IIB −

Inp

ut

Bia

s C

urr

ent −

nA


−50

15−10 −5 0 5 10−20

−25

−30

−35

−40

−45

VCC ± = ±15 V

TA = 25°C

IBI



Figure 10

−15

IIB −

Inp

ut

Bia

s C

urr

ent −

nA


−60

15−20

−10 −5 0 5 10

−30

−40

−50

VCC ± = ±15 V

TA = 25°C

ÁÁÁÁ

I IB



Figure 11

−30

−25

−20

−15

−10

−5

1007550250−25−500

125

−35

TA − Free-Air Temperature − °C

IIB −

Inp

ut

Bia

s C

urr

ent −

nA

−75

IBI

TLE2021INPUT BIAS CURRENT†

vsFREE-AIR TEMPERATURE

VCC ± = ±15 VVO = 0VIC = 0

Figure 12

−75

IIB −

Inp

ut

Bia

s C

urr

ent −

nA


−50

125−50 −25 0 25 50 75 100−20

−25

−30

−35

−40

−45

VCC ± = ±15 VVO = 0VIC = 0

IBI



† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.


�




Figure 13TA − Free-Air Temperature − °C

−75

IIB −

Inp

ut

Bia

s C

urr

ent −

nA

−60

−20−50 −25 0 25 50 75 100

−50

−30

−40

125

ÁÁÁÁ

I IB

ÎÎÎÎÎÎÎÎÎ

VO = 0VIC = 0

ÎÎÎÎÎVCC± = ±15 V



Figure 14

TA = 25°CVIC = 0VCC± = ±15 V

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.90.80.70.60.50.40.30.20.10

1

1

|VID| − Differential Input Voltage − V

II −

Inp

ut

Cu

rren

t −

mA

0

INPUT CURRENTvs

DIFFERENTIAL INPUT VOLTAGE

I I

Figure 15

0

VO

M −

Max

imu

m P

eak

Ou

tpu

t Vo

ltag

e −

V

IO − Output Current − mA

16

100

2 4 6 8

2

4

6

8

10

12

14

VCC ± = ±15 VTA = 25°C

ÁÁÁÁÁÁÁÁÁ

V OM

ÎÎÎÎÎÎÎÎ

VOM−

ÎÎÎÎÎÎÎÎ

VOM+

TLE2021MAXIMUM PEAK OUTPUT VOLTAGE

vsOUTPUT CURRENT

Figure 16

0

VO

M| −

Max

imu

m P

eak

Ou

tpu

t Vo

ltag

e −

V

|IO| − Output Current − mA

16

140

2 4 6

2

4

6

8

10

12

14 TA = 25°C

8 10 12

ÁÁÁÁ|V

OM

ÎÎÎÎÎÎ

VOM+

ÎÎÎÎÎÎÎÎ

VOM−

VCC ± = ±15 V


vsOUTPUT CURRENT




�




Figure 17IO − Output Current − mA

0

VO

M −

Max

imu

m P

eak

Ou

tpu

t Vo

ltag

e −

V

16

02 4 6

2

4

6

8

10

12

14

8 10 12

ÎÎÎÎÎÎ

VOM−

14

VCC ± = ±5 V

ÎÎÎVOM +

ÁÁÁÁÁÁ

V OM

ÎÎÎÎTA = 25°C


vsOUTPUT CURRENT

Figure 18

−75TA − Free-Air Temperature − °C

15

12512

−50 −25 0 25 50 75 100

12.5

13

13.5

14

14.5

VOM−

VOM +

VCC ± = ±15 V

TA = 25°CRL = 10 kΩ

MAXIMUM PEAK OUTPUT VOLTAGE†


VO

M| −

Max

imu

m P

eak

Ou

tpu

t Vo

ltag

e −

V

ÁÁÁÁÁÁÁÁÁ

|VO

M

Figure 19

0

VO

H −

Hig

h-L

evel

Ou

tpu

t Vo

ltag

e −

V

IOH − High-Level Output Current − mA

5

−70

−1 −2 −3 −4 −5 −6

1

2

3

4

TA = 25°CVCC = 5 V

ÁÁÁÁV

OH

TLE2021HIGH-LEVEL OUTPUT VOLTAGE

vsHIGH-LEVEL OUTPUT CURRENT

Figure 20IOH − High-Level Output Current − mA

0

VO

H −

Hig

h-L

evel

Ou

tpu

t Vo

ltag

e −

V

5

0−2 −4 −6 −8

1

2

3

4

TA = 25°CVCC = 5 V

ÁÁÁÁ

V OH

−10

TLE2022 AND TLE2024HIGH-LEVEL OUTPUT VOLTAGE

vsHIGH-LEVEL OUTPUT CURRENT



�




Figure 21

−75


5

1254

−50 −25 0 25 50 75 100

4.2

4.6

4.8

VO

H −

Hig

h-L

evel

Ou

tpu

t Vo

ltag

e −

V

VCC = 5 V

RL = 10 kΩ

No Load

HIGH-LEVEL OUTPUT VOLTAGE†


ÁÁÁÁV O

H

4.4

Figure 22

0

VO

L −

Lo

w-L

evel

Ou

tpu

t Vo

ltag

e −

V

IOL − Low-Level Output Current − mA

5

30

0.5 1 1.5 2 2.5

1

2

3

4

VCC = 5 VTA = 25°C

LOW-LEVEL OUTPUT VOLTAGEvs

LOW-LEVEL OUTPUT CURRENT

ÁÁÁÁÁÁ

VO

L

Figure 23


1

1250

−50 −25 0 25 50 75 100

0.25

0.5

0.75

IOL = 1 mA

IOL = 0

VCC ± = ±5 V

LOW-LEVEL OUTPUT VOLTAGE†


VO

L −

Lo

w-L

evel

Ou

tpu

t Vo

ltag

e −

V

ÁÁÁÁÁÁV

OL

Figure 24

100

VO

PP

− M

axim

um

Pea

k-to

-Pea

k O

utp

ut

Volt

age −

V

f − Frequency − Hz

5

1 M0

1

2

3

4

1 k 10 k 100 k

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs

FREQUENCY

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁTA = 25°C

VCC = 5 VRL = 10 kΩÁÁ

ÁÁÁÁV

O(P

P)




�




Figure 25

100f − Frequency − Hz

30

1 M0

5

10

15

20

25

1 k 10 k 100 k

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs

FREQUENCY

ÁÁÁÁÁÁÁÁÁÁÁÁTA = 25°C

VCC ± = ±15 V

RL = 10 kΩ

VO

PP

− M

axim

um

Pea

k-to

-Pea

k O

utp

ut

Volt

age −

V

ÁÁÁÁÁÁÁÁ

V O(P

P)

ÎÎÎÎÎÎÎÎÎÎ

VCC ± = ±15 V

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

RL = 10 kΩCL = 30 pFTA = 25°C

Ph

ase

Sh

iftAVD

180°

60°

200°

160°

140°

120°

100°

80°100

80

60

40

20

0

1 M100 k10 k1 k100−20

10 M

120

f − Frequency − Hz10

LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT

vsFREQUENCY


Phase Shift

VCC = 5 V

− L

arg

e-S

ign

al D

iffe

ren

tial

AV

D Vo

ltag

e A

mp

lific

atio

n −

dB

Figure 26


�




Figure 27

RL = 10 kΩ

ÎÎÎÎÎÎÎÎ

VCC = 5 V

6

4

2

1007550250−25−500

125

10


−75

ÎÎÎÎÎÎÎÎÎÎÎÎ

VCC ± = ±15 V

Vμ

V/

Vo

ltag

e A

mp

lific

atio

n −

8

− L

arg

e-S

ign

al D

iffe

ren

tial

AV

D

TLE2021LARGE-SCALE DIFFERENTIAL VOLTAGE

AMPLIFICATION†


Figure 28


1250

−50 −25 0 25 50 75 100

1

VCC = 5 V

VCC ± = ±15 V

RL = 10 kΩ

2

3

4

5

6

AV

D −

Lar

ge-

Sig

nal

Dif

fere

nti

alÁÁÁÁÁÁ

AV

DV

olt

age

Am

plif

icat

ion

− V

/μV

TLE2022LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION†


Figure 29

VCC ± = ±5 V

6

4

2

1007550250−25−500

125

10


−75


VCC ± = ±15 V


RL = 10 kΩ

Vμ

V/

Vo

ltag

e A

mp

lific

atio

n −

8

A−

Lar

ge-

Sig

nal

Dif

fere

nti

alV

D

TLE2024LARGE-SCALE DIFFERENTIAL VOLTAGE

AMPLIFICATION†


Figure 30

ÎÎÎÎÎVID = 100 mV

TA = 25°C

VID = −100 mV

VO = 08

6

4

2

0

−2

−4

−6

−8

1412108642−10

16

10

|VCC ±| − Supply Voltage − V

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA

0

ÁÁÁÁ

OS

I

TLE2021SHORT-CIRCUIT OUTPUT CURRENT

vsSUPPLY VOLTAGE




�




Figure 31

0

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA


15

16−15

2 4 6 8 10 12 14

VO = 0TA = 25°C

VID = 100 mV−10

−5

0

5

10

I OS

ÎÎÎÎÎVID = −100 mV

TLE2022 AND TLE2024SHORT-CIRCUIT OUTPUT CURRENT

vsSUPPLY VOLTAGE

Figure 32

VO = VCC

TA = 25°C

VID = 100 mV

VID = −100 mV

VO = 0

8

4

0

−4

−8

252015105− 12

30

12

VCC − Supply Voltage − V0

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA

ÁÁÁÁÁÁ

OS

I

TLE2021SHORT-CIRCUIT OUTPUT CURRENT

vsSUPPLY VOLTAGE

Figure 33

0

IOS

− S

ho

rt-C

ircu

it O

utp

ut

CU

rren

t −

mA

VCC − Supply Voltage − V

15

30−15

−10

−5

0

5

10

ÎÎÎÎÎÎÎÎ

TA = 25°C

VID = −100 mV

VID = 100 mV

252015105

VO = VCC

VO = 0

I OS

TLE2022 AND TLE2024SHORT-CIRCUIT OUTPUT CURRENT

vsSUPPLY VOLTAGE

Figure 34

− 75

8

125− 8

− 50 − 25 0 25 50 75 100

− 6

− 4

− 2

0

2

4

6

VID = −100 mV

VCC = 5 V

VID = 100 mVVO = 0

VO = 5 V


IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA

ÁÁÁÁ

OS

I

TLE2021SHORT-CIRCUIT OUTPUT CURRENT†




�




Figure 35

−75

6

125−10

−50 −25 0 25 50 75 100

−8

−6

−4

−2

0

2

4VID = −100 mVVCC = 5 V

VO = 5 V

TA − Free-Air Temperature −°C

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA

I OS

ÎÎÎÎÎVID = 100 mVÎÎÎÎÎÎ

VO = 0

TLE2022 AND TLE2024SHORT-CIRCUIT OUTPUT CURRENT†


Figure 36

−75

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA


12

125−12

−50 −25 0 25 50 75 100

−8

−4

0

4

8VO = 0

VCC ± = ±15 V

VID = −100 mV

VID = 100 mVÁÁÁÁ

OS

I

TLE2021SHORT-CIRCUIT OUTPUT CURRENT†


Figure 37

−75


15

125−15

−10

−5

0

5

10VO = 0

VID = −100 mV

VID = 100 mV

VCC ± = ±15 V

IOS

− S

ho

rt-C

ircu

it O

utp

ut

Cu

rren

t −

mA

−50 −25 0 25 50 75 100

I OS

TLE2022 AND TLE2024SHORT-CIRCUIT OUTPUT CURRENT†


Figure 38

0

ICC

− S

up

ply

Cu

rren

t −

ua


250

160

50

100

150

200

2 4 6 8 10 12 14

VO = 0No Load

ÁÁÁÁ

CC

IA

μ

ÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎÎÎTA = 125°C

ÎÎÎÎÎÎÎÎ

TA = −55°C

TLE2021SUPPLY CURRENT

vsSUPPLY VOLTAGE




�




Figure 39

0

ICC

− S

up

ply

Cu

rren

t −

ua

|VCC ±| − Supply Voltage − V162 4 6 8 10 12 14

VO = 0No Load

TA = 25°C

TA = 125°CTA = −55°C

100

200

300

400

0

500

ÁÁÁÁÁÁ

CC

IA

μ


vsSUPPLY VOLTAGE

Figure 40

0


162 4 6 8 10 12 14

VO = 0

No Load

200

400

600

800

0

1000

TA = 25°C

ÎÎÎÎTA = 125°C

TA = −55°C

− S

up

ply

Cu

rren

t −

μA

I CC


vsSUPPLY VOLTAGE

Figure 41

−75

225

1250

25

50

75

100

125

150

175

200

−50 −25 0 25 50 75 100TA − Free-Air Temperature − °C

No Load

VO = 0


VCC ± = ±2.5 V


VCC ± = ±15 V

ICC

− S

up

ply

Cu

rren

t −

ua

ÁÁÁÁ

CC

IA

μ

TLE2021SUPPLY CURRENT†


Figure 42

−75

500

1250

−50 −25 0 25 50 75 100

VCC ± = ±15 V

VCC ± = ±2.5 V


No LoadVO = 0

400

300

200

100

ICC

− S

up

ply

Cu

rren

t −

ua

ÁÁÁÁ

CC

IA

μ





�




Figure 43

−75 125−50 −25 0 25 50 75 100


1000

0

800

600

400

200


VCC ± = ±15 V

ÎÎÎÎÎVCC ± = ±2.5 V

VO = 0

No Load

− S

up

ply

Cu

rren

t −

μA

I CC



Figure 44

TA = 25°C


VCC = 5 V


VCC ± = ±15 V

100

80

60

40

20

1 M100 k10 k1 k1000

10 M

120


CM

RR

− C

om

mo

n-M

od

e R

ejec

tio

n R

atio

− d

B

10

TLE2021COMMON-MODE REJECTION RATIO

vsFREQUENCY

Figure 45

10

CM

RR

− C

om

mo

n-M

od

e R

ehec

tio

n R

atio

− d

B


120

10 M0

100 1 k 10 k 100 k 1 M

20

40

60

80

100

VCC ± = ±15 V

VCC = 5 V

ÎÎÎÎÎTA = 25°C


vsFREQUENCY

Figure 46

10

CM

RR

− C

om

mo

n-M

od

e R

ejec

tio

n R

atio

− d

B


120

10 M0

100 1 k 10 k 100 k 1 M

20

40

60

80

100

ÎÎÎÎÎÎÎÎ

VCC = 5 V

TA = 25°C


VCC ± = ±15 V


vsFREQUENCY




�




Figure 47

See Figure 1

RL = 20 kΩCL = 30 pF

0.8

0.6

0.4

0.2

1007550250−25−500

125

1


SR

− S

lew

Rat

e −

V/u

s

−75

sμ


VCC ± = ±15 V

ÎÎÎÎÎÎÎÎ

VCC = 5 V

TLE2021SLEW RATE†


Figure 48

−75

SR

− S

lew

Rat

e −

V/ u

s


1

1250

−50 −25 0 25 50 75 100

0.2

0.4

0.6

0.8VCC ± = ±15 V

VCC = 5 V

CL = 30 pFRL = 20 kΩ

See Figure 1

sμ

TLE2022SLEW RATE†


Figure 49

−75

SR

− S

lew

Rat

e −

V/s


1

1250

−50 −25 0 25 50 75 100

0.2

0.4

0.6

0.8

CL = 30 pFRL = 20 kΩ

See Figure 1

ÎÎÎÎÎVCC ± = ±15 V

VCC = 5 V

sμ

V/

TLE2024SLEW RATE†


Figure 50


See Figure 4TA = 25°CCL = 30 pFRL = 10 kΩVCC ± = ±15 V

50

0

−50

6040200−100

80

100

t − Time − μs

VO

− O

utp

ut

Volt

age −

mV

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE

ÁÁÁÁ

VO



�




Figure 51

TA = 25°CCL = 30 pF

ÎÎÎÎÎSee Figure 4

RL = 10 kΩ

t − Time − μs

VCC = 5 V

2.5

60402002.4

80

2.6

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE

VO

− O

utp

ut

Volt

age −

V

ÁÁÁÁÁÁ

VO

2.55

2.45

Figure 52t − Time − μs

4

800

0 20 40 60

1

2

3

VCC = 5 VRL = 10 kΩCL = 30 pFTA = 25°C


See Figure 1

VO

− O

utp

ut

Volt

age −

V

ÁÁÁÁV

O

TLE2021VOLTAGE-FOLLOWER LARGE-SIGNAL

PULSE RESPONSE


4

800

0 20 40 60

1

2

3

VCC = 5 VRL = 10 kΩCL = 30 pFTA = 25°CSee Figure 1

VO

− O

utp

ut

Volt

age −

V

ÁÁÁÁÁÁ

VO


PULSE RESPONSE


4

800

0 20 40 60

1

2

3

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCC ± = 5 VRL = 10 kΩCL = 30 pFTA = 25°CSee Figure 1

VO

− O

utp

ut

Volt

age −

VV O

TLE2024VOLTAGE-FOLLOWER LARGE-SCALE

PULSE RESPONSE



�




Figure 55

VO

− O

utp

ut

Volt

age −

V

t − Time − μs

15

80−15

0 20 40 60

−10

− 5

0

5

10

VCC ± = ±15 V

RL = 10 kΩCL = 30 pFTA = 25°CSee Figure 1

ÁÁÁÁV

O


PULSE RESPONSE

Figure 56

VO

− O

utp

ut

Volt

age −

V

t − Time − μs

15

80−15

0 20 40 60

−10

−5

0

5

10


VCC ± = ±15 VRL = 10 kΩCL = 30 pFTA = 25°CSee Figure 1

ÁÁÁÁV

O


PULSE RESPONSE

Figure 57

VO

− O

utp

ut

Volt

age −

V

t − Time − μs

15

80−15

0 20 40 60

−10

−5

0

5

10

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCC ± = ±15 VRL = 10 kΩCL = 30 pFTA = 25°CSee Figure 1

V O


PULSE RESPONSE

Figure 58

0

0.5

10− 0.5

1 2 3 4 5 6 7 8 9

− 0.4

− 0.3

− 0.2

− 0.1

0

0.1

0.2

0.3

0.4

t − Time − s


VCC ± = ±15 V

TA = 25°C

PEAK-TO-PEAK EQUIVALENTINPUT NOISE VOLTAGE

0.1 TO 1 Hz

VN

PP

− P

eak-

to-P

eak

Eq

uiv

alen

t In

pu

t N

ois

e Vo

ltag

e −

uV Vμ

ÁÁÁÁÁÁ

V N(P

P)


�




Figure 59t − Time − s

0.4

0.3

0.2

0.1

0

− 0.1

− 0.2

− 0.3

− 0.4

− 0.5

0.5

987654321 100

VCC ± = ±15 V

TA = 25°C

PEAK-TO-PEAK EQUIVALENTINPUT NOISE VOLTAGE

0.1 TO 10 Hz

VN

PP

− P

eak-

to-P

eak

Eq

uiv

alen

t In

pu

t N

ois

e Vo

ltag

e −

uV Vμ

ÁÁÁÁÁÁÁÁÁ

V N(P

P)

Figure 60

1

Vn

− E

qu

ival

ent

Inp

ut

No

ise

Volt

age −

nV

Hz


200

10 k0

40

80

120

160

10 100 1 k

EQUIVALENT INPUT NOISE VOLTAGEvs

FREQUENCY

Vn

ÁÁÁÁÁÁ

nV

/H

z ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ


VCC ± = ±15 V

RS = 20 Ω

ÎÎÎÎTA = 25°CÎÎÎÎÎÎÎÎÎÎ

See Figure 2

Figure 61

0

B1 −

Un

ity-

Gai

n B

and

wid

th −

MH

z

4

160

2 4 6 8 10 12 14

1

2

3See Figure 3TA = 25°CCL = 30 pFRL = 10 kΩ

B1

|VCC±| − Supply Voltage − V

TLE2021UNITY-GAIN BANDWIDTH

vsSUPPLY VOLTAGE

Figure 62

3

2

1

14121086420

16

4

|VCC±| − Supply Voltage − V

B1 −

Un

ity-

Gai

n B

and

wid

th −

MH

z

0

B1

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ


TLE2022 AND TLE2024UNITY-GAIN BANDWIDTH

vsSUPPLY VOLTAGE



�




Figure 63

−75

B1 −

Un

ity-

Gai

n B

and

wid

th −

MH

z


4

1250

−50 −25 0 25 50 75 100

1

2

3

See Figure 3CL = 30 pF

RL = 10 kΩ

VCC ± = ±15 V

ÎÎÎÎÎVCC = 5 VB1

TLE2021UNITY-GAIN BANDWIDTH†


Figure 64

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC = 5 V

3

2

1

1007550250−25−500

125

4

TA − Free-Air Temperature − °C−75

RL = 10 kΩCL = 30 pFSee Figure 3


VCC ± = ±15 V

B1 −

Un

ity-

Gai

n B

and

wid

th −

MH

zB

1

TLE2022 AND TLE2024UNITY-GAIN BANDWIDTH†


Figure 65

0

m −

Ph

ase

Mar

gin

50°

1640°

2 4 6 8 10 12 14

42°

44°

46°

48°



ÁÁÁÁ

mφ

TLE2021PHASE MARGIN

vsSUPPLY VOLTAGE

Figure 66

53°

51°

49°

47°

141210864245°

16

55°

m −

Ph

ase

Mar

gin

0|VCC±| − Supply Voltage − V

ÁÁÁÁ

mφ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

See Figure 3TA = 25°CCL = 30 pFRL = 10 kΩ

TLE2022 AND TLE2024PHASE MARGIN

vsSUPPLY VOLTAGE



�




Figure 67

0CL − Load Capacitance − pF

60°

1000

20 40 60 80

10°

20°

30°

40°

50°

RL = 10 kΩTA = 30 pFSee Figure 3

VCC ± = ±15 V

VCC = 5 V

m −

Ph

ase

Mar

gin

ÁÁÁÁÁÁ

mφ

TLE2021PHASE MARGIN

vsLOAD CAPACITANCE

Figure 68

ÁÁÁÁÁÁÁÁÁÁÁÁ

80604020

VCC = 5 V

See Figure 3TA = 25°CRL = 10 kΩ

60°

50°

40°

30°

20°

10°

0°100

70°

CL − Load Capacitance − pF

m −

Ph

ase

Mar

gin

0

ÁÁÁÁ

mφ

VCC ± = ±15 V

TLE2022 AND TLE2024PHASE MARGIN

vsLOAD CAPACITANCE

Figure 69

−75

m −

Ph

ase

Mar

gin


50°

12536°

−50 −25 0 25 50 75 100

38°

40°

42°

44°

46°

48°

RL = 10 kΩCL = 30 pFSee Figure 3

VCC ± = ±15 V

VCC = 5 V

ÁÁ

mφ

TLE2021PHASE MARGIN†


Figure 70

42°

1007550250−25−50

VCC = 5 V

VCC ± = ±15 V

52°

50°

48°

46°

44°

40°125

54°

TA − Free-Air Temperature − °C−75

m −

Ph

ase

Mar

gin

ÁÁÁÁ

mφ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

See Figure 3CL = 30 pFRL = 10 kΩ

TLE2022 AND TLE2024PHASE MARGIN†





�



APPLICATION INFORMATION

voltage-follower applications

The TLE202x circuitry includes input-protection diodes to limit the voltage across the input transistors; however,no provision is made in the circuit to limit the current if these diodes are forward biased. This condition can occurwhen the device is operated in the voltage-follower configuration and driven with a fast, large-signal pulse. Itis recommended that a feedback resistor be used to limit the current to a maximum of 1 mA to preventdegradation of the device. This feedback resistor forms a pole with the input capacitance of the device. Forfeedback resistor values greater than 10 kΩ, this pole degrades the amplifier phase margin. This problem canbe alleviated by adding a capacitor (20 pF to 50 pF) in parallel with the feedback resistor (see Figure 71).

CF = 20 pF to 50 pF

IF ≤ 1 mA

RF

VCC +

VCC−

VO

VI

−

+

Figure 71. Voltage Follower

Input offset voltage nulling

The TLE202x series offers external null pins that further reduce the input offset voltage. The circuit inFigure 72 can be connected as shown if this feature is desired. When external nulling is not needed, the nullpins may be left disconnected.

1 kΩ GND (single supply)

VCC − (split supply)

5 kΩ

OFFSET N2

−

+

OFFSET N1

IN −

IN +

Figure 72. Input Offset Voltage Null Circuit


�



APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts™, the model generation software usedwith Microsim PSpice™. The Boyle macromodel (see Note 5) and subcircuit in Figure 73, Figure 74, andFigure 75 were generated using the TLE202x typical electrical and operating characteristics at 25°C. Using thisinformation, output simulations of the following key parameters can be generated to a tolerance of 20% (in mostcases):

� Unity-gain frequency� Common-mode rejection ratio� Phase margin� DC output resistance� AC output resistance� Short-circuit output current limit

� Maximum positive output voltage swing� Maximum negative output voltage swing� Slew rate� Quiescent power dissipation� Input bias current� Open-loop voltage amplification

NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journalof Solid-State Circuits, SC-9, 353 (1974).

OUT

+

−

+

−

+

−

+

−+

−

+

− +

−

+−

VCC +

rp

IN−

2IN+

1

VCC−

rc1

11

Q1 Q2

13

cee Iee

3

12

rc2

ve

54de

dp

vc

dc

4

C1

53

r2

6

9

egnd

vb

fb

C2

gcm gavlim

8

5ro1

ro2

hlim

90

dip

91

din92

vinvip

99

7

ree

14

re1 re2

Figure 73. Boyle Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.



�



.SUBCKT TLE2021 1 2 3 4 5*

c1 11 12 6.244E−12c2 6 7 13.4E−12c3 87 0 10.64E−9cpsr 85 86 15.9E−9dcm+ 81 82 dxdcm− 83 81 dxdc 5 53 dxde 54 5 dxdlp 90 91 dxdln 92 90 dxdp 4 3 dxecmr 84 99 (2 99) 1egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5epsr 85 0 poly(1) (3,4) −60E−6 2.0E−6ense 89 2 poly(1) (88,0) 120E−6 1fb 7 99 poly(6) vb vc ve vlp vln vpsr 0 547.3E6+ −50E7 50E7 50E7 −50E7 547E6ga 6 0 11 12 188.5E−6gcm 0 6 10 99 335.2E−12gpsr 85 86 (85,86) 100E−6grc1 4 11 (4,11) 1.885E−4grc2 4 12 (4,12) 1.885E−4gre1 13 10 (13,10) 6.82E−4gre2 14 10 (14,10) 6.82E−4hlim 90 0 vlim 1k

hcmr 80 1 poly(2) vcm+ vcm− 0 1E2 1E2irp 3 4 185E−6iee 3 10 dc 15.67E−6iio 2 0 2E−9i1 88 0 1E−21q1 11 89 13 qxq2 12 80 14 qxR2 6 9 100.0E3rcm 84 81 1Kree 10 99 14.76E6rn1 87 0 2.55E8rn2 87 88 11.67E3ro1 8 5 62ro2 7 99 63vcm+ 82 99 13.3vcm− 83 99 −14.6vb 9 0 dc 0vc 3 53 dc 1.300ve 54 4 dc 1.500vlim 7 8 dc 0vlp 91 0 dc 3.600vln 0 92 dc 3.600vpsr 0 86 dc 0

.model dx d(is=800.0E−18)

.model qx pnp(is=800.0E−18 bf=270)

.ends

Figure 74. Boyle Macromodel for the TLE2021

.SUBCKT TLE2022 1 2 3 4 5*c1 11 12 6.814E−12c2 6 7 20.00E−12dc 5 53 dxde 54 5 dxdlp 90 91 dxdln 92 90 dxdp 4 3 dxegnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5fb 7 99 poly(5) vb vc ve vlp vln 0

+ 45.47E6 −50E6 50E6 50E6 −50E6ga 6 0 11 12 377.9E−6gcm 0 6 10 99 7.84E−10iee 3 10 DC 18.07E−6hlim 90 0 vlim 1kq1 11 2 13 qxq2 12 1 14 qxr2 6 9 100.0E3

rc1 4 11 2.842E3rc2 4 12 2.842E3ge1 13 10 (10,13) 31.299E−3ge2 14 10 (10,14) 31.299E−3ree 10 99 11.07E6ro1 8 5 250ro2 7 99 250rp 3 4 137.2E3vb 9 0 dc 0vc 3 53 dc 1.300ve 54 4 dc 1.500vlim 7 8 dc 0vlp 91 0 dc 3vln 0 92 dc 3

.model dx d(is=800.0E−18)

.model qx pnp(is=800.0E−18 bf=257.1)

.ends

Figure 75. Boyle Macromodel for the TLE2022

PACKAGE OPTION ADDENDUM

www.ti.com 31-May-2014

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

TLE2021AQDREP ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 125 2021AE

TLE2021MDREP ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -55 to 125 2021ME

TLE2021QDREP ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 125 2021QE

TLE2022AQDREP ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)


TLE2022QDREP ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)


TLE2024AQDWREP ACTIVE SOIC DW 16 2000 Green (RoHS& no Sb/Br)


TLE2024QDWREP ACTIVE SOIC DW 16 2000 Green (RoHS& no Sb/Br)


V62/04755-01XE ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)








V62/04755-05YE ACTIVE SOIC DW 16 2000 Green (RoHS& no Sb/Br)


V62/04755-06YE ACTIVE SOIC DW 16 2000 Green (RoHS& no Sb/Br)



CU NIPDAU Level-1-260C-UNLIM -55 to 125 2021ME

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

http://www.ti.com/product/TLE2021A-EP?CMP=conv-poasamples#samplebuy

http://www.ti.com/product/TLE2021-EP?CMP=conv-poasamples#samplebuy















Addendum-Page 2

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TLE2021-EP, TLE2021A-EP, TLE2022-EP, TLE2022A-EP, TLE2024-EP, TLE2024A-EP :

• Catalog: TLE2021, TLE2021A, TLE2022, TLE2022A, TLE2024, TLE2024A

• Automotive: TLE2021-Q1, TLE2021A-Q1, TLE2022-Q1, TLE2022A-Q1, TLE2024-Q1, TLE2024A-Q1

• Military: TLE2021M, TLE2021AM, TLE2022M, TLE2022AM, TLE2024M, TLE2024AM

NOTE: Qualified Version Definitions:

http://www.ti.com/productcontent

http://focus.ti.com/docs/prod/folders/print/tle2021.html

http://focus.ti.com/docs/prod/folders/print/tle2021a.html





http://focus.ti.com/docs/prod/folders/print/tle2021-q1.html

http://focus.ti.com/docs/prod/folders/print/tle2021a-q1.html





http://focus.ti.com/docs/prod/folders/print/tle2021m.html

http://focus.ti.com/docs/prod/folders/print/tle2021am.html







Addendum-Page 3

• Catalog - TI's standard catalog product

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

• Military - QML certified for Military and Defense Applications

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

TLE2021AQDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TLE2021MDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TLE2021QDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TLE2022AQDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TLE2022QDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TLE2024AQDWREP SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1

TLE2024QDWREP SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 1-Dec-2016

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TLE2021AQDREP SOIC D 8 2500 367.0 367.0 35.0

TLE2021MDREP SOIC D 8 2500 340.5 338.1 20.6

TLE2021QDREP SOIC D 8 2500 367.0 367.0 35.0

TLE2022AQDREP SOIC D 8 2500 367.0 367.0 35.0

TLE2022QDREP SOIC D 8 2500 367.0 367.0 35.0

TLE2024AQDWREP SOIC DW 16 2000 367.0 367.0 38.0

TLE2024QDWREP SOIC DW 16 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 1-Dec-2016

Pack Materials-Page 2

GENERIC PACKAGE VIEW

Images above are just a representation of the package family, actual package may vary.Refer to the product data sheet for package details.

DW 16 SOIC - 2.65 mm max heightSMALL OUTLINE INTEGRATED CIRCUIT

4040000-2/H

www.ti.com

PACKAGE OUTLINE

C

TYP10.639.97

2.65 MAX

14X 1.27

16X 0.510.31

2X8.89

TYP0.330.10

0 - 80.30.1

(1.4)

0.25GAGE PLANE

1.270.40

A

NOTE 3

10.510.1

BNOTE 4

7.67.4

4220721/A 07/2016

SOIC - 2.65 mm max heightDW0016ASOIC

NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.5. Reference JEDEC registration MS-013.

1 16

0.25 C A B

98

PIN 1 IDAREA

SEATING PLANE

0.1 C

SEE DETAIL A

DETAIL ATYPICAL

SCALE 1.500

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAXALL AROUND

0.07 MINALL AROUND

(9.3)

14X (1.27)

R0.05 TYP

16X (2)

16X (0.6)

4220721/A 07/2016


NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL SOLDER MASKOPENING

NON SOLDER MASKDEFINED

SOLDER MASK DETAILS

OPENINGSOLDER MASK METAL

SOLDER MASKDEFINED

LAND PATTERN EXAMPLESCALE:7X

SYMM

1

8 9

16

SEEDETAILS

SYMM

www.ti.com

EXAMPLE STENCIL DESIGN

R0.05 TYP

16X (2)

16X (0.6)

14X (1.27)

(9.3)

4220721/A 07/2016


NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLEBASED ON 0.125 mm THICK STENCIL

SCALE:7X

SYMM

SYMM

1

8 9

16

IMPORTANT NOTICE

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