vhdm® & vhdm-l™ series high speed electrical characterization
TRANSCRIPT
Connector Products Division
Date: 2/15/2005
VHDM® & VHDM-L™ Series
High Speed
Electrical Characterization
HDM, VHDM & VHDM-HSD are trademarks or registered trademarks of Teradyne, Inc.
Connector Products Division
Date: 2/15/2005 Page 2 of 31
SCOPE 1. The scope of this document is to define the electrical performance of both the VHDM and VHDM-
L Series connector products. 2. Parameters measured include reflections, multi-line crosstalk, signal delay and rise time
degradation for the 8-row VHDM connector. Although 5 & 6 row are not included in this report, the 8 row servers as a good estimation for overall connector performance
3. Since the VHDM-L Series electrical performance performs like an open pin-field. The most important factors, relative to electrical performance, are signal rise time and signal/ground pattern of contacts.
4. Test equipment used in collecting data includes Tektronix 11801C TDR and Agilent 8720 VNA. Standard measurement and calibration setups were used.
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TEST MEASUREMENT SETUPS:
Figures 1, 2 & 3 show typical TDR test setups.
Figure 1: Typical TDR Test Setup
Figure 2: Typical TDR Crosstalk Setup
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Figure 3: Typical Propagation Delay Setup
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TEST BOARDS & BOARD TEST PATTERNS: Data collected in this report was measured using the test boards shown in Figures 4 and 5.
LEFT SIDE (Rows 7-10)Daughterboard Left side silkscreen down
Backplane Right side silkscreen(back edge of backplane) Shield side of header
Figure 4
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RIGHT SIDE (Rows 1-4)Daughterboard Right side silkscreen down
Backplane Right side silkscreen(back edge of backplane)
Shield side of header
Figure 5
The high-speed layers used Rogers 4350B, in a standard stripline construction. Standard high-speed layout/routing practices were employed during board design and fabrication. In order to minimize fixture loss, traces to and from the connector were kept to a 2-inch distance. In addition, cal traces for the 1x and 2x distances were created, to measure the fixture burden.
Due to the limitation of the number of usable pins, the board was split into two S/G test patterns, shown in Figure 6. The left side of the pattern gives the ability to drive all lines and look at worst case crosstalk conditions while the right side shows typical performance using a 1:1 S/G configuration
PCB Cal traces:
Reflect Cal: 1x or the distance from one SMA to the connector under test
Trans Cal: 2x or the total fixture distance from first SMA to the second SMA without the connector
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Figure 6: PCB Pin Test Pattern
VHDM SINGLE ENDED CONNECTOR IMPEDANCE: Table 1 shows the first column impedance data, minus test board via effects, for the single ended 1:0 gnd pattern. This column does not have a shield on one side and would be considered the least behaved, electrically
Table 1: Single ended VHDM unshielded column impedance data
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Table 2 shows the middle column impedance data, minus test board via effects, for the single ended 1:0 gnd pattern. These columns have shields on both sides of the signals
Table 2: Single Ended VHDM Impedance data for columns 2, 3 & 4
Figure 7 shows a typical impedance plot taken from the data above
Figure 7: Typical Single Ended VHDM TDR plot
PCB Via in
Connector
PCB via out
SMA Out
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VHDM DIFFERENTIAL ENDED CONNECTOR IMPEDANCE: Table 3 shows the first column Impedance data, with test board via effects, for the differential 1:0 gnd pattern. This column does not have a shield on one side and would be considered the least behaved, electrically.
Table 3: Differential VHDM unshielded column impedance data
Table 4 shows the middle column Impedance data, minus test board via effects, for the differential 1:0 gnd pattern. These columns have shields on both sides of the signals
Table 4: Differential VHDM Impedance data for columns 7, 8 & 9
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Figure 8: Typical Differential Impedance plot
VHDM SINGLE 1/1 S/G CONNECTOR IMPEDANCE: Table 5 shows columns 8-10 impedance data, with test board via effects, for the single ended 1:1 gnd pattern.
Pin # Trise = 200 psec A3 51.4 B3 54.2 D3 54.4 H3 59.3
A2 56.7 C2 55.0 E2 57.6 G2 58.5 H2 58.6
B1 52.0 D1 55.9 F1 56.7 H1 58.4
Table 5: Single ended impedance data for columns 1-3
Tr = 200 ps 10/90%
Tr = 45 ps 10/90%
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VHDM CONNECTOR SINGLE ENDED CROSSTALK: Table 6 shows the first column NEXT crosstalk data, at various rise times, for the single ended 1:0 gnd pattern. This column does not have a shield on one side.
Table 6: Single ended VHDM unshielded column NEXT data
Table 7 shows the single ended NEXT contribution across the shield. Notice that most of the noise comes from within column.
Table 7: Single ended across shield NEXT
VHDM DIFFERENTIAL ENDED CONNECTOR NEXT: Table 8 shows the differential NEXT in the unshielded connector column.
Table 8: VHDM Differential NEXT within column
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Table 9 shows the Differential NEXT contribution across the shield. Notice that most of the noise comes from within column.
Table 9: Differential VHDM NEXT across shields
VHDM CONNECTOR PROPAGATION DELAY Typical VHDM 8 row propagation delays are as follows:
VHDM® Propagation DelayFEDCBA
A' B' C' D' E'F'
50 ohm testboards
FEDCBA
A' B' C' D'
50 ohm testboards
152 ps171 ps188 ps211 ps222 ps245 ps
A -> A'B -> B'C -> C'D -> D'E -> E'F -> F'
Delay measurement test points
262 psG -> G'290 psH -
Test Signal Rise Time: 500 ps (10-90%)
HG
G'H'> H'
Figure 9: Typical propagation delays
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Frequency Domain Single Ended Figures 10 and 11 shows test fixture loss and typical single ended I/L data for Rows A thru H. Note that the I/L plots are not de-embedded from the fixture. Trans cal and reflect cal traces, defined previously, are shown in Figure 7. .68 dB @ 1.25Ghz must be subtracted from the I/L plots to remove the transmission line fixture effects from the connector data.
m2freq=dB(reflect_cal..S(1,2))=-0.396
1.250GHz
m1freq=dB(trans_thru_cal..S(1,2))=-0.689
1.250GHz
m8freq=dB(reflect_cal..S(1,2))=-0.631
2.500GHz
m9freq=dB(trans_thru_cal..S(1,2))=-1.101
2.500GHz
1 2 3 4 5 6 7 80 9
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
-3.5
0.0
freq, GHz
I/L
m2m8m1
m9
Figure 10: Test Fixture I/L Plots
Figure 11: Typical A thru H Insertion Loss plots for single ended applications
Reflect cal: Red Trans Cal: Blue
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Differential: Figure 12 shows typical differential I/L data for pairs A/B, C/D, E/F, F/G, and G/H connector pairs. Note that 1 dB @ 2Ghz must be subtracted from the I/L plots to remove the transmission line fixture effects from the connector data.
Figure 12: Differential I/L Plots
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VHDM L-SERIES ELECTRICAL PERFORMANCE: This section of the electrical report includes both S-parameters and TDR data for the VHDM L-Series connector. Since the daughtercard wafer contains a floating shield, the S parameter data, shown below, shows no visible oscillation for the frequencies swept.
TEST BOARD PATTERN: Figure 13 shows the S/G pattern used on the VHDM L Series test boards
Figure 13: VHDM-L Series S/G test pattern
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L Series Frequency Domain
Figures 14 thru 21 shows I/L data taken for each terminal. During each measurement all unused terminals were terminated into 50 ohms. Also please note that no resonances were measured, which indicates the disconnected shields have no effect up to the measured frequencies.
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 14: VHDM-L Series I/L Pins A1 & B1
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 15: VHDM-L Series I/L Pins A2 & B2
Red: A1 I/L Blue: B1 I/L
Red: A2 I/L Blue: B2 I/L
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0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 16: VHDM-L Series I/L Pins A3 & B3
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 17: VHDM-L Series I/L Pins D3 & E3
Red: D3 I/L Blue: E3 I/L
Red: A3 I/L Blue: B3 I/L
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0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 18: VHDM-L Series I/L Pins D2 & E2
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 19: VHDM-L Series I/L Pins G1-H1
Red: D2 I/L Blue: E2 I/L
Red: G1 I/L Blue: H1 I/L
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0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 20: VHDM-L Series I/L Pins G2-H2
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0.0 3.0
-18
-15
-12
-9
-6
-3
-21
0
Freq, Ghz
dB
Figure 21: VHDM-L Series I/L Pins G3-H3
Red: G2 I/L Blue: H2 I/L
Red: G3 I/L Blue: E9 I/L
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VHDM-L SERIES TDR Time Domain Single-Ended TDR Data Figures 22 thru 24 represent typical impedance plots at a rise time of 77 psec 10-90%, for terminals A9 thru H9, respectively, using the signal/ground configuration in Figure 9. Since this is probably too aggressive for the open pin field structure, Table 10 tabulates max impedance values at slower rise times, using the same pins.
Terminal Tr = 77 ps Tr = 150 ps Tr = 300 ps Tr = 500 ps Tr = 1 ns Pin A2 67 ohms 61 ohms 55 ohms 53 ohms 52 ohms Pin B2 64 ohms 59 ohms 54 ohms 52 ohms 51 ohms
Pin D2 64 ohms 61 ohms 55 ohms 53 ohms 52 ohms Pin E2 66 ohms 60 ohms 55 ohms 53 ohms 51 ohms
Pin G2 68 ohms 65 ohms 60 ohms 56 ohms 54 ohms Pin H2 68 ohms 67 ohms 63 ohms 59 ohms 55 ohms
Table 10: Typical max to baseline impedance values for varing rise times
m2 time=620.0psec real(Meas_OHMS1)=67.685
-0.5 0.0 0.5 1.0 1.5 -1.0 2.0
45 50 55 60 65 70 75
40
80
Time, ns
Ohms
m2
Figure 22: A2 & B2 TDR @ Tr = 77 ps
Red: A2 Blue: B2
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m5 time=695.0psec real(Meas_OHMS4)=63.299
-0.5 0.0 0.5 1.0 1.5 -1.0 2.0
45 50 55 60 65 70 75
40
80
Time, ns
Ohms
m5
Figure 23: D2 & E2 TDR @ Tr = 77 ps
m7 time=785.0psec real(Meas_OHMS6)=68.501
-0.5 0.0 0.5 1.0 1.5 -1.0 2.0
45 50 55 60 65 70 75
40
80
Time, ns
Ohms
m7
Figure 24: G2 & H2 TDR @ Tr = 77 ps
Red: D2 Blue: E2
Red: G2 Blue: H2
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VHDM-L SERIES Crosstalk Data Tables 11 & 12 tabulate max NEXT for a 2/1 & 1/1 signal to ground ratio for the following conditions:
Driven Lines: A8, A10, B8, B9, B10 Quiet Line: A9 Driven Lines: G8, G10, H8, H9, H10 Quiet Line: B9 Rise times: 77ps, 150ps, 300 ps, 500 ps, 1ns No via effects were de-embedded in the data shown below
Crosstak Table with a 2:1 signal to ground configuration, per Fig 6 QuietTerminal Tr = 77 ps Tr = 150 ps Tr = 300 ps Tr = 500 ps Tr = 1 ns
Pin A2 42 % 37 % 30 % 23 % 12 % Table 11: Max % crosstalk for varing rise times at 2/1 signal/ground ratio
Crosstak Table with a 1:1 signal to ground configuration, per Fig 6 QuietTerminal Tr = 77 ps Tr = 150 ps Tr = 300 ps Tr = 500 ps Tr = 1 ns
Pin B2 17 % 13 % 8 % 6 % 4 % Table 12: Max % crosstalk for varing rise times at 1/1 signal/ground ratio
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VHDM L-SERIES RIGHT-ANGLE MALE VARIANT ELECTRICAL PERFORMANCE:
This section of the electrical report includes both S-parameters and TDR data for the VHDM L Series connector, right-angle male variant.
TEST BOARD PATTERN: Figure 25 shows the S/G pattern used on the VHDM RAM-L Series test boards
Figure 25: VHDM-L Series S/G test pattern
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RAM L Series Frequency Domain
Figures 26 thru 32 shows I/L data taken for each terminal. During each measurement all unused traces were terminated into 50 ohms.
Figure 26: VHDM-L Series I/L Pins A7 & B7
Figure 27: VHDM-L Series I/L Pins D7 & E7
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Figure 28: VHDM-L Series I/L Pins C8 & D8
Figure 29: VHDM-L Series I/L Pins F8 & G8
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Figure 30: VHDM-L Series I/L Pins A9 & B9
Figure 31: VHDM-L Series I/L Pins D9 & E9
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Figure 32: VHDM-L Series I/L Pins G9 & H9
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VHDM-L SERIES TDR Time Domain Single-Ended TDR Data Figures 33 through 35 represent typical impedance plots at a rise time of 300 ps 10-90%, for terminals A9 thru H9, respectively, using the signal/ground configuration in Figure 25. Since this is probably too aggressive for the open pin field structure, Table 10 also tabulates max impedance values at slower rise times, using the same pins.
Terminal Tr = 300 ps Tr = 500 ps Tr = 1 ns
Pin A2 74.69 ohms 67.58 ohms 60.32 ohms Pin A4 75.04 ohms 67.81 ohms 60.51 ohms Pin B2 67.26 ohms 62.84 ohms 57.83 ohms Pin B4 68.82 ohms 63.84 ohms 58.23 ohms Pin C3 68.73 ohms 63.88 ohms 58.26 ohms Pin D2 72.00 ohms 66.64 ohms 60.28 ohms Pin D3 71.73 ohms 66.63 ohms 60.42 ohms Pin D4 73.88 ohms 67.72 ohms 60.31 ohms Pin E2 73.07 ohms 68.09 ohms 61.73 ohms Pin E4 75.83 ohms 69.61 ohms 61.87 ohms Pin F3 72.81 ohms 67.86 ohms 61.11 ohms Pin G2 76.25 ohms 71.46 ohms 64.12 ohms Pin G3 76.04 ohms 71.37 ohms 64.64 ohms Pin G4 78.99 ohms 73.20 ohms 65.25 ohms Pin H4 86.90 ohms 79.05 ohms 68.88 ohms
Table 10: Typical max to baseline impedance values for varing rise times
Figure 33: B4 TDR @ Tr = 300 ps
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Figure 34: D2 TDR @ Tr = 300 ps
Figure 35: G3 TDR @ Tr = 300 ps
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VHDM-L SERIES Crosstalk Data Tables 11 & 12 tabulate max NEXT for a 2/1 signal to ground ratio for the following conditions:
Driven Lines: A4, B4, C3, D2, D4, E2, E4, F3, G2, G3, G4, H2, H4 Quiet Line: D3 Driven Lines: A4, B4, C3, D3, D4, E4, F3, G3, G4, H4 Quiet Line: D4 Rise times: 300 ps, 500 ps, 1ns No via effects were de-embedded in the data shown below
Crosstalk Table with a 2:1 signal to ground configuration, per Figure 25 Quiet Terminal Tr = 300 ps Tr = 500 ps Tr = 1 ns
Pin D3 14.6% 12.8% 9.05% Pin D4 11.9% 10.1% 6.71%
Table 11: Max % crosstalk for varing rise times at 2/1 signal/ground ratio