vme controller - physicscms/gbe_ctrl/d783e.pdf · vme controller vmectrl mojo 191 west woodruff ave...

VME ControllerVMECTRL

mojo

191 West Woodruff Ave

Physics Research BuildingThe Ohio State University

Columbus, Ohio 43210

Electronics Lab

FF_FULLFF_PAFFF_MT

FF_PAEHARD_RESET_MON

SYSRESET_MONBBSY_MONBERR_MON

IRQ_MONWRITE_MON

DS_MONAS_MONTX_ERRRX_ERRTX_PKTRX_PKT

ACTIVITYSIG_DET_MON

STATUS[31:0]

DONE

STATUS

Status/SignalMonitor

PROM_TDOPROM_TDI

PROM_TCKPROM_TMS

F2PRM_TDIF2PRM_TCKF2PRM_TMS

FPG

A_T

MS

FPG

A_T

CK

FPG

A_T

DO

FPG

A_T

DI F2PRM

JTAGInterface

JTAGINT

TDIS

TD-

TD+

RD

-R

D+

SIG

_DE

T

TranceiverFiber Optic

OPTO

FLASH_CTRL[2:0]

FLASH_DATA[7:0]

FLASH_ADDRESS[12:0]

FLASHMEM

MemoryConfiguration

VP

C_R

AW

V5P

_RA

W

PWRMANand Managment

Power Distribution

CK

_TP

CC

K_T

PB

CK

_TP

A

TES

T_P

OR

T_C

[15:

0]

TES

T_P

OR

T_B

[15:

0]

TES

T_P

OR

T_A

[15:

0]

ANALYZER

Ana

lyze

rLo

gic

Por

ts

EXJ_RESETMON_SYSRESET

MON_HARD_RESET

RDY4SHDWN

SHDWN[2:0]

DONEPROGRAM

INT_RESET

EN_INTREN_FPREN_SREN_HREN_EXJR

RSTMAN

Reset Manager

FPGA_BUSYCONFIG_CLKINIT

DONE

PROM_TDOPROM_TDIPROM_TCKPROM_TMS

EXJ_RESET

PRD[0:7]

ProgrammingFlash PROM

PROGPROM

DRV_ADDRDRV_AM

DRV_AS

DRV_DATADRV_DS

DRV_DTACK

DRV_IACK

DRV_LWORD

DRV_UD[4:1]

DRV_WRITE

V5P

_RA

W

VME_ADDRESS[31:01]

VME_AM[5:0]VME_DATA[31:00]

VME_SYSCLK

VP

C_R

AW

DRV_ACFAIL

DRV_BBSY

DRV_BCLR

DRV_BERR

DRV_BG[3:0]INDRV_BG[3:0]OUT

DRV_BR[3:0]

DRV_IACKOUT

DRV_IRQ[7:1]

DRV_LI/O

DRV_SYSFAIL

DRV_SYSRESET

GAP

GA[4:0]

MON_ACFAIL

MON_BBSY

MON_BCLR

MON_BERR

MON_BG[3:0]IN

MON_BR[3:0]

MON_IACKIN

MON_IRQ[7:1]

MON_LI/I

MON_RESPMON_RETRY

MON_SYSFAIL

MON_SYSRESET

UD[32:1]

VENA[14:00]

VME_AS

VME_DS[1:0]

VME_DTACK

VME_IACK

VME_LWORD

VME_WRITE

MO

N_H

AR

D_R

ES

ET

VMEBLOCK

VM

E In

terfa

ce

ACTIVITY

AS_MON

BBSY_MONBERR_MON

CK

_TP

AC

K_T

PB

CK

_TP

C

CO

NFI

G_C

LK

DO

NE

DRV_ADDRDRV_AM

DRV_AS

DRV_DATADRV_DS

DRV_DTACK

DRV_IACK

DRV_LWORD

DRV_UD[4:1]

DRV_WRITE

DS_MON

EN

_EX

JR

EN

_FP

R

EN

_HR

EN

_IN

TR

EN

_SR

ERCLK

F2P

RM

F2P

RM

_TC

KF2

PR

M_T

DI

F2P

RM

_TM

S

FF_FULL

FF_MTFF_PAE

FF_PAF

FIFO_JTAG[4:0]

FLA

SH

_AD

DR

ES

S[1

2:0]

FLA

SH

_CTR

L[2:

0]

FLA

SH

_DA

TA[7

:0]

FPG

A_B

US

Y

FPGA_TCKFPGA_TDIFPGA_TDO

FPGA_TMS

FROM_FIFO[35:0]

FSCLK

FWFT_SI

HARD_RESET_MON

IRQ_MON

MARK

PR

D[0

:7]

PR

OM

_TD

O

RCLK

RD+RD-

RD

Y4S

HD

WN

RX_ERR

RX_PKT

SH

DW

N[2

:0]

SIG_DET

SIG_DET_MON

STATUS[31:0]

SYSRESET_MON

TD+TD-TDIS

TES

T_P

OR

T_A

[15:

0]

TES

T_P

OR

T_B

[15:

0]

TES

T_P

OR

T_C

[15:

0]

TO_FIFO[35:0]

TX_ERR

TX_PKT

VME_ADDRESS[31:01]

VME_AM[5:0]VME_DATA[31:00]

VME_SYSCLK

WCLK

WRITE_MON

DRV_ACFAIL

DRV_BBSY

DRV_BCLR

DRV_BERR

DRV_BG[3:0]INDRV_BG[3:0]OUT

DRV_BR[3:0]

DRV_IACKOUT

DRV_IRQ[7:1]

DRV_LI/O

DRV_SYSFAIL

DRV_SYSRESETEREN

FF_IR

EF_OR

GAP

GA[4:0]

HFIN

IT

INT_

RE

SE

TLD

MON_ACFAIL

MON_BBSY

MON_BCLR

MON_BERR

MON_BG[3:0]IN

MON_BR[3:0]

MON_HARD_RESET

MON_IACKIN

MON_IRQ[7:1]

MON_LI/I

MON_RESPMON_RETRY

MON_SYSFAIL

MON_SYSRESET

MRS

OE

PAE

PAF

PR

OG

RA

M

PRS

RCS

REN

RT

SEN

UD[32:1]

VENA[14:00]

VME_AS

VME_DS[1:0]

VME_DTACK

VME_IACK

VME_LWORD

VME_WRITE

WCSWEN

LOGIC

Logic

ERCLK

FIFO_JTAG[4:0]

FRO

M_F

IFO

[35:

0]

FSCLK

FWFT_SI

MARK

RCLK

TO_F

IFO

[35:

0]

WCLK

EREN

FF_IR

EF_OR

HF

LD

MRS

OE

PAE

PAF

PRS

RCS

REN

RT

SEN

WCSWEN

CMND_FIFO

Command FIFO

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE

PROJECTELECTRONICS LABPHYSICS RESEARCH BUILDING191 WEST WOODRUFF AVE, COLUMBUS, OH 43210

OHIOTHE

STATEUNIVERSITY CMS CSC ELECTRONICS 1

Gigabit Ethernet VME Controller BGB VMEctlr

Bac

kpla

ne

D783D

Fron

t Pan

el

Page 16Page 17

Page 18

Page 15

Page 14

Page 10 - 13

0 - 25

Page 26 - 29

Page 30 - 31

Page 32

Page 19

D783E (Peripheral Crate VME Controller)17-29-2005_8:33 VMECTRL

EF_OR

DRV_LI/O

SYSRESET_MON

TES

T_P

OR

T_C

[15:

0]

TES

T_P

OR

T_B

[15:

0]

CK

_TP

A

EXJ_RESET

MON_SYSRESETMON_HARD_RESET

RDY4SHDWN

SHDWN[2:0]DONEPROGRAMINT_RESET

EN_INTREN_FPREN_SREN_HREN_EXJR

FF_FULL

FF_PAEHARD_RESET_MON

FPGA_TDOFPGA_TDIFPGA_TCKFPGA_TMS

F2PRMF2PRM_TDIF2PRM_TCKF2PRM_TMS

PROM_TDO

DRV_BCLR

PRD[0:7]

DONE

FPGA_BUSY

UD[32:1]

V5P

_RA

WV

PC

_RA

W

VENA[14:00]VME_ADDRESS[31:01]

VME_DATA[31:00]VME_AM[5:0]

MON_BG[3:0]INDRV_BG[3:0]IN

DRV_BG[3:0]OUTMON_BR[3:0]

DRV_BR[3:0]MON_IRQ[7:1]DRV_IRQ[7:1]

GA[4:0]VME_DS[1:0]

DRV_UD[4:1]

DRV_ADDRDRV_AMDRV_DATADRV_DSVME_ASDRV_ASVME_WRITEDRV_WRITEVME_DTACKDRV_DTACKVME_LWORDDRV_LWORDVME_IACKDRV_IACKMON_IACKINDRV_IACKOUTGAPMON_RETRYMON_RESPMON_BERRDRV_BERRMON_BBSYDRV_BBSY

EXJ_RESET

PROM_TMSPROM_TCKPROM_TDI

INITCONFIG_CLK

MON_SYSRESETDRV_SYSRESETVME_SYSCLKMON_SYSFAILDRV_SYSFAILMON_ACFAILDRV_ACFAILMON_LI/I

MON_BCLR

TD-TD+RD-RD+SIG_DET

DONE

TDIS

STATUS[31:0]

BBSY_MONBERR_MONIRQ_MONWRITE_MONDS_MONAS_MONTX_ERRRX_ERRTX_PKTRX_PKTACTIVITYSIG_DET_MON

FF_MTFF_PAF

FLA

SH

_AD

DR

ES

S[1

2:0]

FLA

SH

_DA

TA[7

:0]

FLA

SH

_CTR

L[2:

0]

TES

T_P

OR

T_A

[15:

0]

CK

_TP

BC

K_T

PC

TO_FIFO[35:0]

FIFO_JTAG[4:0]

FROM_FIFO[35:0]

MRSPRSWCLKWENWCSRCLKRENOERCSMARKRTERCLKEREN

PAEHFPAFFF_IRFSCLKSENFWFT_SILD

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

CS32AL

VCC

GND

OSC

10U

+

100N

XC2VP20-5FF896C

GCLK0SGCLK1PGCLK2SGCLK3P

L01N1/VRP L01P1/VRNL02N1 L02P1L03N1/VREF L03P1L051L06N1 L06P1L07N1 L07P1L08N1 L08P1L09N1/VREF L09P1L37N1 L37P1L38N1 L38P1L39N1 L39P1L43N1 L43P1L44N1 L44P1L45N1/VREF L45P1L46N1 L46P1L47N1 L47P1L48N1 L48P1L49N1 L49P1

L501L531L54N1 L54P1L56N1 L56P1L57N1/VREF L57P1L67N1 L67P1L68N1 L68P1L69N1/VREF L69P1L73N1 L73P1

VCC11 VCC21VCC31 VCC41VCC51 VCC61VCC71 VCC81VCC91 VCCA1

BANK1

XC2VP20-5FF896C

D4 D5D6 D7

GCLK4PGCLK5SGCLK6PGCLK7S

L055L06N5/VRP L06P5/VRNL07N5/VREF L07P5L08N5 L08P5L09N5/VREF L09P5L37N5 L37P5L38N5 L38P5L39N5 L39P5L43N5 L43P5L44N5 L44P5L45N5/VREF L45P5L46N5 L46P5L47N5 L47P5L48N5 L48P5L49N5 L49P5

L505L535L54N5 L54P5L56N5 L56P5L57N5/VREF L57P5L67N5 L67P5L68N5 L68P5L69N5/VREF L69P5L73N5 L73P5


CSRDWR

BANK5

XC2VP20-5FF896C

GCLK4SGCLK5PGCLK6SGCLK7P

L01N0/VRP0 L01P0/VRN0L02N0 L02P0L03N0 L03P0/VREF0L050L06N0 L06P0L07N0 L07P0L08N0 L08P0L09N0 L09P0/VREF0L37N0 L37P0L38N0 L38P0L39N0 L39P0L43N0 L43P0L44N0 L44P0L45N0 L45P0/VREFL46N0 L46P0L47N0 L47P0L48N0 L48P0L49N0 L49P0L500 L530L54N0 L54P0L56N0 L56P0L57N0 L57P0/VREFL67N0 L67P0L68N0 L68P0L69N0 L69P0/VREFL73N0 L73P0


BANK0

COM2

BIT

3B

IT2

BIT

1B

IT0

COM5

HEX Switch4

0 8

C

COM2

BIT

3B

IT2

BIT

1B

IT0

COM5

HEX Switch4

0 8

C

CS32AL

VCC

GND

OSC

100N10U

+

XC2VP20-5FF896C

D0 D1D2 D3

DOUT

GCLK0PGCLK1SGCLK2PGCLK3S

L054L06N4/VRP L06P4/VRNL07N4 L07P4/VREFL08N4 L08P4L09N4 L09P4/VREFL37N4 L37P4L38N4 L38P4L39N4 L39P4L43N4 L43P4L44N4 L44P4L45N4 L45P4/VREFL46N4 L46P4L47N4 L47P4L48N4 L48P4L49N4 L49P4L504 L534L54N4 L54P4L56N4 L56P4L57N4 L57P4/VREFL67N4 L67P4L68N4 L68P4L69N4 L69P4/VREFL73N4 L73P4


INT

BANK4

Gigabit Ethernet and VME Logic FPGA

CMS CSC ELECTRONICS

BGB VMEctrl FPGA10

DMY2

DMY1

D783E (Peripheral Crate VME Controller)LOGIC7-29-2005_8:33 1

AC9 AD9AG7 AH7

AG6

AJ15AH15AG15AF15

AD8AG8 AH8

AC10 AD10AE7 AE8AJ8 AK8

AC11 AD11AF8 AF9

AF10 AG10AC12 AD12

AE9 AE10AH9 AJ9

AC13 AD13AE11 AE12AH10 AH11AB14 AC14AF11 AG11AJ10 AK10AF12 AF13AG13 AH13AB15 AC15AD14 AE14AF14 AG14AD15 AE15

AB13 AB12AB11 AB10AA15 AA14AA13 AA12AA11 AA10

AF7

U1L

VME_ADDRESS03

VME_ADDRESS[31:01]

VME_ADDRESS21

VME_ADDRESS17

VME_ADDRESS01

VME_ADDRESS05VME_ADDRESS07VME_ADDRESS09VME_ADDRESS11VME_ADDRESS13VME_ADDRESS15

VME_ADDRESS19

VME_ADDRESS23VME_ADDRESS25VME_ADDRESS27VME_ADDRESS29VME_ADDRESS31TP_CK_1S

VME_ADDRESS30

VME_ADDRESS[31:01]

VME_ADDRESS26VME_ADDRESS28

VME_ADDRESS22VME_ADDRESS20VME_ADDRESS18

VME_ADDRESS06


VME_ADDRESS08VME_ADDRESS10VME_ADDRESS12VME_ADDRESS14VME_ADDRESS16

VME_ADDRESS24

TP_CK_2SVME_OSC

V33PC52L C53L

V33P

V33P

TP_B1_7

TP_B1_[7:0]TP_B1_3TP_B1_5

TP_B1_1

4

2

3U2L

62.5 MHZ

R8L

3.3K

R7L

3.3K

3.3KR

6L

R5L

3.3K

2

6 3 4 1

5SW2L2

6 3 4 1

5SW1L

PRD4PRD[0:7] PRD6

TP_B0_[3:0]TP_B0_3TP_B0_[3:0]

TP_B0_0

TP_B0_2TP_B0_1

SYSRESET_MON

TP_B1_[7:0]TP_B1_4TP_B1_2

TP_B1_6

TP_B1_0TX_ERRRX_ERR

TP_CK_3P

RX_PKTSIG_DET_MON

TX_PKTACTIVITY

HARD_RESET_MONBBSY_MONIRQ_MONBERR_MON

WRITE_MONAS_MON

STATUS[31:0]

STATUS3STATUS5STATUS7STATUS9STATUS11STATUS13STATUS15STATUS17STATUS19STATUS21STATUS23STATUS25STATUS27STATUS29

STATUS1

STATUS31

STATUS24

STATUS28STATUS26

STATUS22STATUS20STATUS18STATUS16

STATUS2STATUS4STATUS6STATUS8STATUS10STATUS12

STATUS[31:0]STATUS14

STATUS0

STATUS30

F16G16B16C16

E25 E24F24 F23E23 E22G23H22 G22F22 F21D24 C24H21 G21E21 D21D23 C23H20 G20E20 D20B23 A23H19 G19E19 E18C22 B22F20 F19G17 F17B21 A21H18 G18C21 C20J17 H17E17 D17D18 C18J16 H16E16 D16

K21 K20K19 K18K17 K16J21 J20J19 J18

U1L

FLASH_ADDRESS11

FLASH_ADDRESS1FLASH_ADDRESS3FLASH_ADDRESS5FLASH_ADDRESS7FLASH_ADDRESS9

FLASH_ADDRESS[12:0]

FF_PAF

SW2L_BIT0

FLASH_ADDRESS[12:0]

FLASH_ADDRESS12FLASH_ADDRESS10FLASH_ADDRESS8FLASH_ADDRESS6FLASH_ADDRESS4FLASH_ADDRESS2FLASH_ADDRESS0

SW1L_BIT2

SW1L_BIT3SW1L_BIT1

SW1L_BIT0

SW2L_BIT0

CLK+

SW2L_BIT2 SW2L_BIT3

SW2L_BIT2

SW1L_BIT0SW1L_BIT2

R4L

3.3K

R3L

3.3K

3.3KR

2L

R1L

3.3K

EN_SR

SHDWN[2:0]SHDWN1SHDWN0SHDWN[2:0] SHDWN2

VENA[14:00]

VENA11VENA09

VENA13

VENA[14:00]

VENA12VENA10VENA08

VENA14

VENA[14:00]

VENA05VENA03

VENA07

VENA01VENA02VENA04VENA06

VENA00VENA[14:00]DRV_AM

PRD[0:7] PRD0PRD2

VME_AM[5:0]VME_AM2VME_AM4

VME_AM0

VME_AM[5:0]VME_AM3VME_AM5

VME_AM1

DRV_BG[3:0]IN DRV_BG3IN

DRV_BG1INDRV_BG2IN

DRV_BG0IN

DRV_BG[3:0]OUT

DRV_BG0OUTDRV_BG1OUTDRV_BG2OUTDRV_BG3OUT

DRV_BR[3:0]DRV_BR0DRV_BR1

DRV_BR2DRV_BR3

MON_BR[3:0]

MON_BR3

MON_BR1MON_BR0

MON_BR2

FPGA_BUSY INITPRD[0:7]PRD1

PRD3

GA[4:0] GA0

GA4GA2 GA[4:0]GA1

GA3

GAP

PRD[0:7]PRD7PRD5

UNUSED4

R10

L1K

UNUSED3

RDY4SHDWN

TDIS

AH24 AG24AD22 AC22

AF16AG16AH16AJ16

AD23AH23 AG23AD21 AC21AE23 AE24AK23 AJ23AD20 AC20AF22 AF23AG21 AF21AD19 AC19AE21 AE22AJ22 AH22AD18 AC18AE19 AE20AH20 AH21AC17 AB17

AF20AG20AK21 AJ21AF18 AF19AH18 AG18AC16 AB16AE17 AD17AG17 AF17AE16 AD16

AB21 AB20AB19 AB18AA21 AA20AA19 AA18AA17 AA16

AG25AF24

U1L

C15B15G15F15

E7 E6F8 F7E9 E8G8G9 H9

F10 F9C7 D7

G10 H10D10 E10

C8 D8G11 H11D11 E11

A8 B8G12 H12E13 E12B9 C9

F12 F11F14 G14

B10A10G13 H13C11 C10H14 J14D14 E14C13 D13H15 J15D15 E15

K15 K14K13 K12K11 K10J13 J12J11 J10

U1L

V25P

V25P

V25P

C50LC49L

1N

C51L

V33P

SIG_DETFLASH_DATA[7:0] FLASH_DATA0

FLASH_DATA5FLASH_DATA6

FLASH_DATA4FLASH_DATA2

FLASH_CTRL1

FLASH_CTRL[2:0]

R9L

1K

DRV_ADDR

EN_HREN_FPREN_INTRINT_RESET

EN_EXJR

FLASH_DATA7

FLASH_DATA3FLASH_DATA1 FLASH_DATA[7:0]

FLASH_CTRL0FLASH_CTRL2

FLASH_CTRL[2:0]FF_FULL

SW2L_BIT1

DS_MON

FF_MTFF_PAE

TP_B5_[18:0]

TP_B5_17TP_B5_15TP_B5_13TP_B5_11TP_B5_9TP_B5_7TP_B5_5TP_B5_3

TP_B5_18

TP_B5_1

TP_B5_[18:0]

TP_B5_14TP_B5_12TP_B5_10TP_B5_8TP_B5_6TP_B5_4

TP_B5_16

TP_B5_0TP_B5_2

4

2

3U3L

16MHZ

VME_OSC

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

XC2VP20-5FF896C

L01N3/VRP L01P3/VRNL02N3 L02P3L03N3/VREF L03P3L04N3 L04P3L05N3 L05P3L06N3 L06P3L31N3L32N3 L32P3L33N3/VREF L33P3L34N3 L34P3L35N3 L35P3L36N3 L36P3L37N3 L37P3L38N3 L38P3L39N3/VREF L39P3L40N3 L40P3L41N3 L41P3L42N3 L42P3L43N3 L43P3L44N3 L44P3L45N3/VREF L45P3L46N3 L46P3L47N3 L47P3L48N3 L48P3L49N3 L49P3L50N3 L50P3L51N3/VREF L51P3L52N3 L52P3L53N3 L53P3L54N3 L54P3L55N3 L55P3L56N3 L56P3L57N3/VREF L57P3L58N3 L58P3L59N3 L59P3L60N3 L60P3L85N3 L85P3L86N3 L86P3L87N3/VREF L87P3L88N3 L88P3L89N3 L89P3L90N3 L90P3


L31P3

BANK3

XC2VP20-5FF896C

L01N2/VRP L01P2/VRNL02N2 L02P2L03N2 L03P2L04N2/VREF L04P2L05N2 L05P2L06N2 L06P2L31N2 L31P2L32N2 L32P2L33N2 L33P2L34N2/VREF L34P2L35N2 L35P2L36N2 L36P2L37N2 L37P2L38N2 L38P2L39N2 L39P2L40N2/VREF L40P2L41N2 L41P2L42N2 L42P2L43N2 L43P2L44N2 L44P2L45N2 L45P2L46N2/VREF L46P2L47N2 L47P2L48N2 L48P2L49N2 L49P2L50N2 L50P2L51N2 L51P2L52N2/VREF L52P2L53N2 L53P2L54N2 L54P2L55N2 L55P2L56N2 L56P2L57N2 L57P2L58N2/VREF L58P2L59N2 L59P2L60N2 L60P2L85N2 L85P2L86N2 L86P2L87N2 L87P2L88N2/VREF L88P2L89N2 L89P2L90N2 L90P2


BANK2


CMS CSC ELECTRONICS

BGB VMEctrl FPGA11

D783E (Peripheral Crate VME Controller)27-29-2005_8:39 LOGIC

TEST_PORT_C7TEST_PORT_C5

TEST_PORT_C1TEST_PORT_C3 TEST_PORT_C[15:0]

TEST_PORT_C15


TEST_PORT_C13

CK_TPB

TP_B2_9TP_B2_7TP_B2_5TP_B2_3

TP_B2_11TP_B2_13TP_B2_15

TP_B2_19

TP_B2_25TP_B2_23TP_B2_21

TP_B2_17

TP_B2_[26:0]

MON_HARD_RESETMON_RETRY

CK_TPC

VME_DATA16

A3 B3G6 G5C5 D5C2 C1J8 J7C4 D3D2 D1H6 H5E4 E3E2 E1K8 K7F4 F3F2 F1J6 J5

G4 G3G2 G1L8 L7H4 H3H2 J2M8 M7K6 K5J1 K1

M6 M5J4 J3K2 L2N8 N7K4 K3L1 M1N6 N5L5 L4M2 N2P9 R9M4 M3N1 P1P8 P7N4 N3P3 P2R8 R7P5 P4R2 T2R6 R5R4 R3

R10 P10N10 N9M10 M9L10 L9K9 J9

U1L

DRV_UD2DRV_UD[4:1] DRV_UD4

MON_BG[3:0]INMON_BG2INMON_BG0IN

AJ3 AK3AG5 AH5AH1 AH2AG3 AH4AD5 AD6AG1 AG2AE5AB7 AB8AE3 AE4AF3 AF4AC5 AC6AF1 AF2AD3 AD4AA7 AA8AE1 AE2AB5 AB6

Y7 Y8AD1 AD2AC3 AC4AA5 AA6AB2 AC2AB3 AB4W7 W8

AA3 AA4Y4 Y5W5 W6

AA1 AB1W3 W4V7 V8Y2 AA2V5 V6U7 U8W1 Y1V3 V4T9 U9V2 W2U4 U5T7 T8U2 U3T3 T4T5 T6U1 V1

AB9 AA9Y10 Y9

W10 W9V10 V9U10 T10

AF6

U1L

MON_BG1INMON_BG3IN MON_BG[3:0]IN

MON_BCLR

VME_SYSCLKMON_RESP

MON_IACKINMON_LI/IVME_WRITEVME_ASVME_LWORDMON_ACFAIL

MON_IRQ1

MON_IRQ[7:1]MON_IRQ7MON_IRQ6MON_IRQ5MON_IRQ4MON_IRQ3MON_IRQ2

DRV_IRQ7

DRV_IRQ[7:1] DRV_IRQ1DRV_IRQ2DRV_IRQ3DRV_IRQ4DRV_IRQ5DRV_IRQ6

V25P

VME_IACKDRV_BCLRDRV_IACKDRV_IACKOUTDRV_LI/ODRV_WRITEDRV_ASDRV_LWORDDRV_ACFAIL

UD[32:1] UD26UD28UD30UD32

UD24UD22UD20UD18UD16UD14UD12UD10UD8UD6UD4UD2 UD1

UD7

UD11

UD[32:1]

UD31UD29UD27UD25UD23UD21UD19UD17UD15UD13

UD9

UD5UD3

DRV_UD1 DRV_UD[4:1]DRV_UD3

VME_DATA23

VME_DATA[31:00]VME_DATA31VME_DATA29VME_DATA27VME_DATA25

VME_DATA22

VME_DATA[31:00] VME_DATA30VME_DATA28VME_DATA26VME_DATA24

V25P

TEST_PORT_B15TEST_PORT_B13TEST_PORT_B11TEST_PORT_B9

TEST_PORT_B1TEST_PORT_B3TEST_PORT_B5TEST_PORT_B7 TEST_PORT_B[15:0]

TEST_PORT_B14TEST_PORT_B12TEST_PORT_B10TEST_PORT_B8

TEST_PORT_B0TEST_PORT_B2TEST_PORT_B4TEST_PORT_B6TEST_PORT_B[15:0]

TEST_PORT_A15TEST_PORT_A13TEST_PORT_A11TEST_PORT_A9

TEST_PORT_A1TEST_PORT_A3TEST_PORT_A5TEST_PORT_A7 TEST_PORT_A[15:0]

TEST_PORT_A14TEST_PORT_A12TEST_PORT_A10TEST_PORT_A8

TEST_PORT_A0TEST_PORT_A2TEST_PORT_A4TEST_PORT_A6TEST_PORT_A[15:0]

VME_DATA19VME_DATA20VME_DATA18

VME_DATA21

VME_DATA17

CK_TPA

TP_B2_4TP_B2_6TP_B2_8TP_B2_[26:0]TP_B2_10TP_B2_12TP_B2_14TP_B2_16TP_B2_18TP_B2_20TP_B2_22TP_B2_24TP_B2_26

TP_B2_2TP_B2_1TP_B2_0

TEST_PORT_C[15:0] TEST_PORT_C2TEST_PORT_C0

TEST_PORT_C4TEST_PORT_C6TEST_PORT_C8


TEST_PORT_C14

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

PKG_TYPE=FF896

XC2VP20-5FF896C

L01N7/VRPL01P7/VRNL02N7L02P7L03N7L03P7

L04N7/VREFL04P7L05N7L05P7L06N7L06P7L31N7L31P7L32N7L32P7L33N7L33P7






L88N7/VREFL88P7L89N7L89P7L90N7L90P7


BANK7

XC2VP20-5FF896C

L01N6/VRPL01P6/VRNL02N6L02P6







L87N6/VREFL87P6L88N6L88P6L89N6L89P6L90N6L90P6


BANK6

DMY3


CMS CSC ELECTRONICS

BGB VMEctrl FPGA12

TMSTDI

TRSTTDOTCK

D783E (Peripheral Crate VME Controller)37-29-2005_8:40 LOGIC

FIFO_JTAG[4:0]FIFO_JTAG2FIFO_JTAG0

FIFO_JTAG4

TP_B6_29TP_B6_31

TP_B6_1TP_B6_3TP_B6_5TP_B6_7TP_B6_9TP_B6_11TP_B6_13TP_B6_15TP_B6_17TP_B6_19TP_B6_21TP_B6_23TP_B6_25TP_B6_27

TP_B6_32

TP_B6_[32:0]

TP_B6_0

TP_B6_30

TP_B6_4TP_B6_2

TP_B6_6

TP_B6_24

TP_B6_14TP_B6_12TP_B6_10TP_B6_8

TP_B6_16

TP_B6_22

TP_B6_18TP_B6_20

TP_B6_26TP_B6_28

TP_B6_[33:0]

PROM_TDO

F2PRM_TDI

TO_FIFO30TO_FIFO28TO_FIFO26TO_FIFO24TO_FIFO22TO_FIFO20TO_FIFO18TO_FIFO16TO_FIFO14TO_FIFO12TO_FIFO10TO_FIFO8

TO_FIFO2TO_FIFO4TO_FIFO6

TO_FIFO32TO_FIFO34

TO_FIFO0

TO_FIFO[35:0]

FROM_FIFO4FROM_FIFO6FROM_FIFO8FROM_FIFO10FROM_FIFO12FROM_FIFO14

FROM_FIFO[35:0] FROM_FIFO16FROM_FIFO18FROM_FIFO20FROM_FIFO22FROM_FIFO24FROM_FIFO26FROM_FIFO28FROM_FIFO30FROM_FIFO32FROM_FIFO34

FROM_FIFO0FROM_FIFO2

RENMARKRTAJ28AK28

AG26AH26AH30AH29AG28AH27AD26AD25AG30AG29AE26AF25AB24AB23AE28AE27AF28AF27AC26AC25AF30AF29AD28AD27AA24AA23AE30AE29AB26AB25Y24Y23AD30AD29AC28AC27AA26AA25AB29AC29AB28AB27W24W23AA28AA27Y27Y26W26W25AA30AB30W28W27V24V23Y29AA29V26V25U24U23W30Y30V28V27T22U22V29W29U27U26T24T23U29U28T28T27T26T25U30V30

AB22 AA22Y22 Y21

W22 W21V22 V21U21 T21

U1L

A28B28G25G26C26D26C29C30J23J24C27D28D29D30H25H26E27E28E29E30K23K24F27F28F29F30J25J26G27G28G29G30L23L24H27H28H29J29M23M24K25K26J30K30M25M26J27J28K29L29N23N24K27K28L30M30N25N26L26L27M29N29P22R22M27M28N30P30P23P24N27N28P28P29R23R24P26P27R29T29R25R26R27R28

R21 P21N22 N21M22 M21L22 L21K22 J22

U1L

F2PRM_TMSF2PRM_TCK

V25P

RCS WCSWCLK

OE

FROM_FIFO25FROM_FIFO27FROM_FIFO29FROM_FIFO31FROM_FIFO33FROM_FIFO35


FROM_FIFO9



FROM_FIFO11

FROM_FIFO[35:0]FROM_FIFO17FROM_FIFO19FROM_FIFO21FROM_FIFO23

FIFO_JTAG3FIFO_JTAG1

ERCLK

V25P



VME_DATA[31:00] VME_DATA00

VME_DATA08

VME_DATA01

VME_DATA15

VME_DATA09

VME_DATA03

VME_DATA07VME_DATA05


VME_DATA[31:00]

DRV_DATAVME_DS[1:0]

VME_DS0VME_DS1DRV_DS

DRV_DTACK VME_DTACKDRV_BBSY MON_BBSYDRV_BERR MON_BERRDRV_SYSFAIL MON_SYSFAILDRV_SYSRESET MON_SYSRESET

WEN F2PRMLD FWFT_SIFF_IR FSCLKPAF SENHF PRSPAEEF_ORMRS

TO_FIFO9TO_FIFO11TO_FIFO13TO_FIFO15TO_FIFO17TO_FIFO19TO_FIFO21TO_FIFO23TO_FIFO25TO_FIFO27TO_FIFO29TO_FIFO31TO_FIFO33TO_FIFO35

TO_FIFO7TO_FIFO5TO_FIFO3TO_FIFO1

TO_FIFO[35:0]

RCLK

EREN

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

100N100N100N100N 100N 100N100N 100N100N 100N100N 100N100N 100N100N100N

100N100N100N100N100N100N100N

100N100N 100N

100N100N 100N

100N 100N100N 100N100N 100N10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

XC2VP20-5FF896C

AGND16 AGND18

AGND19 AGND21

AGND4 AGND6

AGND7 AGND9

AVARX18

AVARX19 AVARX21

AVARX4 AVARX6

AVARX7 AVARX9

AVATX16 AVATX18

AVATX19 AVATX21

AVATX4 AVATX6

AVATX7 AVATX9

CCLKDONE

DXNDXP

HSWAP_EN

M0M1 M2

RSVD

RXN16 RXN18

RXN19 RXN21

RXN4 RXN6

RXN7 RXN9

RXP16 RXP18

RXP19 RXP21

RXP4 RXP6

RXP7 RXP9

TCK TDITDO TMS

TXN16 TXN18

TXN19 TXN21

TXN4 TXN6

TXN7 TXN9

TXP16 TXP18

TXP19 TXP21

TXP4 TXP6

TXP7 TXP9

VBATT

VRX18

VRX19 VRX21

VRX4 VRX6

VRX7 VRX9

VTX16 VTX18

VTX19 VTX21

VTX4 VTX6

VTX7 VTX9

PROG

PWRDWN

VRX16AVARX16

XC2VP20-5FF896C

GND97GND96GND95GND94GND93GND92GND91GND90GND89GND88GND87GND86GND85GND84GND83GND82GND81GND80GND79GND78GND77GND76GND75GND74GND73GND72GND71GND70GND69GND68GND67GND66GND65GND64GND63GND62GND61GND60GND59GND58GND57GND56GND55GND54GND53GND52GND51GND50GND49GND48GND47GND46GND45GND44GND43GND42GND41GND40GND39GND38GND37GND36GND35GND34GND33GND32GND31GND30GND29GND28GND27GND26GND25GND24GND23GND22GND21GND20GND19GND18GMD17GND16GND15GND14GND13GND12GND11GND10GND9

GND8GND7GND6GND5GND4GND3

GND1

GND99GND98

GND101GND100GND102

GND103 GND104GND105 GND106GND107 GND108GND109 GND110GND111 GND112GND113 GND114GND115 GND116GND117 GND118GND119 GND120GND121 GND122GND123 GND124

GND2

XC2VP20-5FF896C

VINT32VINT31VINT30VINT29VINT28VINT27VINT26VINT25VINT24VINT23VINT22VINT21VINT20VINT19VINT18VINT17VINT16VINT15VINT14VINT13VINT12VINT11VINT10VINT9VINT8VINT7VINT6VINT5VINT4VINT2

VAUXGVAUXFVAUXEVAUXDVAUXCVAUXBVAUXAVAUX9VAUX8VAUX7VAUX6VAUX5VAUX4VAUX3VAUX2VAUX1

VINT3VINT1

100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N100N100N

100N

100N 100N 100N

10U

+


CMS CSC ELECTRONICS

BGB VMEctrl FPGA

EACH TWO BANKS HAVE ONE 4.7U AND THREE 0.1U CAPS EACH TWO BANKS HAVE ONE 4.7U AND TWO 0.1U CAPS EACH TWO BANKS HAVE ONE 4.7U AND TWO 0.1U CAPS

13D783E (Peripheral Crate VME Controller)

LOGIC7-29-2005_8:40 4

TP_B6_[32:0]TP_B6_10TP_B6_9TP_B6_8TP_B6_7TP_B6_6TP_B6_5TP_B6_4TP_B6_3TP_B6_2TP_B6_1TP_B6_0

TP_B6_11TP_B6_12TP_B6_13TP_B6_14TP_B6_15TP_B6_16TP_B6_17TP_B6_18TP_B6_19TP_B6_20TP_B6_21TP_B6_22TP_B6_23TP_B6_24TP_B6_25TP_B6_26TP_B6_27TP_B6_28TP_B6_29TP_B6_30TP_B6_31TP_B6_32

TPB6_0TPB6_1

TPCK1S

C1L

VTRX

V25P

TPB1_7

TP_B1_0TP_B1_1TP_B1_2 TP_B1_[7:0]TP_B1_3TP_B1_4TP_B1_5TP_B1_6TP_B1_7TPB1_6

C81LC73LC61L

TP_B2_26

TP_B2_0TP_B2_1TP_B2_2TP_B2_3TP_B2_4TP_B2_5TP_B2_6TP_B2_7TP_B2_8TP_B2_9 TP_B2_[26:0]TP_B2_10TP_B2_11TP_B2_12TP_B2_13TP_B2_14TP_B2_15TP_B2_16TP_B2_17TP_B2_18TP_B2_19TP_B2_20TP_B2_21TP_B2_22TP_B2_23TP_B2_24TP_B2_25

C57L

TPB2_24

C44L C45L

TP_B5_17TP_B5_16TP_B5_15TP_B5_14TP_B5_13TP_B5_12TP_B5_11TP_B5_10TP_B5_9

TP_B5_1TP_B5_2TP_B5_3TP_B5_4TP_B5_5TP_B5_6TP_B5_7TP_B5_8

TP_B5_18

TP_B5_0

TP_B5_[18:0]

V25PV25P

V25PV25P

TPCK3P

TPCK2S TP_CK_2S

TP_CK_1S

1K_N

L R12

L

V15P

TPB0_0 TP_B0_[3:0]TP_B0_2TP_B0_1

TP_B0_3

TP_B0_0

TPB6_31TPB6_30

TPB6_12

TPB2_18

TPB2_11TPB2_10

TPB2_9TPB2_8

TPB2_7TPB2_6

TPB2_5TPB2_4

TPB2_3

TPB1_4TPB1_3

TPB1_2

10N

C48LC47LC36LC35LC33LC31LC30LC28LC27LC25LC24LC22LC21LC19LC18LC16LC15LC14LC12LC11LC10LC8LC7LC6LC4LC3LC2L

1K

R16

L

V25P1K

_NL

R15L

1KR

11LV25P

R13L

1K

L12L13L14L15L16L17L18L19M11M20N11N20P11P20R11R20T11T20U11U20V11V20W11W20Y12Y13Y14Y15Y16Y18

A2A15A16A29B1B30R1R30T1T30AJ1AJ30AK2AK15AK16AK29

Y17Y19

U1L

FPGA_TDOFPGA_TCK

FPGA_TMSFPGA_TDI

DONECONFIG_CLK

V25P

L28M12M13M14M15M16M17M18M19N12N13N14N15N16N17N18N19P6P12P13P14P15P16P17P18P19P25R12R13R14R15R16R17R18R19T12T13T14T15T16T17T18T19U6U12U13U14U15U16U17U18U19U25V12V13V14V15V16V17V18V19W12W13W14W15W16W17W18W19Y3Y6Y11Y20Y25Y28AC1AC30AE6AE13AE18AE25AF5AF26AG4AG9AG12AG19AG22AG27AH3AH14AH17AH28AJ2AJ29

AK22

L20L25

L6L11L3

H30 H1F25 F18F13 F6E26 E5D27 D22D19 D12

D9 D4C28 C17C14 C3B29 B2A22 A9

AK9

U1L

AH6 AH12

AH19 AH25

C25 C19

C12 C6

AJ11

AJ17 AJ24

B24 B17

B11 B4

AJ6 AJ13

AJ19 AJ26

B26 B19

B13 B6

AC7AC8

D25H24

H23

AD24AC24 AC23

D6

AK4 AK11

AK17 AK24

A24 A17

A11 A4

AK5 AK12

AK18 AK25

A25 A18

A12 A5

G7 F26F5 H8

AK7 AK14

AK20 AK27

A27 A20

A14 A7

AK6 AK13

AK19 AK26

A26 A19

A13 A6

H7

AJ12

AJ18 AJ25

B25 B18

B12 B5

AJ7 AJ14

AJ20 AJ27

B27 B20

B14 B7

G24

AD7

AJ5AJ4

U1LV33P

C46LC9L C26L

V33P V25P

C5L C13L C34LC20L C23LC17L C32L

H6

H5 H4

H3 H2

H1

C43LC37L C40L C42LC38L C41LC39L

V25P

V25PV25P

VTTXVCC_AUX_TX

VCC_AUX_RX

RD+RD-

TD+TD-

V25P

V25PV25P

V25P

V25P

V25PV25P

V25PV25P

V25PV25P

V25P

V25P

V25PV25P

V25P

V25P

V25PV25P

V25P

R14

L

1K_N

L

PROGRAM

TPB0_1TPB0_2

TPB0_3

TPB1_0TPB1_1

TPB1_5

TPB2_2

TPB2_0TPB2_1

TPB2_12

TPB2_21TPB2_20

TPB2_19

TPB2_17TPB2_16

TPB2_15TPB2_14

TPB2_13

TPB6_18

TPB6_11TPB6_10

TPB6_9TPB6_8

TPB6_7TPB6_6

TPB6_5TPB6_4

TPB6_3TPB6_2

TPB6_21TPB6_20

TPB6_19

TPB6_17TPB6_16

TPB6_15TPB6_14

TPB6_13

TPB6_22

TPB6_28TPB6_29

TPB6_27TPB6_26

TPB6_25TPB6_24

TPB6_23

TPB6_32

TP_CK_3P

GND

TPB5_13TPB5_14

TPB5_15TPB5_16

TPB5_17

TPB5_12

TPB5_1TPB5_0

TPB5_2TPB5_3

TPB5_4TPB5_5

TPB5_6TPB5_7

TPB5_8TPB5_9

TPB5_10TPB5_11

TPB5_18

V25P

C55LC54L

TPB2_26TPB2_25

TPB2_23TPB2_22

C58LC56L C59L

C62LC60L C63L

C65L C66L C67L C68L C69L C70L C71L

V15P

C72L C74L C77LC76L C80LC79L C83LC82L C86LC85L

V25P

C89LC88LC75L C78L C84L C87L

V15P

H29

H28H27

H26

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

100N100N100N10U

+

100N 100N10U

+

100N 100N 100N

RE

D

BUSY

CLK

CLKOUT

D0D1

D2D3

D4D5

D6D7

GND17

GND2

GND23

GND31

GND36

GND46

GND7

NC1

NC14

NC16

NC18

NC3

NC35

NC37

NC39

NC40NC41

NC42

OE/RST*

REV_SEL0

REV_SEL1

TCK

TDI

TDOTMS

VCCJ

VCCO30

VCCO45

VCCO8

VINT15 VINT34

VINT4

CE

CEO

CF

EN_EXT_SELXILINX_PROM

XCF16PVO48C

VCCO38

CMS CSC ELECTRONICS

BGB Programming PROMFlash Memory for Programming the FPGA VMEctrl14D783E (Peripheral Crate VME Controller)

PROGPROM7-29-2005_8:49 1

5

12

9

2829

3233

4344

4748

17

2

23

31

36

46

7

1

14

16

18

3

35

37

3940

4142

11

2627

20

19

22

21

24

30

45

8

15 34

4

13

10

6

25

38

U1C

V25P

V25P

DONE

V18P

V25P

V18P

CONFIG_CLK

FPGA_BUSYEXJ_RESET

12

D8CLED

R2C

100Z

R1C

100Z

R0C

100Z

R7C100Z

R6C100Z

R5C100Z

R4C100Z

R3C100Z

C8CC7CC6CC5CC3CC2CC1C

1 2D3CRED

1 2RED D0C

PRD7

PRD6

PRD5

PRD4

PRD3

PRD2

PRD1

PRD0

1 2RED D7C

1 2RED D6C

1 2RED D5C

1 2RED D4C

1 2D2CRED

1 2RED D1C

C4C

100Z

R8C

PROM_TCK

PROM_TDI

PROM_TMS

PROM_TDO

PRD4

PRD3

PRD5

PRD2

PRD1

PRD0

PRD[0:7]

PRD6PRD7

R9C

3.3K

INIT

C9C C10C

V25P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

A3 A2A4A5A6A7A12NC2VCCWE

A1A0

I/O0I/O1I/O2

GNDI/O3I/O4I/O5I/O6I/O7

CEA10

NC1A8

OEA11A9 AT28BV64B-20TC

EEPROM

+

100N

CMS CSC ELECTRONICS

BGB VMEctrlFlaxh Memory for Configuration Options Memory15D783E (Peripheral Crate VME Controller)

FLASHMEM7-29-2005_8:51 1

C2MC1M

10U

14 15

13

12

11

10

9

8

7

6

16

17

18

19

20

21

22

23

24

25

26

27

28

5

4

1

2

3

U1M

V33P

FLASH_ADDRESS2

FLASH_ADDRESS[12:0]

FLASH_ADDRESS10

FLASH_ADDRESS0FLASH_ADDRESS1

FLASH_CTRL[2:0]

FLASH_CTRL2

FLASH_DATA[7:0]

FLASH_DATA7FLASH_DATA6FLASH_DATA5FLASH_DATA4FLASH_DATA3

FLASH_DATA2FLASH_DATA1FLASH_DATA0

FLASH_CTRL[2:0]

FLASH_CTRL1

FLASH_CTRL0

FLASH_ADDRESS[12:0]

FLASH_ADDRESS11FLASH_ADDRESS9FLASH_ADDRESS8

FLASH_ADDRESS12FLASH_ADDRESS7FLASH_ADDRESS6FLASH_ADDRESS5FLASH_ADDRESS4FLASH_ADDRESS3

V33P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

10U

+

100N

IDT74LVC157ADC

4Y

3Y

2Y

1Y

G

A

1A

1B

2A

2B

3A

3B

4A

4B

/B

MUX

CMS CSC ELECTRONICS

BGB JTAG InterfaceJTAG Interface to PROM and FPGA VMEctrl16D783E (Peripheral Crate VME Controller)

JTAGINT7-29-2005_8:49 1

FPGA_TDO

R10

J3.

3K

R9J

3.3K

R8J

3.3K

R7J

3.3K

R6J

470Z

R5J

470Z

R4J

470Z

R1J

470Z

R2J

470Z

R3J

470Z

12

9

7

4

15

1

2

3

5

6

11

10

14

13

U1J

V25P

C2JC1J

9

8 7

6 5

4 3

2

10

1J2J

1

10

2

34

56

78

9

J1J

FPGA_TDI

FPGA_TMSFPGA_TCK

CFPGATMS

CFPGATDI

CFPGATCK

CPROMTCK

F2PRM_TCKPROM_TDO

PROM_TDI

PROM_TMS

PROM_TCK

F2PRM_TDI

F2PRM_TMS

CPROMTMS

CPROMTDI

F2PRM

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

TDIS

RD-

RD+

TD-

VC

CR

VC

CT

VE

ET

VE

ER

TD+

SIGNAL_DETECT

CA

SE

3C

AS

E2

CA

SE

1C

AS

E0

Fiber Optic Transceiver

+

100N 100N

+

CMS CSC ELECTRONICS

BGB VMEctrlOptical Transceiver for Gigabit Ethernet (Finisar) Optical Transceiver17D783E (Peripheral Crate VME Controller)

17-29-2005_8:50 OPTO

C5T

10U

C6TC4T

VCCT VCCR

TD-

RD-

C3T

10U

1NC2T

1NC1T

SIG_DET

TDIS

TD+

RD+

8

4

5

10

267 1

9

3

14 13 12 11U1T

BR TR

TLBL

BR TR

TLBL

BR TR

TLBL

BR TR

TLBL

BR TR

TLBL

BR TR

TLBL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

BL

BR TR

TL

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

DG

S

FDC

6401N

DG

S

FDC

6401N

CMS CSC ELECTRONICS

BGB VMEctrl Status and Monitoring18D783E (Peripheral Crate VME Controller)

Status and Monitoring on Front Panel

STATUS7-29-2005_9:47 1

RX_PKT TX_PKT

R47S 100Z

R45S 100Z

STATUS[31:0]

STATUS9

STATUS14

STATUS13

STATUS12

STATUS11

STATUS10

STATUS8

STATUS7

STATUS6

STATUS5

STATUS4

STATUS3

STATUS2

STATUS1

STATUS15

STATUS0

STATUS[31:0]

STATUS25

STATUS30

STATUS29

STATUS28

STATUS27

STATUS26

STATUS24

STATUS23

STATUS22

STATUS21

STATUS20

STATUS19

STATUS18

STATUS17

STATUS31

STATUS16

R39S 100Z

R56S100Z

R54S100Z

R55S 100Z

R53S 100Z

FF_FULL

FF_PAF

FF_MT

FF_PAE

HARD_RESET_MONSYSRESET_MON

BBSY_MONBERR_MON

IRQ_MONWRITE_MON

DS_MONAS_MON

TX_ERRRX_ERR

ACTIVITY

M1S

SIG_DET_MON

V15P_MON

R8S 220Z

R6S 100Z

470ZR3S

V18P_MONM1S

V18P

220ZR2S

V15P

V33PR1S 470Z

R4S100Z V25P

470ZR5S

V5P

DONE

R7S 220Z

R10S 220Z

R12S 220Z

R14S 100Z

R16S 100Z

R18S 100Z

R20S 100Z

R22S 220Z

R24S 220Z

R9S 220Z

R11S 220Z

R13S 100Z

R15S 100Z

R17S 100Z

R19S 100Z

R21S 220Z

R23S 220Z

R32S100Z

R30S100Z

R28S 100Z

R31S 100Z

R34S100Z

R36S100Z

R38S100Z

R40S100Z

R42S100Z

R44S100Z

R46S100Z

R48S100Z

R33S 100Z

R35S 100Z

R37S 100Z

R41S 100Z

R43S 100Z

R50S100Z

R52S100Z

R49S 100Z

R51S 100Z

R25S 100Z

R27S 100Z

R29S 100Z

R26S100Z

D14S

D13S

D12S

D11S

D10S

D9S

D8S

D7S

D6S

D5S

D4S

D3S

D2S

D1S

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

10U

+

100N10U

+

10U

+

100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N 100N100N

IDT72T36125L10BB

LD BE

AS

YW

AS

YR

BM

HF

D35

D33D32D31D30

D34

D28D27D26D25

D23D22D21D20

D29

D24

Q30Q31Q32Q33Q34Q35

ER

CLK RCS

RENRCLK

OE

Q20Q21Q22Q23Q24Q25Q26Q27Q28Q29

WH

SLT

D18D17D16D15

D13D12D11D10D9D8D7D6D5D4D3D2D1 Q1

Q0

Q2Q3Q4Q5Q6Q7Q8Q9

Q10Q11Q12Q13Q14Q15Q16Q17Q18

D0

Q19D19

FSE

L1S

HS

LT

PA

FFF

_IR

TCK

TDI

TDO

TMS

TRS

T

PR

SM

RS

IW

WCSWENWCLK

VR

EF

D14

FSE

L0

FWFT

_SI

SE

NS

CLK

OW

ER

EN

MA

RK

RT

PA

EE

F_O

R

PFM

IPRH

SLT

FIFO36X256K

CMS CSC ELECTRONICS

BGB VMEctrlReset Management (Discrete Logic for Radiation Tolerance) Command Managment19D783E Peripheral Crate VME Controller)

17-29-2005_8:54 CMND_FIFO

H4

D14

D12

C10

L3

L1

M3

M2

M1

L2

N2

N1

P3

P2

R3

R2

R1

T2

N3

P1

N16

M18

M17

M16

L18

L17

V11

B13

B12

A12

A13

T18

T17

R18

R17

R16

P18

P17

P16

N18

N17

G4

U1

U2

V2

V3

T3

V4

U4

T4

V5

U6

U5

V6

T5

T6

V7

U7

T7 U11

T11

T12

T13

V12

U13

U12

V13

T14

U14

V14

T15

U15

V15

T16

U16

V16

V17

U17

V8

U18T1

D8

D7

B10

A10

V9

U9

T9 T8 U8

A8B

8

K4

C7

B7

A7

J4

U3

D6

D4

G2

G3

D5

A11

C12

C13

C11

B11

D15

D11

D13

D10C8

U1F

EF_

OR

C17F C18FC16FC15FC14FC12FC11FC10FC9FC8FC7FC6FC5FC4F

3.3K R

18F

AS

YR

V25P

WH

SLT

RH

SLT

VR

EF

PFM

IPAS

YW

FSE

L0

LD

FIFO

_JTA

G4

FIFO

_JTA

G0

FIFO

_JTA

G1

FIFO

_JTA

G2

FIFO

_JTA

G3

FIFO_JTAG[4:0]

V25P

FROM_FIFO20

FROM_FIFO25FROM_FIFO24FROM_FIFO23FROM_FIFO22FROM_FIFO21

FROM_FIFO19FROM_FIFO18FROM_FIFO17FROM_FIFO16

FROM_FIFO[35:0]

FROM_FIFO0FROM_FIFO1FROM_FIFO2FROM_FIFO3FROM_FIFO4FROM_FIFO5FROM_FIFO6FROM_FIFO7FROM_FIFO8FROM_FIFO9FROM_FIFO10FROM_FIFO11FROM_FIFO12FROM_FIFO13FROM_FIFO14FROM_FIFO15

FROM_FIFO27FROM_FIFO28FROM_FIFO29FROM_FIFO30FROM_FIFO31FROM_FIFO32FROM_FIFO33FROM_FIFO34FROM_FIFO35

FROM_FIFO26

RCS

REN

WCS

WEN

TP2F

1N

C26F

1N

C24FC23F

1N

C2F C3F

C19F

1N 1N

C22FC21F

1N1N

C20F C25F

1N 1N

C28FC27F

1N

TP3F

TP4F

TP5F

TP6F

TP7F

WCLK

RCLK

TO_FIFO20TO_FIFO21TO_FIFO22TO_FIFO23TO_FIFO24TO_FIFO25

TO_FIFO10TO_FIFO11TO_FIFO12TO_FIFO13TO_FIFO14TO_FIFO15TO_FIFO16TO_FIFO17TO_FIFO18TO_FIFO19

TO_FIFO9TO_FIFO8TO_FIFO7TO_FIFO6TO_FIFO5TO_FIFO4TO_FIFO3TO_FIFO2

TO_FIFO[35:0]

TO_FIFO0TO_FIFO1

TO_FIFO27TO_FIFO26

TO_FIFO29TO_FIFO28

TO_FIFO34TO_FIFO33TO_FIFO32TO_FIFO31TO_FIFO30

TO_FIFO35

R16F 3.3K

R15F 3.3K

R17F 3.3K

PA

FFF

_IR

MR

SP

RS

PA

E

HF

RCSRENRCLK

OEWCSWENWCLK

R14F 0Z

R12F 0Z

R13F 0Z

R8F 0Z

R7F 0Z

R5F 0Z

R4F 0Z

R2F 0Z

R1F 0Z

R11F 0Z

R3F 0Z

R6F 0Z

SH

SLT

FSE

L1

OW

BM

BE

IWFWFT_SI

ERCLKERENMARKRT

FSCLKSEN

R10F 0Z

R9F 0Z

1N

C31F

1N

C29F C30F

1N 1N

C33FC32F

1N

V25P

C13F

V25P

C1F

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC18

2B42B3

GND152B2

2B1

VCC31

2A42A3

GND342A2

2A11B8

1B7GND10

1B61B5

1A8

1A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B316_B

IT_BU

FFER

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC18

2B42B3

GND152B2

2B1

VCC31

2A42A3

GND342A2

2A11B8

1B7GND10

1B61B5

1A8

1A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B3

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC18

2B42B3

GND152B2

2B1

VCC31

2A42A3

GND342A2

2A11B8

1B7GND10

1B61B5

1A8

1A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B3

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR2B8 2A8

1A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B5

1B5

VCC31

2A61A6

GND342A5

1A52B4

1B4GND10

2B31B3

2A4

1A4GND39

2A31A3

VCC72B21B2

VCC422A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR2B8 2A8

1A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B5

1B5

VCC31

2A61A6

GND342A5

1A52B4

1B4GND10

2B31B3

2A4

1A4GND39

2A31A3

VCC72B21B2

VCC422A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR2B8 2A8

1A8GND28

2A71A7

1B8GND21

2B71B7

VCC182B6

1B6GND15

2B51B5

VCC312A6

1A6GND34

2A51A5

2B41B4GND10

2B31B3

2A41A4

GND39

2A31A3

VCC72B2

1B2

VCC422A2

1A2GND4

2B1

GND45

2A11A1

VCCBIAS

1B1

1DIR

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR2B8 2A8

1A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B5

1B5

VCC31

2A61A6

GND342A5

1A52B4

1B4GND10

2B31B3

2A4

1A4GND39

2A31A3

VCC72B21B2

VCC422A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR2B8 2A8

1A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B5

1B5

VCC31

2A61A6

GND342A5

1A52B4

1B4GND10

2B31B3

2A4

1A4GND39

2A31A3

VCC72B21B2

VCC422A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR

2B82A82A7

GND282A6

2A5

2B7

GND212B6

2B5VCC18

2B42B3

GND152B22B1

VCC31

2A42A3

GND342A22A1

1B81B7

GND101B6

1B5

1A81A7

GND391A6

1A5VCC7

1B4

VCC42

1A41A3

GND41B2

GND451A2

1A1 1B11DIR

2OE

1OE

1B3

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC18

2B42B3

GND152B2

2B1

VCC31

2A42A3

GND342A2

2A11B8

1B7GND10

1B61B5

1A8

1A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B3

CMS CSC ELECTRONICS

BGB VMEctrlVME Interface VME Interface20

D783E (Peripheral Crate VME Controller)VMEBLOCK7-29-2005_8:41 1

V5P

V5P

242326

2728

2930

2221

2019

1817

1615

1413

3132

3334

3536

12

1110

98

37

3839

4041

76

4243

444

3

45

4647 2

1

25

48

5

U1V

24

232627

2829

30

22

2120

1918

1716

1514

13

31

3233

3435

3612

1110

98

37

3839

4041

7

6

42

4344

43

4546

47 21

25

48

5

U9V

V5PV25P

DRV_AM

3.3K R58V

2524

23 2627

2829

30

22

2120

1918

1716

1514

13

31

3233

3435

361211

109

8

3738

3940

417

65

42

4344

43

4546

4748

21

U8V

VME_ADDRESS08

VME_ADDRESS15

VME_ADDRESS[31:00]

VME_ADDRESS14


VME_ADDRESS11

VME_ADDRESS10

VME_ADDRESS09

VME_AM5

VME_AM4

VME_AM[5:0]

VME_AM3

VME_AM2

VME_AM1

VME_AM0

DRV_DATA

VENA01

DRV_DATA

VENA03

DRV_DATA

VENA02

VENA[14:00]DRV_ADDR

VENA02

DRV_ADDR

VENA[14:00]

VENA00

VENA00

VENA00

VENA[14:00]

DRV_ADDR

VENA03

VENA01VENA02VENA00

VPC

VPCVPCVPC

2524

23 2627

2829

30

22

2120

1918

1716

1514

13

31

3233

3435

361211

109

8

3738

3940

417

65

42

4344

43

4546

4748

21

U2V

V25P

V5PV25PV5PV25PV25P

V5P

VME_DATA[31:00]

VME_DATA02

VME_DATA08

VME_DATA00


VME_DATA10


VME_DATA12


VME_DATA06

VME_DATA14


252423 26

2728

2930

2221

2019

181716

1514

13

313233

3435

3612

1110

98

37

3839

4041

76

5

4243

444

3

45

4647

48

2

1

U10V

2524

23 2627

2829

30

22

2120

1918

1716

1514

13

31

3233

3435

361211

109

8

3738

3940

417

65

42

4344

43

4546

4748

21

U6V

VME_ADDRESS31

VME_ADDRESS30

VME_ADDRESS29

VME_ADDRESS28

VME_ADDRESS27

VME_ADDRESS26

VME_ADDRESS25

VME_ADDRESS24

VME_ADDRESS[31:00]

2524

23 2627

2829

30

22

2120

1918

1716

1514

13

31

3233

3435

361211

109

8

3738

3940

417

65

42

4344

43

4546

4748

21

U4V

A31

A30

A29

A28

A27

A26

A25

A24

D01

D07

D06

D05

D04

D03

D02

D08

D15

D00

D09

D10

D11

D12

D13

D14

D31

D27

D25

D23

D20

D17

D30

D29D28

D26

D24

D22

D21

D19

D18

D16

VME_DATA29

VME_DATA31

VME_DATA30

VME_DATA20

VME_DATA[31:00]


VME_DATA18

VME_DATA19

VME_DATA21

VME_DATA22


VME_DATA25


VME_DATA28

VME_ADDRESS01

VME_ADDRESS03


VME_ADDRESS06

VME_ADDRESS07VME_ADDRESS16VME_ADDRESS17

VME_ADDRESS18

VME_ADDRESS19


VME_ADDRESS22

VME_ADDRESS23

VME_ADDRESS02

VME_ADDRESS[31:01]

A23

A22

A21A20

V5P

A19

A18

A17A16A07

A06

A05A04

A03

A02

A01

3.3K R50VV25P

3.3K R51VV25P

3.3K R52VV25P

3.3K R53VV25P

3.3K R54VV25P

3.3K R55VV25P

3.3K R56VV25P

3.3K R57VV25P

VENA00

VENA01

VENA[14:00]

VENA03

VENA[14:00]

R59V3.3KV25P

V25P

VPCA15

A14

A13

AM5

A12AM0A11

AM1

A10AM2

A09

AM3

A08AM4

VENA00

DRV_ADDR

3.3K R60V

3.3K R61V

5

48

25

1

24746

45

3

444

4342

67

4140

3938

37

89

1011

123635

3433

3231

1314

1516

1718

1920

2122

3029

2827

26 2324U5V24

2326

2728

2930

2221

2019

1817

1615

1413

3132

3334

3536

12

1110

98

37

3839

4041

76

4243

444

3

45

4647 2

1

25

48

5

U3V

5

48

25

1

24746

45

3

444

4342

67

4140

3938

37

89

1011

123635

3433

3231

1314

1516

1718

1920

2122

3029

2827

26 2324U7

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

ABT125

OEIN OUT

ABT125

OEIN OUT

ABT125

OEIN OUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC125

OEINOUT

16_BIT_B

UFFE

R

IDT74FC

T162H244A

TPV

3OE 4OE4Y44A4

4A3GND28

4A24A1

4Y3GND21

4Y24Y1

VCC183Y4

3Y3GND15

3Y23Y1

VCC313A4

3A3GND34

3A23A1

2Y42Y3

GND102Y2

2Y1

2A42A3

GND392A2

2A1VCC7

1Y4

1Y3

VCC421A4

1A3GND4

1Y2

GND45

1A21A1

2OE

1Y1

1OE

SN

74A

BTE

1624

6DL

11 B

IT X

CV

R W

ITH

3-S

T A

ND

OC

OU

TPU

TS

OE1BI

1BO 1A2A

GND283BI

3A

2BO

GND212BI

3BOVCC18

4BI4BOGND15

5BO6BO

VCC31

4A5BI

GND34

5A6A

6BI7BO

GND108BO

8BI

7BI7A

GND398A

9DIRVCC7

9B10B

VCC42

9A10A

GND411B

GND4510DIR

11AVCCBIAS

11DIR11OE

ABT125

OEIN OUT

LVC126

OEINOUT

LVC125

OEINOUT

ABT126

OEIN OUT

ABT126

OEIN OUT

ABT126

OEIN OUT

ABT126

OEIN OUT

CMS CSC ELECTRONICS


D783E (Peripheral Crate VME Controller)27-29-2005_8:41 VMEBLOCK

VENA07

V25P

VENA14

VENA14

VENA10

DRV_IRQ[7:1] DRV_IRQ6

DRV_IRQ1

DRV_IACK 13

12 11

U15V

89

10

U15V

4

5 6

U15V

32

1

U15V1

23

U16V

V25P

1

23

U18V

10KV27V

13

12 11U21V

DRV_LI/O

2524

23 262728

2930

2221

2019

1817

1615

1413

3132

3334

3536

1211

109

8

3738

3940

417

65

42

4344

4

3

45

4647

48

2

1

U13V

VPC

DRV_IRQ[7:0]

DRV_IRQ3

DRV_IRQ5

DRV_IRQ7

25 242326

2728

2930

2221

2019

1817

1615

1413

3132

3334

3536

12

1110

98

37

3839

4041

76

5

4243

444

3

45

4647

48

2

1

U11V

1

23

U22V

13

1211

U22V

10

98

U22V

4

56

U22V

10

9 8U21V

4

5 6U21V

1

2 3U21V

13

1211

U14V

13

1211

U16V

4

56

U16V

4

56

U14V

1

23

U14V

V5P

VENA05

BCLR

IACKOUT

DRV_BCLR

RESP

MON_BG0IN

MON_BG2IN

MON_BG3IN

MON_BG1IN

MON_BG[3:0]IN

MON_IRQ6

MON_IRQ5

MON_IRQ4

MON_IRQ3

MON_IRQ2

MON_IRQ1

MON_IRQ7

MON_IRQ[7:1]

10

98

U14V

DRV_IRQ2

DRV_IRQ4

DRV_ACFAIL

MON_ACFAIL

DRV_LWORD

DRV_AS

VME_AS

DRV_LWORD

DRV_ASDRV_WRITE

VENA10

10

98

U16V

VENA13

SYSCLK

AS

IRQ2

IRQ4

IRQ3

IRQ5IRQ6

IRQ7

IRQ1

ACFAIL

LWORD

VME_SYSCLK

VENA11

DRV_IACKOUT

VENA09

LI/O

WRITE

DRV_WRITE

DRV_AS

DRV_LWORD

VME_WRITE

DRV_WRITE

VME_LWORD

1

23

U17V4

56

U17V10

98

U17V13

1211

U17V

4

56

U18V10

98

U18V13

1211

U18V

VENA08

IACKINMON_IACKIN

MON_RESP

BG0IN

BG1IN

BG2IN

BG3IN

VENA04

BG0IN

VENA06

DRV_BG0IN

DRV_BG[3:0]IN

DRV_BG1IN

DRV_BG2IN

DRV_BG3IN

BG1IN

BG2IN

BG3IN

DRV_BG[3:0]OUT

DRV_BG3OUT

DRV_BG1OUTDRV_BG0OUT

DRV_BG2OUT

BG0OUTBG1OUT

BG2OUT

BG3OUT

MON_RETRY

MON_LI/I LI/I

VENA13

RETRY

IACK

DRV_IACK

VME_IACK

10K R33V

R32V10K

10K R31V

R30V10K

R36V10K

10K R35V

R34V10K

10K R29V V25P

V5P

13

1211

U24V

MON_BCLR

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

LVC125

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEINOUT

LVC126

OEIN OUT

LVC126

OEIN OUT

LVC125

OEINOUT

LVC125

OEINOUT

LVC126

OEINOUT

LVC126

OEIN OUT

LVC125

OEINOUT

SN

74A

BTE

1624

6DL

11 B

IT X

CV

R W

ITH

3-S

T A

ND

OC

OU

TPU

TS

OE1BI

1BO 1A2A

GND283BI

3A

2BO

GND212BI

3BOVCC18

4BI4BOGND15

5BO6BO

VCC31

4A5BI

GND34

5A6A

6BI7BO

GND108BO

8BI

7BI7A

GND398A

9DIRVCC7

9B10B

VCC42

9A10A

GND411B

GND4510DIR

11AVCCBIAS

11DIR11OE

LVC126

OEINOUT

CMS CSC ELECTRONICS


D783E (Peripheral Crate VME Contoller)37-29-2005_8:47 VMEBLOCK

V25P

1

23

U28V

V25P

10K R41V

R40V10K

10K R39V

R38V10K

R44V10K

10K R43V

R42V10K

10K R37V

2524

23 262728

2930

2221

2019

1817

1615

1413

3132

3334

3536

1211

109

8

3738

3940

417

65

42

4344

4

3

45

4647

48

2

1

U26V

VPC

VME_DTACK

1

23

U25V

1

2 3

U24V

V5P

DRV_BR[3:0]

DRV_BR0

DRV_BR2

DRV_BR3

DRV_SYSFAIL

DRV_BBSY

DRV_BR1

DRV_BERR

DRV_SYSRESET

MON_BR2

MON_BR1

MON_BR[3:0]

MON_BR3

MON_BR0

MON_BERR

MON_BBSY

MON_SYSFAIL

MON_SYSRESET

DRV_DTACK

DRV_DS

13

1211

U28V

DRV_DS

DRV_DS

DS0DTACK

SYSRESET

DRV_DSDS1

VENA10

VENA10

BR2

BR1

BERR

SYSFAIL

BR3

BBSY

BR010

98

U25V

4

56

U25V

4

5 6

U24V

10

9 8

U24V

1

23

U27V4

56

U27V10

98

U27V13

1211

U27V

4

56

U28V10

98

U28V

DRV_DS

DRV_DS

DRV_DTACK

DRV_DTACK

VME_DS[1:0]

VME_DS1

VME_DS0

11 12

13

U25V

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

A08

A09A10

A11A12

A13A14

A15A16

A17A18

A19A20A21

A22A23

AM5

BERR

D08

D09D10D11

D12D13

D14D15

GNDC9

LWORD

SYSFAIL

SYSRESET

V12P

V5PC32

VMEBUSP1 C

ACFAIL

AM0

AM1AM2AM3

BBSY

BCLR

BG0IN

BG0OUTBG1IN

BG1OUTBG2IN

BG2OUTBG3IN

BG3OUTBR0

BR1BR2

BR3

GNDB23

GNDB20

IRQ1

IRQ2IRQ3

IRQ4IRQ5

IRQ6IRQ7

SERA

SERB

V5PB32

V5PSTBY

VMEBUSP1 B

A01

A02A03

A04A05

A06A07

AM4

AS

D04D05

D06D07

DS0

DS1

DTACK

GNDA11

GNDA15

GNDA17

GNDA19

GNDA9

IACKIACKIN

IACKOUT

SYSCLK

V12N

V5PA32

WRITE

D00

D01

D03D02

VMEBUSP1 A

V33PD30

LI/OV33PD28

LI/IV33PD26

RSVBUSD25V33PD24

RSVBUSD23

V33PD18

GNDD2V1PV2P

RSVU5V1N

V2NRSVU8

GA2

V33PD12

V33PD16

GA1

GA3

GA4

RSVBUSD19

GAP

V33PD20RSVBUSD21

V33PD22

GA0

GNDD31

VPCD32

V33PD14

VPCD1

VMEBUSP1 D

GNDZ30

RSVBUSZ29GNDZ28

RSVBUSZ27GNDZ26

RSVBUSZ25GNDZ24

RSVBUSZ23

GNDZ18

MCLKGNDZ4

MSDGNDZ6

MMDGNDZ8

RSVBUSZ13

GNDZ12

GNDZ16

RESP

RSVBUSZ15

RSVBUSZ17

RSVBUSZ19

MCTL

GNDZ20RSVBUSZ21

GNDZ22

GNDZ10

RSVBUSZ31

GNDZ32

GNDZ14

MPR

GNDZ2

VMEBUSP1 Z

CMS CSC ELECTRONICS

BGB VMEctrlVME Interface VME Interface23D783E (Peripheral Crate VME Controller)

VMEBLOCK7-29-2005_8:47 4

3.3KR16V

3.3KR21V

3.3KR20V

3.3KR19V

3.3KR18V

3.3KR17V

Z30

Z29Z28

Z27Z26

Z25Z24Z23

Z18

Z3

Z4Z5

Z6Z7

Z8

Z13

Z12

Z16

Z11

Z15

Z17

Z19

Z9

Z20

Z21Z22

Z10

Z31

Z32

Z14

Z1

Z2

P1V

D30

D29D28

D27D26

D25D24D23

D18

D2D3

D4D5

D6D7

D8

D13

D12

D16

D11

D15

D17

D19

D9

D20

D21D22

D10

D31

D32

D14

D1

P1V

A30

A29A28

A27A26

A25A24A23

A18

A5

A6A7

A8

A13

A12

A16

A11

A15

A17

A19

A9

A20

A21A22

A10

A31

A32

A14

A1

A2

A4

A3

P1V

B3

B16

B17B18

B19

B1

B2

B4B5

B6B7

B8B9B10

B11B12

B13B14

B15

B23

B20

B30

B29B28

B27B26

B25B24

B21B22

B32

B31

P1V

C30

C29C28

C27C26

C25C24C23

C22C21

C20C19

C18C17

C16C15

C14

C11

C1

C2C3

C4C5

C6C7

C8C9

C13

C10

C12

C31

C32

P1V

GA

P

GA

1

GA

4

GA

3

GA

2

GA[4:0] GA

0

V25P

RESP

A08

D02D01

D00

WRITE

V5P_RAW

IACKOUTIACKIN

IACK

D07

D06

D04

AM4A07A06

A05

LI/O

LI/I

V1P

V2P

V2N

GA2

GA1

GA3

GA4

GAPGA0

A10

A11A12

A17

A18A19

A21

A23

AM5

BERR

D08

D09

D11D12

D13D14

D15

LWORD

SYSFAIL

ACFAIL

AM0

AM2

BR2

BR3

IRQ1

IRQ2IRQ3

IRQ4IRQ5

IRQ6

AM3

V1N

BG0IN

BG1IN

BG2IN

BG3IN

BG0OUT

BG1OUT

BG2OUT

BG3OUT

BBSY

BCLR

IRQ7

BR0

BR1

D03

D05

A04

A03A02

A01

AM1

A22

A20

A16

A15A14A13

A09

SYSRESET

D10

SYSCLK

AS

DS0

DS1

DTACK

VPC_RAWV5P_RAWV5P_RAW

VPC_RAW

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC182B4

2B3GND15

2B2

2B1

VCC312A4

2A3GND342A2

2A11B8

1B7GND10

1B61B5

1A8

1A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B3

16_BIT_B

UFFE

R

SN

74LVC

R16245A

DL

2DIR2B82A8

2A7GND28

2A62A5

2B7GND21

2B62B5

VCC182B4

2B3GND15

2B22B1

VCC312A4

2A3GND34

2A22A1

1B81B7

GND10

1B61B5

1A81A7GND39

1A61A5

VCC71B4

VCC421A4

1A3GND4

1B2

GND45

1A21A1 1B1

1DIR

2OE

1OE

1B3

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR

2B8 2A81A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B51B5

VCC31

2A61A6

GND342A51A5

2B41B4

GND102B3

1B3

2A41A4

GND392A3

1A3VCC7

2B21B2

VCC42

2A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

16_B

IT_B

UFF

ER

SN

74A

BTE

1624

5DL

OE252DIR

2B8 2A81A8

GND282A7

1A7

1B8

GND212B7

1B7VCC18

2B61B6

GND152B5

1B5

VCC31

2A61A6

GND342A5

1A52B4

1B4GND102B3

1B3

2A4

1A4GND39

2A3

1A3VCC7

2B21B2

VCC42

2A21A2

GND42B1

GND452A1

1A1VCCBIAS

1B11DIR

CMS CSC ELECTRONICS


57-29-2005_8:46 VMEBLOCK

2524

23 2627

2829

30

22

2120

1918

1716

151413

31

3233

343536

1211

109

8

3738

3940

417

65

42

4344

43

4546

4748

21

U30V

V_UD10

1

2

48

4746

45

3

44443

42

56

741

4039

3837

8

910

1112

3635

3433

3231

1314

1516

1718

192021

22

302928

272623

24 25U32V

V_UD18

V_UD19

V_UD20

V_UD21

V_UD22

V_UD23

V_UD24

V_UD2

V_UD3

V_UD4

V_UD5

V_UD6

V_UD7

V_UD8

VENA12 DRV_UD3

V5P

DRV_UD1

DRV_UD2 DRV_UD4

DRV_UD[4:1]

V25P V25P

24

232627

282930

22

212019

1817

1615

1413

3132

3334

3536

1211

109

8

3738

3940

417

65

42

4344

4

3

45

4647 2

1

25

48

U31V242326

2728

2930

2221

2019

1817

1615

1413

3132

3334

3536

121110

98

373839

4041

76

5

4243

444

3

45

4647 2

1

25

48

U29V

VENA12

V_UD17

UD[32:1]

UD6

UD2

UD16UD15

UD7

UD13

UD12UD11

UD10UD9

UD8

UD5

UD4UD3

UD1

UD14

VENA12

V_UD16

V_UD1VPC

V5PVPC

V_UD32

VENA12

VENA12

VENA[14:00]

UD31

UD29

UD28

UD27

UD26UD25

UD24UD23

UD21

UD19

UD18UD17

UD30

UD32

UD[32:1]

UD20

UD22

VENA12

VENA[14:00]

V_UD9

V_UD11

V_UD12

V_UD13

V_UD14

V_UD15

V_UD25

V_UD26

V_UD27

V_UD28

V_UD29

V_UD30

V_UD31

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

100N

100N100N

10U

+

10U

+

100N100N

100N100N

100N

100N100N

100N100N

100N100N

100N100N

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

100N 100N 100N 100N 100N 100N 100N 100N

100N 100N 100N 100N 100N 100N 100N 100N

100N 100N 100N 100N 100N 100N 100N 100N

10U

+

10U

+

10U

+

10U

+

100N 100N 100N 100N 100N

10U

+

100N 100N 100N 100N 100N 100N 100N 100N

100N 100N 100N 100N 100N 100N 100N 100N

100N 100N 100N 100N 100N 100N 100N 100N

100N

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

100N 100N 100N 100N 100N 100N 100N

10U

+

100N

VME64X_P2_D

GNDD31

UsrDef_D1

UsrDef_D10UsrDef_D11


UsrDef_D14UsrDef_D15UsrDef_D16


UsrDef_D19

UsrDef_D2

UsrDef_D20





UsrDef_D29

UsrDef_D3

UsrDef_D30

UsrDef_D4UsrDef_D5

UsrDef_D6UsrDef_D7

UsrDef_D8UsrDef_D9

VPCD32

VMEBUSP2 D

VME64X_P2_B

A24A25

A26A27

A28A29A30

A31

D16

D17D18

D19D20

D21D22

D23

D24D25

D26D27D28

D29D30

D31

GNDB12

GNDB2

GNDB22

RETRY

GNDB31

V5PB13

V5PB1

V5PB32

VMEBUSP2 B

VME64X_P2_A

UsrDef_A1

UsrDef_A10

UsrDef_A11UsrDef_A12




UsrDef_A19

UsrDef_A2

UsrDef_A20



UsrDef_A25UsrDef_A26UsrDef_A27


UsrDef_A3


UsrDef_A32

UsrDef_A4UsrDef_A5

UsrDef_A6UsrDef_A7

UsrDef_A8UsrDef_A9

VMEBUSP2 A

VME64X_P2_Z

GNDZ10

GNDZ12

GNDZ14

GNDZ16

GNDZ18

GNDZ20

GNDZ22

GNDZ23

GNDZ24

GNDZ26

GNDZ28

GNDZ30

GNDZ32

GNDZ4

GNDZ6

GNDZ8

UsrDef_Z1

UsrDef_Z11

UsrDef_Z13

UsrDef_Z15

UsrDef_Z17

UsrDef_Z19

UsrDef_Z21

UsrDef_Z23

UsrDef_Z25

UsrDef_Z27

UsrDef_Z29

UsrDef_Z3

UsrDef_Z31

UsrDef_Z5

UsrDef_Z7

UsrDef_Z9

VMEBUSP2 Z

10U

+

10U

+

VME64X_P2_C

UsrDef_C1

UsrDef_C10

UsrDef_C11UsrDef_C12




UsrDef_C19

UsrDef_C2

UsrDef_C20



UsrDef_C25UsrDef_C26UsrDef_C27


UsrDef_C3


UsrDef_C32

UsrDef_C4UsrDef_C5

UsrDef_C6UsrDef_C7

UsrDef_C8UsrDef_C9

VMEBUSP2 C

100N

10U

+

100N100N

10U

+

LMV7235M5

CMS CSC ELECTRONICS


VMEBLOCK7-29-2005_8:46 6

V5PV25P

MON_HARD_RESET470ZR5

R63V100K 5

2

4

3

1

U33V

C05V

C11V C12V

13.2KR49V

V5P

GND

C46V

GND

V5P

C99V

R62V3.3K

GND

V25P

C1

C10C11

C12C13

C14C15C16

C17C18

C19

C2

C20

C21C22

C23C24

C25C26

C27C28

C29

C3

C30

C31C32

C4C5

C6C7

C8C9

P2V

VPC_RAW

C60V C61V

Z10

Z12

Z14

Z16

Z18

Z20

Z22

Z2

Z24

Z26

Z28

Z30

Z32

Z4

Z6

Z8

Z1

Z11

Z13

Z15

Z17

Z19

Z21

Z23

Z25

Z27

Z29

Z3

Z31

Z5

Z7

Z9

P2V

A1

A10A11

A12A13

A14A15A16

A17A18

A19

A2

A20

A21A22

A23A24

A25A26

A27A28

A29

A3

A30

A31A32

A4A5

A6A7

A8A9

P2V

B4B5

B6B7

B8B9

B10B11

B14B15B16

B17B18

B19B20

B21

B23B24

B25B26

B27B28

B29B30

B12

B2

B22

B3

B31

B13

B1

B32

P2V

D31

D1

D10D11

D12D13

D14D15

D16D17

D18D19

D2

D20D21D22

D23D24

D25D26

D27D28

D29

D3

D30

D4D5

D6D7

D8D9

D32

P2V

V5P_RAW

C62V

C01V

C20VC18VC17VC16VC15VC14VC13V

C10VC09VC08VC07VC06VC04VC03VC02V

C19V




RETRY

A31A30

A28

A26

A25

D17

D19D20

D21D22

D24D25

D31

A27

A29

D16

D18

D23

D26D27

D28D29

D30

A24

C55V

C69VC68VC66VC65VC63V

C58VC57VC56V C59V




C54VC53VC52VC51VC50VC48VC47V C49V

GND

V25P

C105VC104V

C106VC107V

GND

C108VC109V

V25P

GND

C110VC111V

V25P

GND

C112VC113V

V25P

C98V

C100VC101V

GND

V5P

C102VC103V

C94V C95V

GND

C96V C97V

V_UD29

V_UD28V_UD27

V_UD26

V_UD[32:1]

V_UD1

V_UD2V_UD3

V_UD5

V_UD6V_UD7

V_UD9

V_UD10V_UD11

V_UD12V_UD13

V_UD14V_UD15V_UD16

V_UD17V_UD18

V_UD19V_UD20

V_UD21V_UD22

V_UD23V_UD24

V_UD25

V_UD4

V_UD8

V_UD30

V_UD31V_UD32

V25P

GND

GND

V5P

C64V

HARD_RESET

HARD_RESET

V5P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

GND3 RESET

GND1VCC

DS1233AZ

BA

100N100N100N 100N10U

+

SN74LV123AD

B

R/C

A

CLR Q

Q

C

100N100N100N100N100N 100N 100N 100N100N100N100N100N100N 100N 100N 100N10U

+

10U

+

100N

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

GND3 RESET

GND1VCC

DS1233AZ

BAON

SN74LVC2G66DCT

BAON

SN74LVC2G66DCT

BAON

SN74LVC2G66DCT

BAON

SN74LVC2G66DCT

BAON

SN74LVC2G66DCT

BAON

SN74LVC2G66DCT

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

SN74LVC06AD

10U

+

10U

+

10U

+

10U

+

FRONT PANEL

PUSHBUTTON RESET

Check Decal for Switch!

Last time it was wrong.

CMS CSC ELECTRONICS

BGB VMEctrlReset Management (Discrete Logic for Radiation Tolerance) Reset Management

Common Components

26D783E (Peripheral Crate VME Controller)RSTMAN7-29-2005_8:52 1

C1R

100N

C36RC33RC32R C37R

89

U7R

1213

U7R

11 10

U7R

65

U7R

43

U7R

21

U7R

3

5 6

U6R

21

7 U6R

3

5 6

U5R

21

7 U5R

3

5 6

U4R

21

7 U4R

4 2

13

U3R

89

U2R

11 10

U2R

1213

U2R

65

U2R

43

U2R

21

U2R

2

15

1

3

4

13

14

U1R

10KR26R

PWR_RST

CMN_TMOUT

CMN_TMOUT

SHDWN0

SHDWN1

SHDWN2

FPR

SR

HR

INTR

EXJR

R13R3.3K

R16R3.3K 3.3K

R15R R14R3.3K 3.3K

R12R

EN_SR

R17R3.3K3.3K

R22R R20R3.3K

R18R3.3K

FP_RESET

MON_SYSRESET

MON_HARD_RESET

EXJ_RESET

INT_RESET

C27R

V25P

2MR1R

C35R

V25P

EN_INTR

EN_EXJR

EN_HR

EN_FPR

C34R C14RC13RC12RC11R C15R C16R C17R C18R C22RC21RC20RC19R C23R C24R C25R

R29R10K

R24R1K

1KR25R

PROGRAM

V25P

V25P

RSLT2

RSLT1

RSLT0

C26R

R21R3.3K 3.3K

R19R

R23R1K

R11R1K 1K

R10R R9R1K

V25P

V33P

1KR5R

100P

C5R

V25P

10KR28R

V25P

10KR27R

V25P

10

7

9

11

12

5

6

U1R

R30R10K

C38R C31RC28R C29R C30R

V25P

21

SW

1S

C1S

100P

4 2

13

U1S

FP_RESET

V33P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

SN74LVC08AD

SN74LVC08AD

SN74LVC08AD

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC10AD

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC08AD

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC08ADSN74LVC02AD

SN74LVC08AD SN74LVC02AD

CMS CSC ELECTRONICS

BGB VMEctrlReset Management (Discrete Logic for Radiation Tolerance) Reset Management27

D783E (Peripheral Crate VME Cotnroller)RSTMAN7-29-2005_8:52 2

2MR40R

2MR2R

C2R

200N

SHDWN[2:0]SHDWN0

R35

R

10KR34

R

10KR33R

10K

1311

12 U12R

1211

13 U11R

12

3 U12R13

2 U11R

CLR_REQ0

2

3

6

41

5

U14R

1211

13 U9R

10

7

9

11

12

5

6

U8R

2

15

1

3

4

13

14

U8R

RSLT0

1

122

13U10R

SH_RDY0PRG0

TM_OUT0

RDY0

CMN_TMOUT

RDY4SHDWN

CLR_RDY0

CLR0

CMN_TMOUT

PWR_RST

INTR

RSLT0

R31R3.3K

SHDWN_REQ0

V25P

V25P

V25P

V25P

HR

FPR

SR

V25P

V25P

2KR6R

100P

C6R

V25P

V25P

V25P

EXJR

V25P

V25P

R32R10K

2

3

6

41

5

U13R

12

11

8

1013

9

U13R

13

2 U9R

46

5 U9R

98

10 U9R

V25P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

SN74LVC08AD

SN74LVC08AD

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC02AD

SN74LVC08AD

SN74LVC08AD

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC08AD

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC10AD

CMS CSC ELECTRONICS


D783E (Peripheral Crate VME Controller)37-29-2005_8:53 RSTMAN

2MR41R

2MR3R

C3R

200N

3

64

5U10R

10

7

9

11

12

5

6

U15R

12

11

8

1013

9

U14R

46

5 U11R

2

3

6

41

5

U17R

98

10 U16R

46

5 U16R

45

6 U12R

2KR7R

100P

C7R

2

15

1

3

4

13

14

U15R

12

11

8

1013

9

U17R

13

2 U16R

1211

13 U16R

SH_RDY1PRG1

TM_OUT1

RDY1

CLR_REQ1

CMN_TMOUT

RDY4SHDWN

CLR_RDY1

CLR1

CMN_TMOUT

PWR_RST

INTR

RSLT1

RSLT1

SHDWN_REQ1

SHDWN1

V25P

V25P

V25P

V25P

HR

FPR

SR

V25P

V25P

V25P

V25P

V25P

EXJR

V25P

V25P

V25P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

SN74LVC10AD

SN74LVC08AD

SN74LVC08AD

SN74LVC08AD

SN74LVC08AD

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LV123AD

B

R/C

A

CLR Q

Q

C

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC74AD

D-FLIP-FLOP

D

CLK

Q

PRE

CLR

Q

SN74LVC08ADSN74LVC02AD

CMS CSC ELECTRONICS


D783E (Peripheral Crate VME Controller)RSTMAN7-29-2005_8:53 4

R42R2M

C4R

200N

R36

R

10K R37

R

10K

2KR8R

108

9 U12R98

10 U11R

12

11

8

1013

9

U21R

2

3

6

41

5

U21R

100P

C8R

2

15

1

3

4

13

14

U18R

2

3

6

41

5

U20R

12

11

8

1013

9

U20R

10

7

9

11

12

5

6

U18R

13

2 U19R

46

5 U19R

98

10 U19R

1211

13 U19R

PRG2

TM_OUT2

RDY2

CLR_REQ2

CMN_TMOUT

RDY4SHDWN

CLR_RDY2

CLR2

CMN_TMOUT

PWR_RST

INTR

RSLT2

RSLT2

SHDWN_REQ2

SHDWN2

V25P

V25P

V25P

V25P

HR

FPR

SR

V25P

V25P

V25P

V25P

V25P

EXJR

V25P

V25P

SH_RDY2

R38R3.3K 3.3K

R39R

V25P

9

810

11U10R

V25P

R4R2M

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

100N

H1H2

H3H4H5

VME 9UCrossBrace

H1H2

H3H4

H5H6

VME 9UBoardStiffener

100N

100N

100N

100N

100N

100N

100N

100N

10U

+

1U

1U

1U

1U

100N100N

100N100N100N

100N

100N

100N

10U

+

10U

+

10U

+

10U

+

10U

+

10U

++

100N10U

+

10U

+

10U

+

10U

+

10U

+

10U

+

100N

100N

5AMP

GND

ON/OFF VADJ

VIN VOPQ07VZ012Z

TAB

GNDON/OFF VADJ

VIN VOPQ07VZ012Z

TAB

GNDON/OFF VADJ

VIN VO

PQ07VZ012Z

TAB

GND

ON/OFF VADJ

VIN VOPQ07VZ012Z

TAB

H1

H2H3H4

H5

VME 9UCrossBrace

100N

100N

10U

+

10U

+

10U

+10U

+

10U

+

CMS CSC ELECTRONICS

BGB VMEctrlPower Distribution and Managment Power30

D783E (Peripheral Crate VME Controller)PWRMAN7-29-2005_8:45 1

C26P

C42PC40P

C36P C38P

C30P

10N

C5P

C34P

1H30

H50

H51 H53H54 H52

1

23

45

J3

R1

2M

1J1

5

2 4

1 36

U4P

5

2 4

1 3

6

U3P

5

2 4

1 36

U1P

5

2 4

1 36

U2P

V25P_REG

H11H7

F5P

2AMP

F1P

TP7P

TP6P

R7P

A

200Z

1%

R5P

B

999G

R5P

A

1.0K

1%

R3P

B

999G

R3P

A

1.0K

1%

R1P

A

3.32

K 1

%

TP1P

C37P

C23P C24PC22PC4P

C18P

C12P

C8P

V5P_RAW

V33P

V5P

C6P

1.2UH

L1P

VCCT

VCCR

V25P

C1P47U

1.0K

1%

R2P

C20P

C29P

C33PC31P

1.0K

1%

R4P

1.0K

1%

R8P

C44PC46P

1.0K

1%

R6P

1.2UH

L7P

1.2UH

L6P

1.2UH

L5P

1.2UH

L4P

1.2UH

L3P

1.2UH

L2P

C2P

C3P

68P

C19P

C7P

68P C9P

C14P

C15P

68P C17P C45P

C10P

C11P

68P C13P

V5P_FUSED

V15P

L8P

L12P

L10P

L9P

0.22U

C50P

0.22U

C49P

0.22U

C48P

0.22U

C51P

VRIO25 VCC_AUX_RX

VCC_AUX_TX

VTTX

VTRX

C16PC47P

C39P

C21P

C43P

10N

C35P

C25P

C28P

C32P

C27P

VPC_RAW VPC

TP2P

TP3P

TP4P

TP5P

R1P

B

3.32

K 1

%

V33P_REG

V25P_REG2

R7P

B

999G

V1.5P_REG

TP8P

TP9P

TP10P

H8 H10H9 H14 H13H12

H22 H21H20H19 H18H17H16 H15

H25H24 H23H49

1

23

456

J5

1J2

2M

R2

R4

2M2M

R3

5

43

21

J4

J15

J14

J13

J12

J11

J10

J9

J8

J7

J6

1H31

1H32

1H35

1H34

1H33

H109 H108H107 H106

C41P

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

10U

+

100N100N100N 10U

+

10U

+ 100NGND

ON/OFF VADJ

VIN VOPQ07VZ012Z

TAB

CMS CSC ELECTRONICS

BGB VMEctrlPower Distribution and Managment Power31

D783E (Peripheral Crate VME Controller)PWRMAN7-29-2005_8:48 2

5

2 4

1 36

U5P C59PC53P

68P

1.0K

1%

R10

P

R9P

B

999G

V1.8P_REG V18P

R9P

A

440Z

1%

V5P_FUSED

C56PC58P

1.2UH

L13P

C52P C55P C57PC54P

1 H65

1 H64

1 H63

1H73

1H72

1H71

1H39

1H38

1H37

1H36

1H43

1H42

1H411H40 1 H57

1 H56

1 H55

1 H48

1 H471 H46

1 H451 H44

1 H62

1 H61

1 H601 H591 H58

1H70

1H69

1H681H671H66

1 H105

1 H104

1 H103

1H102

1H101

1H100

1H99

1H98

1H97

1H96

1H95

1H94

1H931H92 1 H91

1 H90

1 H89

1 H88

1 H871 H86

1 H851 H84

1 H83

1 H82

1 H811 H801 H79

1H78

1H77

1H761H751H74

4

3

2

1

4

3

2

1

DCBA

TITLE PARENT PAGEBY

DATE FILE

.PAGE


OHIOTHE

STATEUNIVERSITY

CON20X CON20X

CON20XCON20X CON20X

CON20X

CON02X CON02X CON02X

CMS CSC ELECTRONICS

BGB VMEctrlLogic Analyzer Test Ports Logic Analyzer Ports32D783E (Peripheral Crate VME Controller)

ANALYZER7-29-2005_8:54 1

TEST_PORT_B0

TEST_PORT_A15

TEST_PORT_A14

TEST_PORT_A13

TEST_PORT_A12

TEST_PORT_A10

TEST_PORT_A8

TEST_PORT_A5

TEST_PORT_A3

TEST_PORT_A2

TEST_PORT_A1

TEST_PORT_A0

TEST_PORT_B[15:0]TEST_PORT_A[15:0]

CK_TPC

TEST_PORT_C0

21J9A

21J8A

21J7A

TEST_PORT_C3

TEST_PORT_C2

TEST_PORT_B10

TEST_PORT_B8

TEST_PORT_B3

TEST_PORT_A4

TEST_PORT_A6

TEST_PORT_A7

TEST_PORT_A9

TEST_PORT_A11

TEST_PORT_B1

TEST_PORT_B2

TEST_PORT_B4

TEST_PORT_B5

TEST_PORT_B6

TEST_PORT_B7

TEST_PORT_B9

TEST_PORT_B11

TEST_PORT_B12

TEST_PORT_B13

TEST_PORT_B14

TEST_PORT_B15

TEST_PORT_C1

TEST_PORT_C4

TEST_PORT_C5

TEST_PORT_C6

TEST_PORT_C7

TEST_PORT_C8

TEST_PORT_C9

TEST_PORT_C10

TEST_PORT_C11

TEST_PORT_C12

TEST_PORT_C13

TEST_PORT_C14

TEST_PORT_C15

CK_TPBCK_TPA

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J3A

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J6A

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J2A

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J4A

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J5A

16

1

3

5 6

4

2

7 8

9 10

11 12

13 14

15

J1A

TEST_PORT_C[15:0]

vme controller - physicscms/gbe_ctrl/d783e.pdf · vme controller vmectrl mojo 191 west woodruff ave...

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