vxs cover
DESCRIPTION
VXS Cover. VME Switched Serial. “VXS” is a trademark of VITA. VXS Overview. Adds switched serial interconnect(s) to the VME architecture coincident with the VMEbus parallel bus. Employs standard open technology for the serial switched links. - PowerPoint PPT PresentationTRANSCRIPT
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VXS Cover
VMESwitched
Serial
“VXS” is a trademark of VITA
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VXS Overview
• Adds switched serial interconnect(s) to the VME architecture coincident with the VMEbus parallel bus.
• Employs standard open technology for the serial switched links.• Accommodates multiple switched serial technologies, but not
necessarily at the same time.• Utilizes MULTIGIG RT 2 connector in P0 position. Demonstrated
to support 10 Gb/s.• Pulls additional DC power onto each VME card over existing
P1/P2 pins (VITA 1.7).• Maintains backward compatibility.
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VXS Family of Standards
ANSI/VITA Standard
Draft Standard
VXS 41.1
InfiniBand Protocol Layer
VXS 41.2
Serial RapidIO Protocol Layer
VXS 41.8
10GbE Protocol Layer
VXS 41.3
GbE Protocol Layer
VXS 41.4
PCI Express Protocol Layer
VXS 41.5
Aurora Protocol Layer
VXS 41.6
1x Gigabit Ethernet Control
Channel Layer
VXS 41.0VMEbus Switched Serial
Base Specification
VXS 41.10
Live InsertionSystem
Requirements
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Relative Bus Performance
Feature PCI bus PCI-X VME64 2eSST VME VXS
Topology Shared bus Shared bus Shared bus Shared bus Switched serial
Theoretical maximum bandwidth 264 MB/s 1064 MB/s 80 MB/s 320+ MB/s 2.5 Gb/s per
1x link
Practical maximum bandwidth ~100 MB/s ~760 MB/s ~40 MB/s 320 MB/s 8 Gb/s
Simultaneous transactions 1 1 1 1 Many
Aggregate bandwidth ~100 MB/s ~760 MB/s ~40 MB/s 320 MB/s 36 GB/s
Bus performance is a reason to use VME!
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Why VXS?
• The most demanding applications (e.g. SPE, radar, sonar, image processing, etc.) require:– High performance, scalable processing power– Very high data transfer capabilities– Extremely low latency
• Currently these applications make use of:– VMEbus for “control plane” communication– A proprietary or quasi-standard bus for “data plane” communication
• Standard interfaces are now able to address these needs and provide:– Less Contention– Increased Scalability– Less Routing Real Estate– Higher Bandwidth– Low Latency
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Multiple Topologies
Dual Star Single Star Mesh
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VXS components
Payload board Switch board
Example backplaneNote: not all backplanes would need a switch!
P0 connector200 insertions
Courtesy Tyco Electronicswww.multigigrt.com
Alignment and Protocol Keying
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VMEbus
VXS Switch Card Connection Example
SwItch
slot
P2
P0
P1An example
8 user-slot,1 switch card backplane
FabricSwitch
Slot 1 linkSlot 2 linkSlot 3 linkSlot 4 linkSlot 5 linkSlot 6 linkSlot 7 linkSlot 8 link
VXS Switch Card (no VME)
Logical connections to switch card
Slot8
P1
P0
P2
Slot1
P1
P0
P2
Slot2
P1
P0
P2
Slot3
P1
P2
Slot4
P1
P0
P2
Slot5
P1
P0
P2
Slot6
P0 Slot7
P0
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VXS Backplane
VME – VXS Compatibility
2eSSTVMELegacy
VME
VXS +2eSST VME
Fabric Only VXS(no parallel bus)
Parallel Bus Compatible
Switched Serial Compatible
All of these cards can coexist in the same VXS chassis
Cap
abili
ty
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Payload Board
Top Handle
Bottom Handle
Front Panel4 HP
P1
P2
P0K0
Photo courtesy of TEK Microsystems, Inc.
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Switch Board
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VXS: Connectors
VITA 41 payload board P0 connector
VITA 41 switch card P1-P5 connectors
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VXS Suppliers
Supplier SBC Switch
DSP/FPG
A
A/D Converter
Digitizer (DAC)
Backplane
Chassis/Enclosur
e
Extender Card
Software Defined Radi
o
Receiver
RF Tune
r
Data Recorde
r
Systems
Developmen
t Platform
Concurrent Technologies Plc CSP Inc. Curtiss-Wright Controls, Inc. Elma Bustronic Corporation Elma Electronic Inc. EVOC Intelligent Technology
Hartmann Electronic Mercury Computer Systems, Inc. Meritec / Joy Signal Technology Pentek, Inc. SIE Computing Solutions TEK Microsystems, Inc. W-IE-NE-R, Plein & Baus GmbH
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VXS Products
TEK Microsystems, Inc.Atlas
TEK Microsystems, Inc.ADC-DCA
Pentek, Inc.4207
CSP Inc.M16 Switch
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VXS Products
Elma VXS 18 Slot
Hartmann VXS Backplane
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VXS
Details
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VXS is Fabric Agnostic
• VXS provides multi Gb/sec serial switched fabric capability to Eurocard VMEbus form factor using P0
• Accommodates multiple interconnect technologies– 41.1 – InfiniBand– 41.2 – Serial RapidIO– 41.3 – 1000BaseCX Ethernet – 41.4 – PCI Express– 41.5 – Aurora– 41.6 – 1x Gigabit Ethernet Control– 41.8 – 10GbEthernet
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Performance for the Future!
1 MB/s 10 MB/s 100 MB/s 1 GB/s 100 GB/s10 GB/s
VME64 MBLT
VME64 MBLT w/Tsi148
VME 2eSST w/Tsi148
VXS Generation 1(3.125 Gbps links)
VXS Generation 2(5.0 Gbps links)
VXS Generation 3(6.4 Gbps links)
VXS = 8 lanes/slot x 18 slots/chassis
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VXS versus VPX
VXS VPX30G Performance x xFull ecosystem x xBackwards compatibility x w/hybrid onlyUse of both PMCs & XMCs x XMC onlyLow hardware costs xLow software upgrade costs xSimple design, implementation xFully defined and mature specification xMore available slots in 19" chassis (typical) x100G+ performance xAmount of user IO xStandard RTM connector/solution x varies
Slot pitch .8" payload1.0" switch 1.0" typical
Base Maximum channels Switch: 192 pairs, Payload: 16 pairs
6U: 192 pairs3U: 64 pairs
Sizes 6U 3U, 6UVoltages 3.3V, +V5, +-V12 5V, 12V, 48VTopologies (typical) Star, Dual Star Mesh, Hybrid
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VXS Market Opportunities
• Program requirements are demanding VXS solutions! • VXS allows existing deployed systems to scale in compute
capacity and capability while preserving past hardware and software investments. New applications with the same I/O.– Combat Vehicle Systems– Medical: CT, MRI, X-Ray
• VXS permits customers to migrate to, and bridge from, current legacy interconnects to unifying high performance network.– Navy Shipboard Systems
• VXS permits high speed data pipes and content alongside real time processing.– Airborne ISR
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Payload P0 Pin Definition
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• RapidIO Pinout• Each payload board
supports up to two 4X Serial RapidIO ports.
Example Fabric PinoutVITA 41.2
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Insertion Force
Switch Board
Mating Force Unmating ForceTest Value Maximum Test Value Minimum
P5 82 N 108 N 39 N 22 NP4 82 N 108 N 39 N 22 NP3 82 N 108 N 39 N 22 NP2 82 N 108 N 39 N 22 NP1 82 N 108 N 39 N 22 NPPWR1 22 N 22 N 22 N 22 NSum 463 N (105 lbf) 586 N (105 lbf) 215 N (105 lbf) 136 N (105 lbf)
Payload Board
Mating Force Unmating ForceTest Value Maximum Test Value Minimum
P0 77 N 101 N 37 N 20.3 NN = Newtons
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VXS Backplane Configuration - Maximum
VXS is NOT limited to the configuration depicted in the example diagram of the 41.0 base spec!
Dual starSingle starDaisy chainSmall mesh
Photo courtesy of Elma Electronic, Inc.
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VXS Alternate Backplane Configurations
6 VXS + 1 switch + 1 VME64X
Photo courtesy of Hartmann Electronic
6VXS + 2 switch
Photo courtesy of Elma Electronic, Inc.
18 VXS + 2 switch + 1 VME64XPhoto courtesy of Hartmann Electronic
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VXS No Switch Slot Configuration
3 slot - 0 switch, 3 payload
All of these configurations and
topologies use the same VXS payload board
• No switch• Active backplane switching
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RTM Keying Solution
FrontAlignment
Rear Alignment
IEC 61076-4-101 Keying
M2 Screw
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Gb Ethernet Pin Mapping (VITA 41.3)
Row G Row F Row E Row D Row C Row B Row A
1 PA_SCL E0_TX- E0_TX+ GND E0_RX- E0_RX+ GND
2 GND GND E1_TX- E1_TX+ GND E1_RX- E1_RX+
3 PA_SDA E2_TX- E2_TX+ GND E2_RX- E2_RX+ GND
4 GND GND E3_TX- E3_TX+ GND E3_RX- E3_RX+
5 RFU GND RFU RFU GND RFU RFU
6 GND RFU RFU GND RFU RFU GND
7 RFU GND RFU RFU GND RFU RFU
8 GND RFU RFU GND RFU RFU GND
9 RFU GND RFU RFU GND RFU RFU
10 GND RFU RFU GND RFU RFU GND
11 PEN* GND RFU RFU GND RFU RFU
12 GND E4_TX- E4_TX+ GND E4_RX- E4_RX+ GND
13 PB_SCL GND E5_TX- E5_TX+ GND E5_RX- E5_RX+
14 GND E6_TX- E6_TX+ GND E6_RX- E6_RX+ GND
15 PB_SDA GND E7_TX- E7_TX+ GND E7_RX- E7_RX+
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PCI Express Pin Mapping (VITA 41.4)
Row G Row F Row E Row D Row C Row B Row A1 PA_SCL GND PA_TX0- PA_TX0+ GND PA_RX0- PA_RX0+
2 GND PA_TX1- PA_TX1+ GND PA_RX1- PA_RX1+ GND
3 PA_SDA GND PA_TX2- PA_TX2+ GND PA_RX2- PA_RX2+
4 GND PA_TX3- PA_TX3+ GND PA_RX3- PA_RX3+ GND
5 RFU GND RFU RFU GND RFU RFU6 GND RFU RFU GND RFU RFU GND7 RFU GND RFU RFU GND RFU RFU8 GND RFU RFU GND RFU RFU GND9 RFU GND RFU RFU GND RFU RFU
10 GND RFU RFU GND RFU RFU GND11 PEN* GND RFU RFU GND RFU RFU12 GND PB_TX0- PB_TX0+ GND PB_RX0- PB_RX0+ GND
13 PB_SCL GND PB_TX1- PB_TX1+ GND PB_RX1- PB_RX1+
14 GND PB_TX2- PB_TX2+ GND PB_RX2- PB_RX2+ GND
15 PB_SDA GND PB_TX3- PB_TX3+ GND PB_RX3- PB_RX3+
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Gigabit Ethernet Control Pin Mapping (VITA 41.6)
Row G Row F Row E Row D Row C Row B Row A1 PA_SCL GND PA_TX0- PA_TX0+ GND PA_RX0- PA_RX0+
2 GND PA_TX1- PA_TX1+ GND PA_RX1- PA_RX1+ GND
3 PA_SDA GND PA_TX2- PA_TX2+ GND PA_RX2- PA_RX2+
4 GND PA_TX3- PA_TX3+ GND PA_RX3- PA_RX3+ GND
5 RFU GND PA_SGTX- PA_SGTX+ GND PA_SGRX- PA_SGRX+
6 GND RFU RFU GND RFU RFU GND7 RFU GND RFU RFU GND RFU RFU
8 GND RFU RFU GND RFU RFU GND9 RFU GND RFU RFU GND RFU RFU
10 GND RFU RFU GND RFU RFU GND11 PEN* GND PB_SGTX- PB_SGTX+ GND PB_SGRX- PB_SGRX+
12 GND PB_TX0- PB_TX0+ GND PB_RX0- PB_RX0+ GND
13 PB_SCL GND PB_TX1- PB_TX1+ GND PB_RX1- PB_RX1+
14 GND PB_TX2- PB_TX2+ GND PB_RX2- PB_RX2+ GND
15 PB_SDA GND PB_TX3- PB_TX3+ GND PB_RX3- PB_RX3+
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• Customer Challenge - Consolidate computing, preserve existing I/O designs and interfaces, design an architecture that will scale computing capability.
CASE: Clustering CPU Resources - Challenge
Computing and I/O is now distributed throughout the vehicle in various sub-assemblies
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• VXS Solution - Consolidate computing into single chassis with low latency high speed interconnect (InfiniBand), bridge to existing VMEbus I/O designs with VMEbus repeater.
CASE: Clustering CPU Resources- Solution
Switched-serial backplane fabric provides ability to scale and cluster computing resources.
SWITCHES
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• Customer Challenge – Integrate sensor front-end processing with post-processing. Reduce the time from information acquisition to action. Integrate high speed data pipes with real time sensor processing.
CASE: Data Pipes & Real Time Requirements
NETWORKSENSORSUITE
PLATFORM 2• Sensor front-end• Real-time requirements• Customer-specific VMEbus designs
PLATFORM 1• Post Processing• Not co-located with sensor• Large integrated data payload
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• VXS Solution – High speed local interconnect and computing integrated with customer-specific front-end processing. One platform for real-time processing, high speed content processing, distribution.
CASE: Data Pipes & Real Time Requirements
SWITCHES
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• Customer Challenge - Consolidate computing, preserve existing I/O designs and interfaces, design an architecture that will scale computing capability.
CASE: Clustering CPU Resources
Computing and I/O is now distributed throughout the vehicle in various sub-assemblies
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• VXS Solution - Consolidate computing into single chassis with low latency high speed interconnect (InfiniBand), bridge to existing VMEbus I/O designs with VMEbus repeater.
CASE: Clustering CPU Resources
Switched-serial backplane fabric provides ability to scale and cluster computing resources.
SWITCHES
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)
LAN
L
System Domain 3
• Customer Challenge – Evolve to a single high performance network interconnect, maintain interfaces to existing network and data links on proven VME hardware, consolidate networking across system application domains.
CASE: Evolve to Single Interconnect
)
LAN
L
System Domain 2
)
LAN
L
System Domain 1
• Ethernet• 1553• SCSI• FDDI• ATM• MIL-STD-1397• MIL-STD-751• HIPPI• RS-232/422• Other
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• VXS Solution – Provide a unifying high performance interconnect while supporting the wide range of existing legacy interconnects supported on qualified VMEbus board level product.
CASE: Evolve to Single Interconnect
Gateway to existing interfaces, enables integration and unification of the network, bandwidth in and out of the box, supports “spiral development”