whiteled,0.2mm., 8layer.pdf

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  • 7/28/2019 WhiteLED,0.2mm., 8Layer.pdf

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    T E C H N O L O G Y U P D A T E A P R I L 2 0 1 3

    As we had previously informed

    about our 2012 investment and Start

    up run of Multilayer PCB production.

    We had launched our Multilayer PCB

    4-6 Layers boards into the market and

    the responses are very positive

    towards this technology improvement.

    Customers are interested and eager to

    start the development of their new

    products and technology to improve

    the Competency in the Electronics

    market both Local and Worldwide.

    Circuit Industries Co., Ltd. had set

    up a Technology Roadmap to

    Continuously improve in our Products

    Quality and Production&Technical

    Capabilities in order to support our

    High Technology demanding market.

    Our technology Road map &

    Improvement for 2013 is to increase

    our capabilities as Follows:

    1)Test Run&Launch 8 Layer PCB

    2) Confirm 0.2mm. Drill hole

    (Aspect Ratio 1:8)

    3) Change all White Solder

    Mask ink to a special White

    Solder Mask for LED

    Application (Better reflection

    and less Discoloration)

    In April 2013, We had complete

    all of our 3 targets and all products are

    NOW AVAILABLE

    Improved Production Capabilities

    FIRST TIME IN THAILAND.

    FOR SMALL-MEDIUM VOLUME

    MULTILAYER 4-8 LAYER PCB

    ARE NOW AVAILABLE.

    0.2 MM. DRILL MULTILAYER8LAYERWHITE SOLDERMASK FOR L.E.D.

    CIRCUIT INDUSTRIES

    FOR MOREINFORMATION:

    [email protected]

    HTTP://WWW.CIPCB.COMTEL: 02-8101406

    -Multilayer 8 Layer-Now Available at CI

    (1)

    http://www.cipcb.com/http://www.cipcb.com/mailto:[email protected]:[email protected]
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    T E C H N O L O G Y U P D A T E A P R I L 2 0 1 3

    HDI PCB is becoming more and

    more important to the modern world

    of electronics products. As the signal

    transmission speed (Clock speed) has

    become a very important criteria to

    consider and also size restriction of the

    product with higher need of application

    are forcing the Electronics product

    manufacturer to turn to HDI and High

    Layer Count PCB for the solution.

    HDI PCB consist of Blind via and

    Buried via which helps transmit the

    signal from one layer to another

    without wasting the space with drilled

    hole of PTH on the other side of the

    PCB.

    Blind Via requires a very high

    accuracy CNC Drilling machine to drill

    the exact depth that given so the signal

    can transmit from Outer Layer to the

    desire Inner layer without drilling

    through the board. The drilled hole will

    be plated so the signal can now

    transmits from Layer to layer. If the

    Depth is not controlled properly, it

    could result a short circuit between

    layer.

    Buried Via can be easily

    described as a PTH board inside the

    Multilayer. As Mentioned, Buried via

    already has a interconnection between

    layer in their inner core. These PTH

    holes cannot be seen from outer layer.

    Only way to access these internal

    circuit is to drill PTH or Blind via to the

    internal PAD

    High Density Interconnect (HDI)

    HDI (HIGH DENSITY

    INTERCONNECT) PCB

    BLIND VIA, BURIED VIA

    CCD PINLESS BONDING CCD EXPOSURE

    NEXT DEVELOPMENT

    AUTOMATICOPTICAL INSPECTION

    (AOI)

    FOR MOREINFORMATION:

    [email protected]

    HTTP://WWW.CIPCB.COMTEL: 02-8101406

    http://www.cipcb.com/http://www.cipcb.com/mailto:[email protected]:[email protected]
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    T E C H N O L O G Y U P D A T E A P R I L 2 0 1 3

    CAPABILITIES

    website: ttp://ww .cipcb.com Email: [email protected] om

    Circuit I dustries Co., L d.

    Produ tion apabili ies

    Small Volume Mass Volume

    Max. Laye Count 8 Layer 8 Layer

    Aspect Ratio 1:8 1:8

    Min. Drill size 0.2 mm. 0.3 mm.

    Min. boar thicknes 0.8 mm. 0.8 mm.

    Min. Prep eg thickn ss 0.075 mm. 0.075 mm.

    Min. copp r thickne s 1oz(35um) 1oz(35um)

    Max Copp r thickne s 2 oz(70um) 2 oz (70um)

    Min. line/spacing (in er layer) 0.1mm. (4mil) 0.125mm (5mil)

    Min. line/spacing (Outer Layer) 0.1mm. (4mil) 0.125mm (5mil)

    Min. Annu ar Ring 0.125mm (5mil) 0.125mm (5mil)

    Drill Acc racy (+/-) 35 um 35 um

    image registration ( /-) 75 um 75 um

    Solderma k Registr tion (+/-) 75 um 75 um

    Rout/Sco e Tolerance (+/-) 0.2 mm. 0.2 mm.

    Blind Via yes no

    Buried via yes no

    Production Lead time Small Volume Mass Volume

    Single Si ed 7-10 Days 10-12 days

    Double Si ed 9-11 days 12-15 days

    Multilaye 4 Layer 16 days 18 days

    Multilaye 6 Layer 16 days 18 days

    Multilaye 8 Layer 17 days 18 days

    mailto:[email protected]:[email protected]://www.cipcb.com/http://www.cipcb.com/