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Tamkang University, VLSI Lab.

Fundamentals of

Microelectronics—Bipolar Amplifier


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Electronics 5-2Tamkang University

Bipolar Amplifiers

5.1 General Considerations5.2 Operating Point Analysis and Design5.3 Bipolar Amplifier Topologies5.4 Summary and Additional Examples


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5.1 General Considerations

Voltage amplifiersVoltage gain: vout /v in

What other aspects of an amplifier’sperformance are important?

power dissipationspeednoise


4/94Electronics 5-4Tamkang University

5.1 General Considerations--Inputand Output Impedances

In an ideal voltage amplifier, the input impedance isinfinite and the output impedance zero .

But in reality, input or output impedances depart fromtheir ideal values.




The figure above shows the techniques ofmeasuring input and output impedances.

A zero voltage source is replaced by a short anda zero current source by an open.

x

x x i

V R =




Input ImpedanceWhen calculating input/output impedance, small-

signal analysis is assumed.β↑ or IC ↓⇒ r π ↑

C

T

m

x

x

I

V

gr

r iv

β β π

π

==

=




When calculating I/O impedances at a port, weusually ground one terminal while applying thetest source to the other terminal of interest.




Impedance at Collector With Early effect, the impedance seen at the collector is

equal to the intrinsic output impedance of the transistor(if emitter is grounded).

oout r R =




Impedance at Emitter The impedance seen at the emitter of a

transistor is approximately equal to one over itstransconductance (if the base is grounded).

)(

1

1

1

∞=≈

+=

A

mout

m x

x

V

g R

r gi

v

π




Rule # 1: looking into the base , the impedance is r π if emitter is (ac) grounded.

Rule # 2: looking into the collector , the impedance is r o ifemitter is (ac) grounded.Rule # 3: looking into the emitter , the impedance is 1/g mif base is (ac) grounded and Early effect is neglected.



5.1 General Considerations--Biasing

Transistors and circuits must be biased because(1) transistors must operate in the active region,(2) their small-signal parameters depend on the biasconditions.



5.1 General Considerations--DC andSmall-Signal Analysis

A procedure for the analysis of amplifiersFirst, DC analysis is performed to determineoperating point and obtain small-signal parameters.Second, sources are set to zero and small-signalmodel is used.

Ground all constant voltage sourcesOpen all constant current sources


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5.1 General Considerations-- DCand Small-Signal Analysis

Notation SimplificationHereafter, the battery that supplies power to the circuit isreplaced by a horizontal bar labeled Vcc, and inputsignal is simplified as one node called Vin.


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5.2 Operating Point Analysis and Design

Example of Bad BiasingIS=6X10 -16 A & the peak valueof the microphone signal is 20mV

Vout

=1.29X10 -12V

The base of the amplifier isconnected to Vcc, trying toestablish a DC bias.Unfortunately, the output signal

produced by the microphone isshorted to the power supply .

2 O i i A l i d


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5.2 Operating Point Analysis andDesign--Simple Biasing

Assuming a constant value for V BE, one can solve for both IB and I C anddetermine the terminal voltages of the transistor.

IB →IC →VCEBias point is sensitive to β variations .

β increases from 100 to 120 ⇒ IC rises from 1.65mA to 1.98mA & VCE falls from0.85V to 0.52V

B

BE CC C

B

BE CC B R

V V I

RV V

I −=−= β ,

regioactive forV R R

V V V

R R

V V V

I RV V

BE C B

BE CC CC

C B

BE CC CC

C C CC CE

>−−

−−=

−=

β

β


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5.2 Operating Point Analysis and Design--Resistive Divider Biasing

Accounting for Base CurrentWith proper ratio of R 1 and R 2, IC can be insensitive to β; however, itsexponential dependence on resistor deviations makes it less useful.

R2 ↑ 1% ⇒ exp(0.01V BE/VT ) ≈ 1.36 ⇒ IC ↑ 36%

⎟ ⎠ ⎞⎜

⎝ ⎛ −=

T

Thev BThevS C V

R I V I I exp

Thev

BE Thev

ThevS

C T Thev B

RV V

R I I

V V I

−=

∗⎟⎟

⎠ ⎞

⎜⎜

⎝ ⎛ −=

1ln

l d


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5.2 Operating Point Analysis and Design--Biasing with Emitter Degeneration

Emitter Degeneration BiasingThe presence of RE helps to absorb the error in V X soVBE stays relatively constant .This bias technique is less sensitive to β (I1 >> IB) andVBE variations.

5 2 O i P i A l i d D i


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5.2 Operating Point Analysis and Design--Biasing with Emitter Degeneration

Design ProcedureChoose an I C to providethe necessary small

signal parameters, g m, r π,etc.Considering thevariations of R

1, R

2, and

VBE, choose a value forVRE.With VRE chosen, and V BEcalculated, V x can bedetermined.Select R 1 and R 2 to

provide V x.

5 2 O i P i A l i d D i


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5.2 Operating Point Analysis and Design--Self-Biased Stage

This bias technique utilizes the collectorvoltage to provide the necessary V x and I B.One important characteristic of this techniqueis that collector has a higher potential than the

base, thus guaranteeing active operation of thetransistor.Design guidelines

(1) provides insensitivity to β .(2) provides insensitivity to variation in V BE .

BE CC BE

BC

V V V

R R

− β

5 2 O ti P i t A l i d D i


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Design ProcedureBecause R C >> R B/β ⇒ Assuming R C =10R B/β

BE CC BE

BC

V V V

R R

− β

5 2 O ti g P i t A l i d D ig


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Summary of Biasing Techniques

5 2 Operating Point Analysis and Design


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5.2 Operating Point Analysis and Design--Biasing of PNP Transistors

VX = IBRB & VY = ICRC ifIBRB = ICRC,max⇒ RC,max = RB/βThe circuit suffers fromsensitivity to β.



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If IB is significant,then the transistorbias heavily dependson .



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5.3 Bipolar Amplifier Topologies

Three possible ways to apply an input to an amplifier and three possibleways to sense its output.However, in reality only three of six input/output combinations are useful.

5 3 Bipolar Amplifier Topologies--


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5.3 Bipolar Amplifier TopologiesCommon-Emitter Topology

Study of Common-Emitter Topology

Analysis of CE CoreInclusion of Early EffectCE Stage With EmitterDegeneration

Inclusion of Early Effect

CE Stage with Biasing

5 3 Bipolar Amplifier Topologies--


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C mv

inmmC

out

in

out v

Rg A

vgvg Rv

vv

A

−=

==−

=

π

Small Signal of CE Amplifier

small-signal gain is negative

5.3 Bipolar Amplifier Topologies--


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Limitation on CE Voltage GainSince g m can be written as I C/VT, the CE voltage gain can be written asthe ratio of V RC and V T.VRC is the potential difference between V CC and V CE, and V CE cannot gobelow V

BEin order for the transistor to be in active region.

T

C C v V R I

A =T

RC v V V

A =T

BE CC v V V V

A −

<



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VCC = 1.8 V, a powerbudget (P) of 1mW find Av,max

VBE ≈ 800mV

Q1 in soft saturationVCE ≈ 400mV

Tradeoff between VoltageGain and Headroom



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5.3 po a p e opo og esCommon-Emitter Topology

IC ↑ ⇒ Rin ↓ When measuring outputimpedance, the input porthas to be grounded so

that Vin = 0.

C

T

m X

X in I V

gr iv

R β β π ==== C X

X out Ri

v R ==



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p p p gCommon-Emitter Topology

CE Stage Trade-offs



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Inclusion of Early EffectEarly effect will lower thegain of the CE amplifier,as it appears in parallelwith RC.

As R C →∞, Av= - gm r Othe maximum voltage gainof the amplifier

The intrinsic gain isindependent of the biascurrent.

OC out

OC mv

r R R

r Rg A

||)(

=−=

T

Av

Omv

V V A

r g A

=

−=



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Current Gain Another parameter of the amplifier is the current gain ,which is defined as the ratio of current delivered to theload to the current flowing into the input.For a CE stage, it is equal to β.

β =

=

CE I

in

out I

Ai

i A


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Common-Emitter Topology

Small-Signal ModelInterestingly, this gain is equal to the total loadresistance to ground divided by 1/g m plus the totalresistance placed in series with the emitter .

Av ↓ (1+ g mRE)Rin = r π + (β+1) R E

E m

C v

E m

C mv

Rg

R A

Rg Rg

A

+−=

+−=

1

1



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The input impedance of Q2 can becombined in parallel with R E toyield an equivalent impedance thatdegenerates Q

1.

21

||1 π r Rg

R A

E m

C v

+−=



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In this example, the inputimpedance of Q

2can be

combined in parallel with R Cto yield an equivalentcollector impedance toground.

E m

C

v R

g

r R

A +−=1

2

1|| π



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Input Impedance of Degenerated CE StageWith emitter degeneration, the input impedance

is increased from r π to r π + (β+1)R E.

E

X

X in

X E X X

A

Rr iv

R

i Rir v

V

)1()1(

++==++=

∞=

β

β

π

π



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Output Impedance of Degenerated CEStage

Emitter degeneration does not alter the outputimpedance in this case.

C

X

X out

E min

A

Riv

R

v Rvg

r

vvv

V

==

=⇒⎟⎟ ⎠

⎞⎜⎜

⎝

⎛ ++==

∞=

00 π π π

π π



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If gmRE is much greater than

unity, G m is more linear.If a load resistance is R C Av = - Gm RC

If Gm RE >>1 ⇒ Av = - RC/RE

E m

m

in

out m

E m

inmout

A

Rgg

vi

G

Rgr v

gi

V

+≈=

++=

∞=

−

1

)(1 1π


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5.3 Bipolar Amplifier Topologies--C E i T l


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Input/Output ImpedancesRin1 is more important in practice as R B isoften the output impedance of the previous

stage.

C out

E Bin

E in

A

R R

Rr R R

Rr R

V

=+++=

++=∞=

)1()1(

22

1

β

β

π

π

5.3 Bipolar Amplifier Topologies--C E i T l


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Determine the voltage

gain and I/O impedancesof the circuit A very large value for C1

and neglect the Early effect. 1

2

2

1

||)1(

1

1)(

R R R

Rr R

R R

g

R R A

C out

in

B

m

C v

=++=

+++

−=

β β

π

5.3 Bipolar Amplifier Topologies--C E itt T l


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Output Impedance of Degenerated Stagewith V A


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This seemingly complicated circuit can be greatlysimplified by first recognizing that the capacitor createsan AC short to ground , and gradually transforming the

circuit to a known topology.

[ ] 12 ||)||(1 Rr r Rg R Omout π +=[ ] Omout r r Rg R )||(1 21 π +=11 || out out R R R =

5.3 Bipolar Amplifier Topologies--Common Emitter Topolog


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Called a “ cascode ”, the circuit offers manyadvantages that are described later in the

book.

[ ] 1121 )||(1 OOmout r r r g R π +=

5.3 Bipolar Amplifier Topologies--Common Emitter Topology


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Since the microphone has avery low resistance thatconnects from the base of Q 1to ground, it attenuates thebase voltage and renders Q 1without a bias current.

Capacitor isolates the biasnetwork from the microphoneat DC but shorts themicrophone to the amplifier athigher frequencies.

Use of Coupling Capacitor ac-coupled



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DC and AC AnalysisCoupling capacitor is open for DCcalculations and shorted for AC calculations.

OC out

Bin

OC mv

r R R

Rr R

r Rg

||||

)||(

==

−=π



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Since the speaker has aninductor , connecting it directlyto the amplifier would short thecollector at DC and thereforepush the transistor into deepsaturation .

The AC coupling indeed allowscorrect biasing.However, due to the speaker’ssmall input impedance, theoverall gain drops considerably.

Still No Gain!!!



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OC out

in

OC mv

r R R

R Rr R

r Rg A

||

||||)||(

21

==−=

π

[ ]C out

E in

E m

C v

R R

R R Rr R

Rg

R A

=++=

+−=

21 ||||)1(

1

β π

5.3 Bipolar Amplifier Topologies--Common-Emitter Topology


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Capacitor shorts out R E at higherfrequencies and removes degeneration.

C out

in

C mv

R R

R Rr R Rg A

==

−=21 ||||π



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Common Emitter Topology

1||||1

||21

+++

−=

β R R R

Rg

R A

s E

m

LC v



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Common Emitter Topology

Summary of CE Concepts

5.3 Bipolar Amplifier Topologies--Common-Base Topology


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Common Base Topology

In common base (CB) topology, where the baseterminal is biased with a fixed voltage, emitter is

fed with a signal, and collector is the output.


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Common Base Topology

Tradeoff between Gain and HeadroomTo maintain the transistor out of saturation, themaximum voltage drop across R C cannot exceed VCC-VBE.

T

BE CC

C T

C v

V

V V

RV I A

−=

= .



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p gy

Ω=⇒

Ω=⇒+=

Ω=+⇒+≈≈

K R

K R

V R R

RV

K R R

R RV I I if

CC b

CC B

7.67

3.22

90

10

2

1

21

2

21

211

V

mV I

I V

mV V V

S

C T

BE b

354.1

600)ln(

600

=

+=

+=

2.17== C mv Rg A



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p gy

The input impedance of CB stage is muchsmaller than that of the CE stage.

min g

R 1=



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p gy

Practical Application of CB StageTo avoid “ reflections ”, need impedancematching .CB stage’s low input impedance can be

used to create a match with 50 Ω.



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p gy

Output Impedance of CB StageThe output impedance of CB stage is similarto that of CE stage.

C Oout Rr R ||=



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CB Stage with Source ResistanceWith an inclusion of a source resistor, the input signal is attenuatedbefore it reaches the emitter of the amplifier; therefore, we see alower voltage gain .This is similar to CE stage emitter degeneration; only the phase isreversed.

The CB stage displays a current gain of unity.

S m

C v

Rg

R A

+

=1



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An antenna usually has low output impedance;therefore, a correspondingly low input

impedance is required for the following stage.



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Realistic Output Impedance of CB StageThe output impedance of CB stage is equal to R C inparallel with the impedance looking down into thecollector.

[ ] ( )1

1

||||)||(1

out C out

E O E mout

R R Rr Rr r Rg R

=++= π π



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The output impedances of CE, CB stages are the same if bothcircuits are under the same condition.This is because when calculating output impedance, the input port isgrounded, which renders the same circuit for both CE and CBstages.

CE stageCB stage



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With an addition of base resistance, the voltage

gain degrades .

m

B E

C

in

out

g

R R

Rvv

1

1+

++

≈

β



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The voltage gain of CB amplifier with base resistance isexactly the same as that of CE stage with baseresistance and emitter degeneration, except for a

negative sign .

m

B E

C

in

out

g R R

R

v

v

11+++

≈

β 1

1+

++

−≈

β B

E m

C

in

out

R Rg

Rvv



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Input Impedance of CB Stage with Base ResistanceThe input impedance of CB with base resistance is equal to1/g m plus R B divided by ( β+1).

The base resistance is divided by ( β + 1) when “seen” from theemitter This is in contrast to degenerated CE stage, in which theresistance in series with the emitter is multiplied by (β+1)when seen from the base .

11

1 ++≈

++=

β β π B

m

B

X

X Rg

Rr iv



70/94


To find the R X, we have to first find Req,treat it as the base resistance of Q 2 and

divide it by ( β+1).

⎟⎟⎜⎜⎝ ⎛

++

++=

11

111

12 β β B

mm X

Rgg

R



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Bad Bias Techniquefor CB StageUnfortunately, no

emitter current canflow.

Bad Bias Techniquefor CB StageThe input signal has

been shorted toground as well.



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Proper Biasing for CB Stage( ) C mS E min

out

E

m

in

Rg R Rgv

v

Rg R

++=

=

111

||1



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Reduction of Input Impedance Due to R EThe reduction of input impedance due to R E is bad because it shuntspart of the input current to ground instead of to Q 1 (and R c) .

RE ↓ ⇒ i1↑ & i2 ↓ ⇒ bad1/g

m ↓ ⇒ i

1↓ & i

2 ↑ ⇒ good

RE >> 1/g m ⇒ IC RE >> VT

E m

in Rg R ||1

=



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Creation of V b

Resistive divider lowers the gain .To remedy this problem, a capacitor is insertedfrom base to ground to short out the resistordivider at the frequency of interest.

m

B E

C

in

out

g R

R

Rvv

11+

++

≈

β



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For the circuit shown above, RE >> 1/g m.R1 and R 2 are chosen so that V b is at theappropriate value and the current that flows thruthe divider is much larger than the base current.Capacitors are chosen to be small compared to1/g m at the required frequency.

5.3 Bipolar Amplifier Topologies--Emitter Follower


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Common Collector Amplifier When the input is increased by ΔV, output is alsoincreased by an amount that is less than ΔV due to theincrease in collector current and hence the increase inpotential drop across R E.However the absolute values of input and output differ bya VBE.

level shift



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Small-Signal Model of Emitter Follower As shown above, the voltage gain is

less than unity and positive .

m E

E

E

in

out

g R

R

Rr v

v11

11

1

+≈⋅+

+= β

π

∞= AV



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Unity-Gain Emitter Follower The voltage gain is unity because aconstant collector current (= I 1) results in aconstant V BE, and hence V out follows Vinexactly.

Vout = Vin - VBE

1=v

A

∞= AV



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Analysis of Emitter Follower as a VoltageDivider

∞= AV



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Emitter Follower with Source Resistance

m

S E

E

in

out

g R

R

Rvv

11+

++

=

β

∞= AV



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Input Impedance of Emitter Follower The input impedance of emitter follower is exactly the same as that of CEstage with emitter degeneration .This is not surprising because the input impedance of CE with emitter

degeneration does not depend on the collector resistance.

E X

X Rr iv )1( β π ++=

∞= AV


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Output Impedance of Emitter Follower Emitter follower lowers the source impedance by afactor of β+1 improved driving capability.

A good voltage buffer

E m

sout Rg

R R ||11 ⎟⎟ ⎞⎜⎜⎝ ⎛ ++= β



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Emitter Follower with Early Effect

Since r O is in parallel with R E, its effect canbe easily incorporated into voltage gain

and input and output impedance equations.

( )( )

O E m

sout

O E in

m

S O E

O E v

r Rg

R R

r Rr R

g R

r R

r R A

||||11

||1

11

||||

⎟⎟ ⎞

⎜⎜⎝ ⎛ +

+=

++=

++

+=

β

β

β

π



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There is a current gain of (β+1) from base to emitter.Effectively speaking, the load resistance is multiplied by(β+1) as seen from the base.


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5.3 Bipolar Amplifier Topologies--Summary and Additional Examples


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The three amplifier topologies studied so farhave different properties and are used on

different occasions.CE and CB have voltage gain with magnitudegreater than one, while follower’s voltage gain isat most one.


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Again, AC ground/short and Thevenin transformation areneeded to transform the complex circuit into a simplestage with emitter degeneration.

S

m

S

C

in

out

R R R Rg

R R Rvv +⋅+++

−=1

1

21 1

1||

β



90/94


The key for solving this problem is firstidentifying R eq , which is the impedance seen at

the emitter of Q 2 in parallel with the infiniteoutput impedance of an ideal current source.Second, use the equations for degenerated CE

stage with R E replaced by R eq .

2

1

1

211

11

1mm

C v

in

g R

g

R A

r Rr R

+++

−=

++=

β

π π



91/94


The key for solving this problem is recognizing that CB atfrequency of interest shorts out R 2 and provide a groundfor R1.

R1 appears in parallel with R C and the circuit simplifies toa simple CB stage.

mS

C v

g R

R R A 1||1

+=



92/94


The key for solving this problem is recognizing theequivalent base resistance of Q 1 is the parallelconnection of R E and the impedance seen at the emitterof Q

2.

12

1||111

1m

E m

Bin g

Rg

R R +⎥⎦

⎤⎢⎣

⎡⎟⎟ ⎠ ⎞

⎜⎜⎝ ⎛ +

++=

β β



93/94


The key in solving this problem is recognizing a DCsupply is actually an AC ground and using Thevenintransformation to simplify the circuit into an emitterfollower.

S S

m

O E

O E

in

out

R R R

R R

g

r R R

r R Rvv

+⋅

+

++=

1

1

12

2

1

||1||||

||||

β

O E m

S out r R Rg

R R R ||||||1

1||

21

⎟⎟ ⎞

⎜⎜⎝ ⎛ +

+=

β


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