Minghwei Hong and J. Raynien Kwo

National Tsing Hua University, Hsinchu, Taiwan National Taiwan University, Taipei, Taiwan

1

2011 DRC Short Course

50 years of development of oxides on III-V. Is in-situ process the best choice?

oxide MBE

in-situ XPS

oxide & metal

MBE

III-V MBE

Si-Ge MBE

annealing & metal chamber Wafer in

Multi-chamber MBE/in-situ analysis system

In-situ SPM SMOKE metal

chamber

ALD

ALD

NSRRC XPS Beamline

SPM/STS

XPS/UPS

In-situ ALD

MBE – compound semiconductor growth – A. Y. Cho (National Medal of Science 1993 and National Medal of Technology 2007)

MBE – metal and oxide growth – J. Kwo (first in discovering anti-ferromagnetic coupling through non-magnetic layer in magnetic superlattices PRL’s 1985 – 1986)

Frank Shu, UC University Professor and former President of Tsing Hua Univ.

4

EOT < 1 nm

Interfacial density of states Dit ≤1011 cm-2 eV-1

Self-aligned process

• High-temperature thermodynamic stability

Low parasitic

• Ohmic contacts and sheet resistance

Integration with Si

Fundamental requirements for high κ’s + metal gates on InGaAs (or any channels) for technology beyond Si CMOS

GaAs passivation (efforts since 1960)

5

Previous ex-situ Efforts (see M. Hong, C. T. Liu, H. Reese, and J. Kwo, in Encyclopedia of Electrical and Electronics Engineering, edited by J. G. Webster (Wiley, New York, 1999), Vol. 19, pp. 87–100, and Physics and Chemistry of III–V Compound Semiconductor Interfaces, edited C. W. Wilmsen (Plenum, New York, 1985).

Anodic, thermal, and plasma oxidation of GaAs Wet or dry GaAs surface cleaning followed by deposition of various dielectric

materials Previous in-situ Efforts Growth using single chamber • AlGaAs doped with O or Cr, Cho and Cassey 1978 • native oxides or Al2O3 on GaAs during the same growth, i.e. introduction of

oxygen in III-V MBE chamber, Ploog et al 1979 • ZnSe (a0 of 5.67 Ǻ and a direct energy gap of 2.7 eV) on GaAs, Yao et al, 1979 • Si on InGaAs or GaAs, IBM at Zurich 1990 (?) and Morkoc et al, 1996 Our Breakthrough Growth using two chambers • Ga2O3(Gd2O3), Ga2O3-x, MgO, SiO2, Al2O3 on GaAs using two growth chambers,

Hong et al, 1994 • Have been applied to GaAs, InGaAs, GaN, and Si

Do we need a new methodology for GaAs passivation? Green and Spicer, Stanford Univ. : JVST A11(4), 1061, 1993

“A new methodology for passivating compound semiconductors is presented in which two over-layers are used. In this approach, the first layer defines the surface electronically and the second provides long term protection.”

Sulfur passivation –Sandroff et al, Bell Labs: APL51, 33, 1987 Sb passivation – Cao et al, Stanford: Surf. Sci. 206, 413, 1988

Is it possible to have InGaAs MOS and Ge MOS, similar to SiO2/Si, to achieve a low Dit, a low J, thermal stability at high temp. (>850 and 500°C), without any interfacial passivation layers (IPLs)? YES!!!

S, Sb, Si, Ge as IPLs for InGaAs MOS GeON, GeO2, Si as IPLs for Ge MOS

“MBE - enabling technology beyond Si CMOS”, (invited talk) J. Kwo, M. Hong, et al, J. Crystal Growth 323 511 (2011). “InGaAs and Ge MOSFETs with high k dielectrics” (invited talk), J. Kwo, M. Hong, et al, Microelectronic Engineering 88, 336 (2011)

Pioneering work of GaAs and InGaAs MOSFET’s using Ga2O3(Gd2O3) at Bell Labs without 2 overlayers

1994 novel oxide Ga2O3(Gd2O3) to effectively passivate GaAs surfaces

1995 establishment of accumulation and inversion in p- and n-channels in Ga2O3(Gd2O3)-GaAs MOS

diodes with a low Dit of 2-3 x 1010 cm-2 eV-1(IEDM) 1996

first e-mode GaAs MOSFETs in p- and n-channels with inversion (IEDM) Thermodynamically stable

1997 e-mode inversion-channel n-InGaAs/InP MOSFET with gm= 190 mS/mm, Id = 350 mA/mm, and

mobility of 470 cm2/Vs (DRC, EDL) 1998

d-mode GaAs MOSFETs with negligible drain current drift and hysteresis (IEDM) e-mode GaAs MOSFETs with improved drain current (over 100 times) Dense, uniform microstructures; smooth, atomically sharp interface; low leakage currents

1999 GaAs power MOSFET Single-crystal, single-domain Gd2O3 epitaxially grown on GaAs

2000 demonstration of GaAs CMOS inverter

"Use of Hybrid Reflectors to Achieve Low Thresholds in All MBE Grown Vertical Cavity Surface Emitting Laser Diodes", R. J. Fischer, K. Tai, M. Hong, and A. Y. Cho, IEEE IEDM, 861, Washington, D.C., Dec.3-6, 1989; J. Vac. Sci. Technol. B8, p.336, 1990.

“Array Operation of GaAs/AlGaAs Vertical Cavity Surface Emitting Lasers”, K. Tai, Y.H. Wang, J.D. Wynn, M. Hong, R. J. Fischer, J.P. Mannaerts, and A.Y. Cho, CLEO/IQEC’90, Anaheim, Ca, May 21-25, 1990.

"MBE Growth and Properties of Fe3(Al,Si) on GaAs(100)", M. Hong, H. S. Chen, J. Kwo, A. R. Kortan, J. P. Mannaerts, B. E. Weir, and L. C. Feldman, J. Crystal Growth, V.111, 984, 1991.

"Vertical Cavity Top-Surface Emitting Lasers with Thin Ag Mirrors and Hybrid Reflectors", M. Hong, L. W. Tu, J. Gamelin, Y. H. Wang, R. J. Fischer, E. F. Schubert, K. Tai, G. Hasnain, J. P. Mannaerts, B. E. Weir, J. D. Wynn, R. F. Kopf, G. J. Zydzik, and A. Y. Cho, J. Crystal Growth 111, 1071, 1991.

"In-Situ Non-Alloyed Ohmic Contacts to p-GaAs", M. Hong, D. Vakhshoori, J. P. Mannaerts, F. A. Thiel, and J. D. Wynn, J. Vac. Sci. Technol. 12 (2), p.1047, 1994.

"New Frontiers of Molecular Beam Epitaxy with In-Situ Processing", M. Hong, invited paper for the 1994 International MBE Conference and published in J. Crystal Growth V.150, pp.277-284, 1995.

"X-Ray Scattering Studies of the Interfacial Structure of Au/GaAs", D. Y. Noh, Y. Hwu, H. K. Kim, and M. Hong, Phys. Rev. B51 (7), p.4441, 1995.

8

Background leading to unpin surface Fermi level in III-V compound semiconductors

Late 1980s to early 1990s, problems in then AT&T’s pump lasers (980 nm) for undersea optical fiber cable (trans-Atlantic)

Semiconductor facet (HR, AR) coating Reducing defects between InGaAs (GaAs) and coating

dielectrics Passivation of the facets Electronic passivation much more stringent than

optical passivation (110) vs (100) of InGaAs (GaAs)

Single domain, epitaxial film in (110) Mn2O3 structure

ULTRAHIGH VACUUM DEPOSITION OF OXIDES

Gd/(Ga+Gd) > 20% Gd+3 stabilize Ga+3

GaAs

a-Ga2O3(Gd2O3)

x-tal Gd2O3

Mixed Oxide Ga2O3(Gd2O3)

Epitaxy

Pure Gd2O3 Film

x-tal Gd2O3

GaAs

Initial thinking: to attain Ga2O3 film for passivation High-purity single crystal Ga5Gd3O12 (GGG) source

Evaporation (sublime) by e-beam

Gd2O3 ionic oxide Tm > 4000K

Ga2O3 more covalent oxide Tm ~ 2000K

Ga2O3 evaporated mostly, and formed amorphous Ga2O3 film

High Resolution TEM of Ga2O3(Gd2O3) on GaAs

Epitaxy

M. Hong et al, JVST B14 2297 (1996); J. Kwo et al, APL 75 1116 (1999); M. Hong et al, APL 76 312 (2000)

Initial growth of Ga2O3(Gd2O3) 1.1 nm thick

X-ray diffraction of normal scan and rocking curve

In-situ RHEED pattern showing a single crystal growth

Growth of Ga2O3(Gd2O3) films using e-beam evaporation from Ga5Gd3O12 target – RBS studies

Identified the essential role of Gd2O3 The Gd/(Ga+Gd) ratio needs to be greater than 20% The electropositive Gd+3 may stabilize Ga+3 in the film

"Low Dit thermodynamically stable Ga2O3-GaAs interfaces: fabrication, characterization, and modeling", M. Passlack, M. Hong, J. P. Mannaerts, J. Kwo, R. L. Opila, S. N. G. Chu, N. Moriya, and F. Ren, IEEE TED, 44 No. 2, 214-225, 1997. "Novel Ga2O3(Gd2O3) passivation techniques to produce low Dit oxide-GaAs interfaces", M. Hong, J. P. Mannaerts, J. E. Bowers, J. Kwo, M. Passlack, W-Y. Hwang, and L. W. Tu, J. Crystal Growth, 175/176, pp.422-427, 1997.

Kwo et al, APL 75 1116 (1999))

Pioneer Work : Single Crystal Gd2O3 Films on GaAs

GaAs a=5.65Å

[001]

(110)

[110] a= 10.81Å

1: 2 match

(100)

[110]

[110]

3: 4 match O

Gd

Ga

View along GaAs [110]

Gd2O3

Mn2O3 Structure

Gd2O3 (110) 25Å

M. Hong, J. Kwo et al, Science 283, p.1897, 1999

-10 -8 -6 -4 -2 0 2 4 6 8 1010-12

1x10-10

1x10-8

1x10-6

1x10-4

1x10-2

1x100

1x102-10 -8 -6 -4 -2 0 2 4 6 8 10

t=260A t=185A t=140A t=104A t=45A t=25A Gd2O3 on Si, 40A

J L (A/

cm2 )

E [MV/cm)

EOT 0.8 nm

SiO2 1.5 nm

Low Dit’s and low JL

May 9, 2002 JHU

-8 -6 -4 -2 0 2 4 6 810-11

1x10-9

1x10-7

1x10-5

1x10-3

1x10-1

1x101

1x103-8 -6 -4 -2 0 2 4 6 8

10-11

1x10-9

1x10-7

1x10-5

1x10-3

1x10-1

1x101

1x103

Ga2O3 GaGdO (6% Gd) GaGdO (14% Gd) GaGdO (20% Gd) Gd2O3

J L (A/

cm2 )

E (MV/cm)

Gd Composition Dependence of Electrical leakage of

GGG on GaAs

Thickness Dependence of Electrical Leakage of

Gd2O3 on GaAs

-10 -8 -6 -4 -2 0 2 4 6 8 1010-12

1x10-10

1x10-8

1x10-6

1x10-4

1x10-2

1x100

1x102-10 -8 -6 -4 -2 0 2 4 6 8 10

t=260A t=185A t=140A t=104A t=45A t=25A Gd2O3 on Si, 40A

J L (A

/cm

2 )

E [MV/cm)

J. Kwo et al, APL 75 1116 (1999)

Phys. NCKU, 03-24-2006

Single crystal Gd2O3 on GaAs - Epitaxial interfacial structure

• “New Phase Formation of Gd2O3 films on GaAs (100)”, J. Vac. Sci. Technol. B 19(4), p. 1434, 2001. • “ Direct atomic structure determination of epitaxially grown films: Gd2O3 on GaAs(100) ” PRB 66, 205311, 2002 • A new X-ray method for the direct determination of epitaxial structures, coherent Bragg rod analysis (COBRA) → Nature – Materials 2002 Oct issue cover paper

Not a Mn2O3 structure at interface Stacking sequence

similar to that of GaAs

Mn2O3 structure

16

CET (EOT), Dit and thermal stability at high Temp in high κ’s on InGaAs, Ge, and GaN

High κ’s: single crystals, amorphous MBE-Ga2O3(Gd2O3) MBE-HfAlO/HfO2 MBE-Gd2O3, Y2O3, Al2O3, HfO2 ALD-Al2O3, HfO2 ALD+MBE

Phys. NCKU, 03-24-2006

Ga2O3(Gd2O3)/GaAs under high temperature annealing in UHV and non-UHV

0 1 2 3 4 5

Refle

ctivi

ty In

tens

ity (a

rb. u

nits

)

Incident angle (degree)

Raw data with best fit

ReflectivityGa2O3(Gd2O3) film on GaAs

HRTEM

AFM

-4 -3 -2 -1 0 1 2 3 4

10-8

10-6

10-4

10-2

100

J (A

/cm

2 )

E (MV/cm)0.5 0.6 0.7 0.8 0.9 1.0

1011

1012

1013

Dit (

eV-1cm

-2)

EC-E (eV)

Ga2O3(Gd2O3)/ GaAs ALD-Al2O3/ In0.15Ga0.85As

Y. L.Huang et al, APL 2005 C. P. Chen et al, JAP 2006

Cover Image & Theme Article – “InGaAs Metal Oxide Semiconductor Devices with Ga2O3(Gd2O3) High-κ Dielectrics for Science and Technology beyond Si CMOS”, M.

Hong, J. Kwo, T. D. Lin, and M. L. Huang, MRS Bulletin 34, 514 July 2009.

MRS Bulletin, July 2009

GGO Scalability and Thermal Stability

K. H. Shiu et al., APL 92, 172904 (2008) T. H. Chiang et al., unpublished

Al2O3 capping effectively minimized absorption of moisture in GGO GGO (2.5nm) dielectric constant maintains ~15 (CET~7Å) Dit’s ~ low 1011(cm-2eV-1) range even subjected to 850oC annealing (Conductance Method)

n-GaAs (buffer)

GGO n-In0.2Ga0.8As

~3nm

2” n-GaAs

Al2O3

~225nm ~7.5nm ~various thickness

19

pMOS tGGO 10 8.5 4.5

CETGGO 2.7 2.2 1.2

nMOS tGGO 8.5 5 2.5

CETGGO 2.21 1.2 0.65

-3 -2 -1 0 1 2 30.00.20.40.60.81.01.21.41.61.8

2.5nm- GGO

500Hz 1kHz 10kHz 50kHz 100kHz 500kHz

Capa

cita

nce

(µF/

cm2 )

Voltage (V)

κ~15-172 3 4 5 6 7 8 9 10

0.60.91.21.51.82.12.42.7

pMOS nMOS

CET G

GO (n

m)

tGGO (nm)5 nm 2 nm2 nm

InGaAs

Al2O3

2.5nm GGO 3 nm

Glue

-4 -2 0 2 41020304050607080

1k 10k 50k 100k 500k

Au/Al2O3(3nm)/GGO(10nm)/In0.2Ga0.8As/GaAs/B.E.

k~15-16

Bias (V)

Capa

cita

nce(

pF)

-4 -2 0 2 415

30

45

60

75

90

1k 10k 50k 100k 500k

Au/Al2O3(3nm)/GGO(8.5nm)/In0.2Ga0.8As/GaAs/B.E.

Bias (V)

Capa

cita

nce(

pF)

K~14-15

-3 -2 -1 0 1 2 30

20

40

60

80

100

120

1k 10k 50k 100k 500k

k~14-16

Bias (V)

Au/Al2O3(3nm)/GGO(4.5nm)/In0.2Ga0.8As/GaAs/B.E.

Capa

cita

nce(

pF)

-5 -4 -3 -2 -1 0 1 2 3 4 50102030405060708090

100Pt/Al2O3(3nm)/GGO(8.5nm)/In0.2Ga0.8As/GaAs/B.E.

1k 10k 50k 100k 500k

Capa

cita

nce

(pF)

Voltage (V)

k~14-16

-5 -4 -3 -2 -1 0 1 2 30102030405060708090

100Ni/Al2O3(3nm)/GGO(5nm)/In0.2Ga0.8As/GaAs/B.E.

1k 10k 50k 100k 500kCa

paci

tanc

e (p

F)

Voltage (V)

K~15-17

-3 -2 -1 0 1 2 30.00.20.40.60.81.01.21.41.61.8

Ni/Al2O3(3nm)/GGO(2.5nm)/In0.2Ga0.8As/GaAs/B.E.

500 1k 10k 50k 100k 500k

Capa

cita

nce

(pF)

Voltage (V)

k~15-17

C-V Characteristics – GGO/In0.2Ga0.8As K. H. Shiu et al, APL 92, 172904 (2008)

T. H. Chiang et al, National Tsing Hua University (unpublished)

NTHU

IMEC

U.T.Dallas NH4OH treated GaAs

U.T. Austin (NH4)2S treated GaAs

(NH4)2S treated GaAs

D. Shahrjerdi, et al. Appl. Phys. Lett. 92, 203505 (2008)

G. Brammertz, et al. Appl. Phys. Lett. 93, 183504 (2008) C. L. Hinkle, et al. Appl. Phys. Lett. 93, 113506 (2008)

State-of-the-art work of ALD Al2O3/GaAs

MIT AsH3 treated, in-situ growth with TMA/IPA

C.-W. Cheng, et al. Appl. Phys. Lett. 95, 082106 (2009)

Our work of In-situ ALD + MBE Al2O3/GaAs No pre-treatments and no interfacial

passivation layers Y. H. Chang, et al, Microelectronic

Engineering 88, 440–443 (2011)

NAMBE2009/08/12

CV Characteristics of Al2O3/GGO/In0.2Ga0.8As

Gate Substrate κ value CFB(F/cm2) Dispersion (10k-500k)

Al p-type 15-17 0.38 2.6% Al n-type 14-16 0.69 4.4% Ni p-type 14-16 0.37 3.5% Ni n-type 14-17 0.69 4.2%

-3 -2 -1 0 1 2 3 40.0

0.2

0.4

0.6

0.8

1.0

Capa

cita

nce(µF

/cm

2 )Voltage (V)

10kHz50kHz100kHz500kHz

10kHz50kHz100kHz500kHz

n-typep-typeNi

-4 -3 -2 -1 0 1 20.00.20.40.60.81.0

n-typep-type10kHz50kHz100kHz500kHz

Capa

cita

nce(µF

/cm

2 )

Voltage (V)

10kHz50kHz100kHz500kHz

Al

Y. D. Wu et al., JVST B 28(3), C3H10 (2010)

39th ESSDERC, Athens, Greece 23

nMOS

Gate metal φm (volt)

Cfb (μF/cm2)

Vfb (volt)

ΔVfb (volt)

Dispersion (10-500kHz)

Vth (volt)

Al 4.16±0.1 0.38 -1.42 -0.29±0.1 2.6% 0.04 Ni 5.19±0.15 0.37 -0.32 -0.22±0.15 3.5% 1.15

pMOS

Gate metal φm (volt)

Cfb (μF/cm2)

Vfb (volt)

ΔVfb (volt)

Dispersion (10-500kHz)

Vth (volt)

Al 4.16±0.1 0.69 0.05 0.17±0.1 4.4% -1.94 Ni 5.19±0.15 0.69 1.12 0.21±0.15 4.2% -0.88

Al2O3/GGO/In0.2Ga0.8As

Metal-work-function dependent flat-band voltages

Y. D. Wu et al., JVST B 28(3), C3H10 (2010)

153 150 147 144 141 138 135

hν = 680 eV

(III)

(V)

(VI)

153 150 147 144 141 138 135

250 eV

460 eV

680 eV

(VI)

153 150 147 144 141 138 135

hν = 680 eV

GaAs

GaAs

As2O3

(II)

(I)

114 111 108 105 102 99

GaAsGa2O3

(VI)

(V)(III)

hν = 680 eV

114 111 108 105 102 99

Ga2O3

GaAs

(II)

(I)

hν = 680 eV

448 446 444 442

InGaAs

In(OH)3

In2O3

(VI)

(V)

(III)

hν = 680 eV

448 446 444 442

hν = 680 eV

InGaAs

InGaAs

In2O3

(II)

(I)

Depth profile of ALD-HfO2/In0.15Ga0.85As: SR-XPS

(III)

(V)

(VI)

Native oxide/In0.15Ga0.85As

8nm-HfO2/In0.15Ga0.85As

In 3d5/2 Ga 3p As 3p

In 3d5/2 Ga 3p As 3p As 3p

(IV)

arsenic oxide was removed

Interfacial layer: Ga2O3; In2O3; In(OH)3

Ga2O3, As2O3, In2O3

In0.15Ga0.85As

Ga2O3, In2O3

ALD-Al2O3

In0.15Ga0.85As

Fraction of a mono-layer As2O5

ALD-HfO2

In0.15Ga0.85As

Fermi level unpinning at ALD-oxide/InGaAs

Fermi Level unpinning

Native oxide

Different chemical reaction for TEMAH/H2O and TMA/H2O on air-exposed InGaAs surface

M.L.Huang, et al, APL 87, 252104 (2005); citations:115

26

Valence band offsets: determined by XPS

InGaAsVBM

InGaAsCL EE −

oxideVBM

oxideCL EE −

InGaAsCL

oxideCL EE −

VE∆

InxGa1-xAs

oxide

)()()( oxideVBM

oxideCL

InGaAsCL

oxideCL

InGaAsVBM

InGaAsCLv EEEEEEE −−−+−=∆

:InGaAsCLE core level of InGaAs

valence level max of InGaAs

:oxideVBME

:InGaAsVBME

:vE∆

:oxideCLE

valence level maximum of oxide

core level of oxide

Valence band offset

E. A. Kraut et al., PRL 44, 1620 (1980); A. Franciosi et al., Surf. Sci. Rep. 25, 1 (1996) M. L. Huang et al., APL 89, 012903 (2006)

VBM

CBM

VBM

CBM

CL

CL

30 25 20 15 10 5 0 -5

17.1 eV

16.1 eV

23.1 eV

~5.65 eVALD amorphous HfO2

ALD amorphous Al2O3

MBE single crystalγ-Al2O3 on Si(111)

~7.5 eV

~6.8 eV

Norm

alize

d In

tens

ity (e

V)

Energy Loss (eV)

O 1s EELS

~5.45 eV

MBE amorphous (Ga2O3)(Gd2O3)

hωp~25.0 eV

Band-to-band transition Plasmon Loss

The minimum energy of band-to-band transition => Bandgap (Eg)

Bandgap of oxide : determined by photoemission-EELS

(Electron Energy Loss Spectroscopy)

F. G. Bell & L. Ley, PRB 37, 8383 (1988); S. Miiyazaki, Appl. Surf. Sci. 190, 66 (2002)

deviation: ±0.1 eV

28

HfO2/GaAs 40.36 eV -23.58 eV 14.19 eV 2.62 eV HfO2/In0.15Ga0.85As 40.42 eV -23.56 eV 14.19 eV 2.67 eV HfO2/In0.53Ga0.47As 40.57 eV -23.52 eV 14.19 eV 2.86 eV

Energy-Band Parameters at HfO2/InGaAs

InGaAsVBM

InGaAsdAs EE −

2/53oxideVBM

oxidefHf EE −

2/74InGaAs

dAsoxide

fHf EE2/52/7 34 − VE∆

0.72

1.8

2.86

1.48

2.67

1.19

x=0.53

Eg(HfO2) ~5.34 eV

x=0.15 HfO2/InxGa1-xAs

ΔEc

ΔEv

Eg(HfO2) ~5.38 eV

ΔEc

ΔEv

InxGa1-xAs

HfO2

ΔEc

ΔEv

Eg

[1] M. L. Huang et al., APL 89, (2006)

)()()( oxideVBM

oxideCL

InGaAsCL

oxideCL

InGaAsVBM

InGaAsCLv EEEEEEE −−−+−=∆

29

-4 -2 0 2 410-10

10-8

10-6

10-4

10-2

J (A

/cm

2 )

EG (MV/cm)-6 -4 -2 0 2 4 610-10

10-8

10-6

10-4

10-2

J (A

/cm

2 )

EG (MV/cm)

J at Vfb+1V =2x10-8 A/cm2

J at Vfb+1V =1x10-8 A/cm2

Conduction band offsets: F-N tunneling

8.3nm-HfO2 / In0.15Ga0.85As 7.8nm-HfO2 / In0.53Ga0.47As

0 2 4 6 8

-48

-44

-40

ln(J

/Eox

2 )

1/Eox (nm/V)

ΔEc=1.48 eV

(-) (+)

(φ-_ φ+) = (Фm-χs) --- (1) S+ = -8π(2m*)1/2(φ+)3/2/3qh --- (2) S- = -8π(2m*)1/2(φ-)3/2/3qh --- (3)

ln(JFN/Eox2) = S/Eox+ ln(C)

S = -8π(2m*)1/2(φ)3/2/3qh C = q3/8πhφm*

Фm: metal work function χs : electron affinity of InGaAs

2 4 6 8-48

-44

-40

ln(J/E

ox2 )

1/Eox (nm/V)

ΔEc=1.8 eV

(-) (+)

deviation : ±0.08 eV [1] T.S. Lay et al, Solid State Electron. 45, (2001) [2] Y. C. Chang, et. al. Appl. Phys. Lett, 92, 072901 (2008).

Discussion: Energy band parameters

Eg(Al2O3) ~6.8 eV

ALD-Al2O3/In0.15Ga0.85As

1.19 eV

3.78 eV

cE∆

vE∆

1.83±0.1eV

XPS method FN tunneling

1.6 ± 0.1 eV

deviation : ±0.1 eV

0.75

1.84

2.86

1.59 1.41

2.67 2.62

1.19 1.42

x=0 x=0.25 x=0.5

Eg(HfO2) ~5.45 eV

ALD-HfO2/InxGa1-xAs

1.66

2.74

1.05

x=0.15

cE∆

vE∆

0.75

1.89

3.86

2.09

3.96

1.71

3.67

1.05 1.42 Eg(Al2O3) ~6.8 eV

x=0 x=0.25 x=0.5 ALD-Al2O3/InxGa1-xAs

1.19

3.78

x=0.15

cE∆

vE∆

1.83

0.75 eV

1.84 ±0.1 eV

2.86 eV

x=0.5

Eg(HfO2) ~5.45 eV

ALD-HfO2/In0.5Ga0.5As

cE∆

vE∆

1.8 ± 0.1 eV

XPS method FN tunneling

31

-2 -1 0 1

1

2

3

4

Bias (V)

C/A

(µ F

/cm

2 )

50k 100k 500k

4.5nm k ~17@100 kHz, CET=1nm

ALD-HfO2 on In0.53Ga0.47As with short air exposure ~10 min

-2 -1 0 101234

∆VFB~0 V

C/A

(µF/

cm2 )

Bias (V)

Theoretical curve 1 MHz

Ti Au

InP n-In0.53Ga0.47As

n-In0.53Ga0.47As (buffer) ALD HfO2 (4.5 nm)

ƒinv ∝1/ τR ∝ ni

Unpinning Fermi-level

Y.C. Chang et al, APL 92 072901 (2008) K. Y. Lee et al, APL 92, 252908 (2008)

Achieving a low Dit in ALD-Al2O3 on In0.53Ga0.47As with short air exposure

32

10 nm

H. C. Chiu et al., Appl. Phys. Lett., 93, 202903 (2008)

very sharp Al2O3/InGaAs interface Fermi-level moves across the nearly

entire bandgap high FLME of 63% near midgap

-3 -2 -1 0 1 2 30.0

0.2

0.4

0.6

0.8

1 kHz

10 kHz

100 kHz

Quasi-static

C (µ

F/cm

2 )

Gate Bias (V)

1000 kHz

-3 -2 -1 0 1 2 3-0.4-0.20.00.20.40.60.8

EC

EV

E i

Measured Dit=0

ψ s (eV

)

Gate Bias (V)

Bandgap region probed with n-type capacitors EV EC Eg

Characteristic trapping frequency as a function of trap depth :

- Only very small portions of bandgap can be probed at 25oC. - The midgap region is not accessible at all with these frequency range.

GaAs @ 25oC Si @ 25oC

EV EC Eg

Frequencies available for C-V measurements:

100 Hz–1 MHz

For GaAs MOS devices:

Dit Extraction for Wide Bandgap Semiconductors

Measurements at 150oC giving a better coverage of the midgap region

Bandgap region probed with p-type capacitors

Why Dit Extraction at Midgap is Important for GaAs?

EV EC Eg

Si @ 25oC

Dit distribution ( ) as a function of the energy above Ev : GaAs

EC Eg

100 Hz

100k Hz

Measured @ 25oC

Measured @ 150oC

G. Brammertz et al., APL 91, 133510 (2007)

K. Martens et al., IEEE TED 55, 547 (2008)

Midgap trap-induced capacitance response

W.E. Spicer et al., JVST 91, 1422 (1979)

Y.C. Chang et al., 68th DRC (2010)

Unlike SiO2/Si showing a flat Dit distribution at midgap, oxide/ GaAs interfaces have high Dit

at midgap → serious Fermi level pinning near midgap

EV

Impact of Post-Deposition-Annealing

Ga-rich reconstructed surface

annealing before Ni gate deposition

MBE-Al2O3

p-GaAs (001)

Ni

Long time annealing at 550oC is necessary for reducing the hump

10 Additional RTP 650oC is useful for optimizing the frequency dispersion and hysteresis

Y. C. Chang, J. Kwo*, and M. Hong*, et al, Appl. Phys. Lett. 97, 112901 (2010).

annealing before Ni gate deposition

MBE-Al2O3

n-GaAs (100)

Ni

Impact of Post-Deposition-Annealing

Same trend of annealing effect on n-type GaAs substrates

Ga-rich reconstructed surface GaAs (4x6)

As-rich reconstruction: c(4x4)

typical hump

Ga-rich reconstruction: 4x6

smaller hump

100 Hz

100 kHz

100 Hz

100 kHz

Impact of Initial Surface Reconstruction

p-type GaAs

n-type GaAs

p-type GaAs

n-type GaAs

Significant reduction of Dit at midgap for Ga-rich samples

38

Dit spectrum for ALD-Al2O3/GaAs with HCl clean (G. Brammertz et al, Appl. Phys. Lett. 93, 183504 (2008))

Mid-gap Dit’s from conductance measured at high temperatures (G. Brammertz et al, IMEC)

( )Nv

kTEf tσπ

τ /exp21 ∆

==

Trap characteristic time

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.410-1

101

103

105

107

109

1011

300k 423k

frequ

ency

(Hz)

Et-Ev (eV)

GaAs

1. Dit spectra derived using both QSCV and temperature-dependent conductance method;

2. both UHV-Al2O3/Ga2O3(Gd2O3)/ and ALD-Al2O3/n- and p- In0.2Ga0.8As MOSCAPs were investigated;

3. ALD-Al2O3/In0.2Ga0.8As interface shows a high mid-gap Dit peak spectrum;

4. no discernible Dit peak for UHV-Ga2O3(Gd2O3)/In0.2Ga0.8As interface

Dit distribution – Conductance method

C.A. Lin et al., Appl. Phys. Lett., 98, 062108 (2011)

( )ψ

ψψψd

VVdqC

qC

dVd

qC

D GGoxD

G

oxit

)()(1

0

22

1

2

−=−

−

=

−

1. a gradual trending down of Dit from Ev to Ec; 2. a mean Dit ~1012 eV-1cm-2 near the mid-gap of

In0.2Ga0.8As with no discernible peak

Dit distribution – calculation from QS-CV method

( )G

ox

Gs dV

CVC

∫

−= 1ψBerglund’s integral

C.A. Lin et al., Appl. Phys. Lett., 98, 062108 (2011)

Al2O3 Ga2O3(Gd2O3)

TiN Drain

p- In0.2Ga0.8As p+- GaAs substrate

Source n+ n+

Inversion channel MOSFET

Al2O3 Ga2O3(Gd2O3)

TiN Drain

n- In0.2Ga0.8As

n+- GaAs substrate

Source

Depletion-mode MOSFET

Impact of Dit on Device Performance

Fermi level near Ev should be driven across mid-gap to generate minority carriers

Fermi level near Ec should be driven back to mid-gap to deplete channel

In-situ ALD- & MBE-oxides on freshly MBE grown InGaAs surfaces Portable UHV chamber for 2”wafer (Pressure < 3x10-10 torr) In-situ high resolution synchrotron radiation photoemission analysis

Portable UHV chamber In-situ synchrotron radiation XPS analysis In-situ MBE/ALD/XPS/STM

In situ growth and analysis of oxide/III-V interfaces

43

(a) As 3d core level spectra of the clean GaAs(001)-4x6 surface taken with hn = 85 eV in normal and 600 off-normal emission. The line represents a de-convoution of the curve. (b) An analytical fit to the spectra plotted in (a). Symbols B, SS, S1, and S2 stand for the doublets of bulk, the subsurface, the surface As atoms at the faulted position, and the As in the surface As-Ga dimer.

In-situ ALD-Al2O3 on Ga-rich n-GaAs(001)-4x6 surface: A synchrotron-radiation photoemission study

(a) (b)

In situ ALD-Al2O3/GaAs(001) interfaces: cycle by cycle analyses

Clean GaAs(001)-4x6 Surface-related doublet peak S1: As in the faulted position (-380meV), excess charge S2: As in As-Ga dimer (-652meV), excess charge SS: As-As dimer in the subsurface layer (+338meV)

As 3d

*No As-As at the ALD-Al2O3/GaAs interface

TMA/H2O: 1 cycles S1, S2 peak ↓ As(1+): S1 As bond to O-Al (As-O-Al) AsOx: S2 As bond to Al-O(As-Al-O)

TMA/H2O: 3 cycles S1, S2 peak ↓ As(1+), AsOx ↑

TMA/H2O: 6 cycles S1 : can not be passivated completely S2: peak disappeared As(1+), AsOx: exist at interface

Y. H. Chang et al, Microelectronic Engineering 88, 1101 (2011)

45

Enhancement-mode devices

HEMT-like structures

Same as conventional Si MOSFET

Phys. NCKU, 03-24-2006

Inversion channel n-GaAs and n-InGaAs/InP MOSFET

• fT = 7 GHz • fmax = 10 GHz • µ = 470 cm2/Vs

• 0.75 x 50 µm2 • gm = 190 mS/mm

0.0 0.5 1.0 1.5 2.0 2.50

2

4

6

8

10

12

14

16

18

20

Vg = 4 VStep = -1 V

渙 )

Drain Voltage (V)0 1 2 3 4 5 6

0

1

2

3

4

Vg=+3V

Vg=+5V

Vg=+7V

Vg=0V

Enhancement-Mode GaAs MOSFET

1 µmX100 µm Device

Drain Voltage (V)

Dra

in C

uren

t (m

A)

Dra

in C

uren

t (µA

)

Drain current drive capability improved over 100 times

Due to the improved oxide quality and device fabrication

Ren et al, IEDM 1996, SSE 1997, EDL 1997 Wang et al, 1999

Surface channel InGaAs MOSFET with non-self-aligned Process

Y. Xuan et al., IEDM, p. 371, (2008)

Self-aligned inversion-channel InGaAs MOSFET

1. TiN sputtering 2. PMMA coating, E-beam writing, and hard mask deposition 3. Dry-etching 4. S/D patterning, implantation & activation 5. S/D contact region patterning, wet-etching of oxide, contact

metal deposition, lift-off & ohmic alloying

In0.53Ga0.47As Buffer

MBE-Al2O3/GGO or ALD-Al2O3

Si implanted region Si implanted region

Source Drain

p- In0.53Ga0.47As

InP substrate

TiN-Gate PMMA (~300nm) Pt

Output & Sub-threshold Characteristics

1. tTiN= 160nm, tAl2O3=2nm, tGGO=5nm, W/L=10/1μm

2. Id,max=1.05 mA/µm @Vg=2V, Vd=2V

3. gm,max=714 µS/µm @Vg=0.7V, Vd=2V

4. Vth~0.2V, µFE=1300 cm2/V∙s (from transconductance analysis)

Si NMOSFET 90nm node Lg~45nm Id,sat~1 mA/µm

Self-aligned inversion-channel TiN/Al2O3/GGO/In0.53Ga0.47As/InP MOSFET T. D. Lin et al, APL 93 033516 (2008)

tTiN= 200nm, tAl2O3=3nm, tGGO=6nm, W/L=10/1μm

ID,max=1.23 mA/μm @VG=3.5V, VD=2.5V

Gm,max=464 μS/μm @VG=1.75V, VD=2V

Vth~0.25V, μFE=1600 cm2/V∙s (from transconductance analysis)

T. D. Lin et al., Solid-State Electron. 54 (2010) 915. 39th ESSDERC, Athens, Greece 50

UHV- Al2O3/GGO/In0.75Ga0.25As/InP MOSFET

0.0 0.5 1.0 1.5 2.0 4.0

0

400

800

1200

x=0.53

x=0.75

x=0 x=0.2x=0

InxGa1-xAs

x=0

x=0.3

x=0.53x=0.7

x=0.7

x=0.65

x=0.53

x=0.75x=0.53

I d,m

ax(µ

A/µm

)

0.0 0.5 1.0 1.5 2.0 4.0

0

200

400

600

800

x=0.53

x=0.75

x=0.2x=0 x=0

x=0.7

x=0.7 x=0.3

x=0.53

x=0.53x=0.53

InxGa1-xAs

x=0.75x=0.65

Lg (µm)

g m(µ

S/µm

)

E-mode III-V MOSFETs

Benchmark

MBE-Al2O3/GGO/In0.75Ga0.25As Lg=1µm ID= 1.23 mA/μm, Gm= 464 μS/μm T. D. Lin et al., SSE, (2010) MBE-Al2O3/GGO/In0.53Ga0.47As Lg=1µm ID= 1.05 mA/μm Gm= 714 μS/μm T. D. Lin et al., APL 93, 033516 (2008) MBE-Al2O3/GGO/In0.2Ga0.8As Lg=4µm ID= 9.5 μA/μm Gm= 3.9 μS/μm

GaAs (111)A

Conclusion

Perfecting the best atomic-scale hetero-structures and their interfaces in high κ and high carrier mobility semiconductors

Probing them with the most powerful analytical tools (XPS and x-ray diffraction using synchrotron radiation, in-situ XPS, and HR-TEM)

Producing novel, high-performance electronic devices ready for beyond Si CMOS

52

Benchmark E-mode inversion-channel nMOSFETs

with ALD or MOCVD oxide as gate dielectric

53

*Devices with gate-length < 1μm are included. The number near each data point indicates the In content (x) of the InxGa1-xAs channel.

Benchmark

S.S.< 80mV/dec achievable

Benchmark

0 1 2 3 46090

120150180210

x=0.75

x=0.7

CET (nm)

S.S.

(mV/

dec)

ALD-oxide A

MBE-oxide B

Enhancement-mode InxGa1-xAs MOSFETs

0.0 0.5 1.0 1.50.0

0.4

0.8

1.2

1.6x=0.75

x=0.53

ALD-oxide

MBE-Al2O3/GGO

x=0.7

x=0.7

x=0.75x=0.53

x=0.75

I D,m

ax (m

A/µm

)

0.0 0.5 1.0 1.50.0

0.5

1.0

1.5

2.0

x=0.53

x=0.7

x=0.7

x=0.75x=0.75

x=0.53

ALD-oxide MBE-Al2O3/GGO

LG (µm)

G m (m

S/µm

)

x=0.75

0 1 265707580859095

100

CET (nm)

S.S.

(mV/

dec)

Q-well FET

Self-aligned Inversion- channel FET

55

Aerial view of CERN and the surrounding region of Switzerland and France.

View of the LHC cryo-magnet inside the tunnel.

View of the ATLAS detector

Large Hadron Collider (LHC) Experiment