activity 10 - com bi national circuit

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    COMBINATIONAL CIRCUIT

    OBJECTIVES

    To design a combinational circuit in accordance with a given set of conditions. To obtain the truth table of the combinational circuit and simplify the corresponding

    output function.

    To design and construct the combinational circuit, using NAND gates with a minimumnumber of ICs.

    To test the circuit for proper operation by verifying the given conditions.

    MATERIALS

    Alexan Digital Trainer one 7400 quad two-input NAND gate one 7410 tri three-input NAND gate insulated connecting wires cutter or scissors

    PROBLEM ANALYSIS

    The task at hand is to design a combinational circuit with four inputs , , , and . The single

    output, is to be equal to 1 when:(i) = 1, provided that = 0;(ii) = 1, provided either or is also equal to 1.

    Otherwise, the output is to be equal to 0.

    In determining a Boolean function that represents this combinational circuit, we can

    start by deriving a truth table based on the given conditions. Doing so gives us Table 10-1 from

    which, we see that the desired combinational circuit has a total of ten 1s in its output.

    Specifically, the 1s correspond to the following states: 0101, 0110, 0111, 1000, 1001, 1010,

    1011, 1101, 1110, and 1111. Therefore, in sum-of-products form, the combinational circuit

    can be represented by the Boolean function

    ,,, = + + +

    + + + +

    + + .

    Alternatively, the function can be expressed in sum-of-minterms form as

    ,,, = 5 + 6 + 7 + 8 + 9 + 10 + 11 + 13 + 14 + 15

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    Laboratory Activity No. 10| 2

    or in short-hand notation, (,,,) = 5,6, 7, 8, 9,10, 11, 13, 14, 15.

    Table 10-1. Truth Table of the

    Desired Combinational Circuit

    INPUT OUTPUT

    m

    0 0 0 0 0 0

    1 0 0 0 1 0

    2 0 0 1 0 0

    3 0 0 1 1 0

    4 0 1 0 0 0

    5 0 1 0 1 1

    6 0 1 1 0 1

    7 0 1 1 1 1

    8 1 0 0 0 1

    9 1 0 0 1 1

    10 1 0 1 0 1

    11 1 0 1 1 1

    12 1 1 0 0 0

    13 1 1 0 1 1

    14 1 1 1 0 1

    15 1 1 1 1 1

    AB

    CD

    00 01 11 10

    00

    0 1 3 2

    014 5

    17

    16

    1

    1112 13

    115

    114

    1

    108

    19

    111

    110

    1

    Figure 10-1. Karnaugh map for

    There are several methods of simplifying the derived Boolean function so that the

    number of gates or ICs needed to implement the combinational circuit is minimized. The most

    convenient and least time-consuming way to do this, however, is to use a Karnaugh map. That

    is, by plotting the 1s of into the appropriate boxes of a four-variable map, and thencombining them into valid adjacent squares as shown in Figure 10-1, we easily arrive at the

    simplified expression for in sum-of-products form:

    ,,, = + + .

    The derived Boolean function, which originally consists of 10 terms with 4 literals each, is now

    reduced to an equivalent function consisting of three terms with two literals each.

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    Laboratory Activity No. 10| 3

    PROCEDURE

    Figure 10-2 below shows the logic diagram of a combinational circuit that can implement the

    function = + + using four two-input and one three-input NAND gates.

    Figure 10-2 Circuit diagramwith pin assignments and logic gate analysisfor

    the implementation of = + + using a 7400 and a 7410 IC

    Figure 10-3. Connection diagram of the circuit in Figure 10-2

    7400 7410

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    Laboratory Activity No. 10| 4

    With all data switches initially turned OFF, the circuit of Figure 10-2 is constructed on

    the digital trainer as illustrated in Figure 10-3. Power is then supplied to the digital trainer after

    double-checking all pin connections. The logic level output of the combinational circuit for

    each of the 16 possible states is determined and illustrated in Figure 10-4.

    RESULTS AND DISCUSSIONS

    SWITCHES DATA STATUS

    INPUT INPUT OUT

    S1 S2 S3 S4 LED1 LED2 LED3 LED4 LED5

    0

    1

    2

    3

    4

    5

    6

    7

    D1 D2 D3 D4 IN1 IN2 IN3 IN4 IN5

    SWITCHES DATA STATUS

    INPUT INPUT OUT

    S1 S2 S3 S4 LED1 LED2 LED3 LED4 LED5

    8

    9

    10

    11

    12

    13

    14

    15

    D1 D2 D3 D4 IN1 IN2 IN3 IN4 IN5

    If we compare the ON-OFF status of LED5 shown in Figure 10-4 to the output column of

    Table 10-1, it becomes clear that the circuit whose logic diagram is shown in Figure 10-3 isindeed the desired combinational circuit because it satisfies the given conditions (i) and (ii). In

    other words, if we express the ON-OFF output states of the Boolean function = + + into 1s and0s, we obtain a truth table that is exactly the same as that of Table 10-1.

    Furthermore, we can verify theoretically that the simplified Boolean function

    = + + is equivalent to the desired function = 5, 6, 7, 8, 9,10,11,13,14,15by generating the truth table of the former and comparing the truth values to that of the

    Figure 10-4. Output diagram of the combinational circuit = + +

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    Laboratory Activity No. 10| 5

    latter. Well, as shown in Table 10-2, the truth table of = + + is identical to thatof = 5, 6, 7, 8, 9,10, 11,13,14,15 and so, the two functions are equivalent.

    Table 10-2. Truth Table for = + +

    = + +

    0 0 0 0 0 0 0 0

    0 0 0 1 0 0 0 0

    0 0 1 0 0 0 0 0

    0 0 1 1 0 0 0 0

    0 1 0 0 0 0 0 0

    0 1 0 1 0 0 1 1

    0 1 1 0 0 1 0 1

    0 1 1 1 0 1 1 1

    1 0 0 0 1 0 0 1

    1 0 0 1 1 0 0 1

    1 0 1 0 1 0 0 1

    1 0 1 1 1 0 0 1

    1 1 0 0 0 0 0 0

    1 1 0 1 0 0 1 1

    1 1 1 0 0 1 0 1

    1 1 1 1 0 1 1 1

    CONCLUSION

    The combinational circuit that gives a logic-1 output when = 1 and = 0, or when = 1and either or is equal to 1, is represented by the Boolean function

    ,,, = + + .

    In sum-of-minterms form, this function can be expressed as

    = 5, 6, 7, 8, 9,10, 11,13,14,15 .