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FPGAFPGA(field-programmablegatearray)isaprogrammablechipwhichisemptyandconvenientfordesigningowndigitalcircuitfromgroundzero.Itenablesimplementationofallpossibledigitalfunctionsinauniversalchip.Afterproductionandbeforeprogrammingfunction,thechipitselfisinidleanddoesnothaveanyfunction,unlikemicrocontroller.FPGAconfigurationisgenerallyspecifiedbyusingHDL–hardwaredescriptionlanguage,whichissimilartoapplication-specificintegratedcircuit(ASIC).TheexampleyouaregoingtoseeismadeinLatticeDiamondsoftwareandisprogrammedintodevelopmentboardFPGAULX2SdevelopedonCroatianFacultyofElectricalEngineeringandComputing(FER).
FPGAcontainsmorehundreds,thousandsandevenmillionsofprogrammablelogicblocks(CLB–configurablelogicblock-element)andreconfigurableinterconnectionswhichenabletheseblockstoconnectwitheachother.Therearedifferentcombinationsoftheseconnectionswhichresultindifferentconfigurations.
ThemostimportantCLBcomponentsare:LUT–lookuptableswithcommonly4inputsalthoughtherecanbemoreofthem,atleastoneFF–flip-flopandMUX-multiplexer.
LookuptablesaregroupoflogicblockswhichcanbeprogrammedinlogicgatessuchasOR,AND,NOR,NAND,XORandXNOR.Dependingoninputscombination,thewantedsignalisgotten.Inthepicturesbelowyoucanseethetwobasiclogicgates–ANDandORwiththeirtruthtables.AandBareinputsandXisoutput.InANDgateoutputXisequalto1ifonlybothinputsAandBareequalto1.InORgateoutputoutputXisequalto1ifeitherinputAorBisequalto1.
Flip-flopisabistablemultivibratorwhichhas2stablestates.Thislogiccircuitisusedasamemoryof1bitthatisregisterwithvalue0or1dependingonsequenceofinputparametereswhichiswhythiscircuitispartofsequentiallogic.Flip-flopscanbeeithersimple/transparent/opaqueorclocked/synchronous/edge-triggered.Flip-flopisedge-triggeredelementmeaningitcauseschangeofoutputonlybychangeofclockstate.Therefore,thesignalcanbeeitherincreasing(fromlow0tohigh1)ordecreasing(fromhigh1tolow0)signal.Thisprinciplecanbeseenontheschemebelowwhereispresentedincreasingflip-flop–thestateofoutputchangeseventuallyontheincreasingangleofclock(goingfrom0to1).
Latchisalogiccircuitverysimilartoflip-flopbutitisnotclocked.However,therearesometypesofclockedlatchessuchassynchronousSRlatchalsocalled
SRflip-flop,whichislevel-triggeredmeaningitcauseschangewhenclockishigh(1).Whenclockdecreasesto0,theoutputsignalholdsthestatewhichdata(D)inputsetintheendoftheprevioushighclockstateaslongasclockturnshighthenexttime.
ThelastcomponentofCLBbutnotleastimportantisMUX.MUXiscomponentusedforchoosingormixingsignalsgottenonoutputofLUTandflip-flop(FF).ItcanletonlyoneofthesignalsgooutofCLBormixthemtogetdesiredcombination.InthenextpictureofCLBontheright-handsideMUXisshown.Dependingoninputs,theparticularoutputsignalisgotten.
ThenextcircuitrepresentsRS(ResetSet)bistablewhichishereusedtocontrolavehicletogoleft(btnleft)orright(btnright)andforparticularcombinationofpressedbuttons,particularLEDs(led4/led5)turnon.
WhereisFPGAused?ThemostcommonapplyofFPGAisinoureverydaylifewheredigitallogicisnecessary.Youcanfinditin"smart"computersandascontrollersfor"smart"devicessuchasremotecontrollers,LEDdisplaycontrollers,alarmdevicesandmanyotherdevicesinhouseholdorindustry.Inthepicturebelowyoucansee"smarthome",onlysomeofnumerousapplicationsofFPGA.
Inthenextexampleisshownapracticalpresentationoftrafficlightscontrolusinginductionsensorsonstreets.ThisexampleistheprojectwhichwascarriedoutbyLeoPlesewhenhewasstudentof3rdgradeofXVgymnasium,Zagreb.
Trafficlightregulationwithvehiclesensoronsecondaryroadandmaintenanceswitch
ProjectisbasedonFPGALatticeLFXP2-5eboardasswitchinterfaceandArduinoMega2560boardastimercontrol.Trafficregulationandoptimizationisaccomplishedwithconstantgreenlightonamainroadandsecondarytrafficlightonasideroadcontrolledwithinductionloopsensorplacedundertheroadsurface.Whenvehiclestopsatredtrafficlightonthesideroad,itispositionedoverinductionsensorwhichgivessignaltotheFPGAboardandtrafficlightsequencebegins.Thesequencemeansthatyellowandthenredlightturnsononthemainroadandthenyellowandgreenlightturnononthesideroad;sequenceendswithyellow/redonthesideroadandyellow/greenonthemainroad.Ifthereismorethanonevehicleonthesideroad,sequencealtersthemainandthesideroadtrafficlight.Inthisway,trafficisoptimizedsothatthereisnowaitingforthesideroadlightturngreenwithoutneed.Arduinoworksasatimerwithtwooutputsfortrafficlightsandinputsoneofwhichisformaintenancewhichturnsonyellowblinkinglightsonalltrafficlightsandtheotherisfrominductionsensoronthesideroad.
FPGAhasverysimplelogic.Firstoutputhasvalueonewhenmaintenanceswitchisonandsecondaryoutputgivesvalueonewhenvehicleactivatesinductionsensorassumingmaintenanceswitchisoff.Logicworksonthenextprinciple:Logicinvertergives1whenmaintenanceswitchisinopen(off)position.LogicgateANDhasvalue1ononesideandgivesvalue0notuntilinductionswitchcloses.WheninductionswitchisclosedlogicgateANDgetinputs1and1thenoutputis1whichgivessignaltoArduinotimertostartlightsequence.Whenmaintenanceswitchininclose(on)position,itgivesvalueof1whichdirectlygivessignaltoArduinotimertoturnonmaintenanceyellowlightsonalltrafficlights.Thesignalisinvertedfrom1to0onlogicinverterwhoseoutput(0)isforwardedtoANDgatewhichgetsvalueof0asaninputononesidesoitdoesnotgiveoutput1evenifinductionsensorsendssignal1incasethatvehiclestopsonthesideroad.Inthiswayinourlogicpriorityisgiventomaintenanceswitchandtheninductionswitchonthesideroad.
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