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FPGA FPGA (field-programmable gate array) is a programmable chip which is empty and convenient for designing own digital circuit from ground zero. It enables implementation of all possible digital functions in a universal chip. After production and before programming function, the chip itself is in idle and does not have any function, unlike microcontroller. FPGA configuration is generally specified by using HDL – hardware description language, which is similar to application-specific integrated circuit (ASIC). The example you are going to see is made in Lattice Diamond software and is programmed into development board FPGA ULX2S developed on Croatian Faculty of Electrical Engineering and Computing (FER). FPGA contains more hundreds, thousands and even millions of programmable logic blocks (CLB – configurable logic block - element) and reconfigurable interconnections which enable these blocks to connect with each other. There are different combinations of these connections which result in different configurations.

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Page 1: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

FPGAFPGA(field-programmablegatearray)isaprogrammablechipwhichisemptyandconvenientfordesigningowndigitalcircuitfromgroundzero.Itenablesimplementationofallpossibledigitalfunctionsinauniversalchip.Afterproductionandbeforeprogrammingfunction,thechipitselfisinidleanddoesnothaveanyfunction,unlikemicrocontroller.FPGAconfigurationisgenerallyspecifiedbyusingHDL–hardwaredescriptionlanguage,whichissimilartoapplication-specificintegratedcircuit(ASIC).TheexampleyouaregoingtoseeismadeinLatticeDiamondsoftwareandisprogrammedintodevelopmentboardFPGAULX2SdevelopedonCroatianFacultyofElectricalEngineeringandComputing(FER).

FPGAcontainsmorehundreds,thousandsandevenmillionsofprogrammablelogicblocks(CLB–configurablelogicblock-element)andreconfigurableinterconnectionswhichenabletheseblockstoconnectwitheachother.Therearedifferentcombinationsoftheseconnectionswhichresultindifferentconfigurations.

Page 2: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

ThemostimportantCLBcomponentsare:LUT–lookuptableswithcommonly4inputsalthoughtherecanbemoreofthem,atleastoneFF–flip-flopandMUX-multiplexer.

LookuptablesaregroupoflogicblockswhichcanbeprogrammedinlogicgatessuchasOR,AND,NOR,NAND,XORandXNOR.Dependingoninputscombination,thewantedsignalisgotten.Inthepicturesbelowyoucanseethetwobasiclogicgates–ANDandORwiththeirtruthtables.AandBareinputsandXisoutput.InANDgateoutputXisequalto1ifonlybothinputsAandBareequalto1.InORgateoutputoutputXisequalto1ifeitherinputAorBisequalto1.

Page 3: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

Flip-flopisabistablemultivibratorwhichhas2stablestates.Thislogiccircuitisusedasamemoryof1bitthatisregisterwithvalue0or1dependingonsequenceofinputparametereswhichiswhythiscircuitispartofsequentiallogic.Flip-flopscanbeeithersimple/transparent/opaqueorclocked/synchronous/edge-triggered.Flip-flopisedge-triggeredelementmeaningitcauseschangeofoutputonlybychangeofclockstate.Therefore,thesignalcanbeeitherincreasing(fromlow0tohigh1)ordecreasing(fromhigh1tolow0)signal.Thisprinciplecanbeseenontheschemebelowwhereispresentedincreasingflip-flop–thestateofoutputchangeseventuallyontheincreasingangleofclock(goingfrom0to1).

Latchisalogiccircuitverysimilartoflip-flopbutitisnotclocked.However,therearesometypesofclockedlatchessuchassynchronousSRlatchalsocalled

Page 4: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

SRflip-flop,whichislevel-triggeredmeaningitcauseschangewhenclockishigh(1).Whenclockdecreasesto0,theoutputsignalholdsthestatewhichdata(D)inputsetintheendoftheprevioushighclockstateaslongasclockturnshighthenexttime.

ThelastcomponentofCLBbutnotleastimportantisMUX.MUXiscomponentusedforchoosingormixingsignalsgottenonoutputofLUTandflip-flop(FF).ItcanletonlyoneofthesignalsgooutofCLBormixthemtogetdesiredcombination.InthenextpictureofCLBontheright-handsideMUXisshown.Dependingoninputs,theparticularoutputsignalisgotten.

ThenextcircuitrepresentsRS(ResetSet)bistablewhichishereusedtocontrolavehicletogoleft(btnleft)orright(btnright)andforparticularcombinationofpressedbuttons,particularLEDs(led4/led5)turnon.

Page 5: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

WhereisFPGAused?ThemostcommonapplyofFPGAisinoureverydaylifewheredigitallogicisnecessary.Youcanfinditin"smart"computersandascontrollersfor"smart"devicessuchasremotecontrollers,LEDdisplaycontrollers,alarmdevicesandmanyotherdevicesinhouseholdorindustry.Inthepicturebelowyoucansee"smarthome",onlysomeofnumerousapplicationsofFPGA.

Inthenextexampleisshownapracticalpresentationoftrafficlightscontrolusinginductionsensorsonstreets.ThisexampleistheprojectwhichwascarriedoutbyLeoPlesewhenhewasstudentof3rdgradeofXVgymnasium,Zagreb.

Page 6: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

Trafficlightregulationwithvehiclesensoronsecondaryroadandmaintenanceswitch

ProjectisbasedonFPGALatticeLFXP2-5eboardasswitchinterfaceandArduinoMega2560boardastimercontrol.Trafficregulationandoptimizationisaccomplishedwithconstantgreenlightonamainroadandsecondarytrafficlightonasideroadcontrolledwithinductionloopsensorplacedundertheroadsurface.Whenvehiclestopsatredtrafficlightonthesideroad,itispositionedoverinductionsensorwhichgivessignaltotheFPGAboardandtrafficlightsequencebegins.Thesequencemeansthatyellowandthenredlightturnsononthemainroadandthenyellowandgreenlightturnononthesideroad;sequenceendswithyellow/redonthesideroadandyellow/greenonthemainroad.Ifthereismorethanonevehicleonthesideroad,sequencealtersthemainandthesideroadtrafficlight.Inthisway,trafficisoptimizedsothatthereisnowaitingforthesideroadlightturngreenwithoutneed.Arduinoworksasatimerwithtwooutputsfortrafficlightsandinputsoneofwhichisformaintenancewhichturnsonyellowblinkinglightsonalltrafficlightsandtheotherisfrominductionsensoronthesideroad.

Page 7: FPGA - scienceup.orgscienceup.org/wp-content/uploads/2016/10/FPGA-1.pdf · FPGA FPGA (field-programmable gate array) is a programmable chip which is empty ... In the next example

FPGAhasverysimplelogic.Firstoutputhasvalueonewhenmaintenanceswitchisonandsecondaryoutputgivesvalueonewhenvehicleactivatesinductionsensorassumingmaintenanceswitchisoff.Logicworksonthenextprinciple:Logicinvertergives1whenmaintenanceswitchisinopen(off)position.LogicgateANDhasvalue1ononesideandgivesvalue0notuntilinductionswitchcloses.WheninductionswitchisclosedlogicgateANDgetinputs1and1thenoutputis1whichgivessignaltoArduinotimertostartlightsequence.Whenmaintenanceswitchininclose(on)position,itgivesvalueof1whichdirectlygivessignaltoArduinotimertoturnonmaintenanceyellowlightsonalltrafficlights.Thesignalisinvertedfrom1to0onlogicinverterwhoseoutput(0)isforwardedtoANDgatewhichgetsvalueof0asaninputononesidesoitdoesnotgiveoutput1evenifinductionsensorsendssignal1incasethatvehiclestopsonthesideroad.Inthiswayinourlogicpriorityisgiventomaintenanceswitchandtheninductionswitchonthesideroad.


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