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Investigations on Dodecagonal Space VectorGeneration for Induction Motor Drives

Presented by

Anandarup Das

CEDT, IISc, Bangalore

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CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA 2

Motivation for the present research.

Schemes to be presented

Hybrid space vector PWM strategy in linear and over-modulation regioninvolving hexagonal and dodecagonal space vector diagrams.

Development of two concentric dodecagons using conventional 3-levelinverters with capacitor balancing.

Further refinement of the above space vector structure into multiple 12-sided

polygons with conventional 3-level inverters. Modulation strategies and PWM timing calculation of the above schemes.

Discussion on experimental verification

Steady state operation.

Transient results with motor accelerated upto rated speed with open-loop V/f

control Harmonic performance of phase voltage and phase current under these

conditions

Conclusion

Flow of presentation

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Motivation for the present research

Multilevel inverters are popular for high power drives because of lowswitching losses and low harmonic distortion in the output voltage.

In many multilevel inverter fed high power drives, the switching frequencyof the inverter is limited because of large dv/dt stress on the devices and themotor and higher switching losses.

However, with low switching frequency, lower order harmonics e.g. 5thand7thorder can be a considerable percentage of the total current, in particularduring over-modulation and 6-step operation.

So a trade-off is required to maintain the quality of the inverter outputvoltage without resorting to higher switching frequency. In this regard, adodecagonal space vector diagram is very desirable that eliminates all the 5thand 7thorder harmonics from the phase voltage, leaving the next set ofharmonics at (12n1), n=integer.

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Hexagonal space vectors.

12-sided polygonal space vectors.

Evolution of space vector structures (Hexagonal and 12-sided)

2-level

3-level 5-level

O

1

2

5

6

7

89

10 11

12

4 3

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Proposed research schemes

In the proposed work, a multilevel inverter topology is described which

produces hexagonal space vector diagrams in lower-modulation region and adodecagonal space vector structure in the higher modulation region.

In another scheme, a multilevel voltage space vector structure with vectorson the dodecagon is generated by feeding an open-end winding IM drive bytwo three level inverters.

In a third scheme, a high resolution PWM technique is proposed involvingmultiple dodecagonal space vector structures, that can generate highlysinusoidal voltages at a reduced switching frequency.

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Part-1A Combination of Hexagonal and

Dodecagonal Voltage Space Vector Diagramfor Induction Motor Drives

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7/74 CEDT, INDIAN INSTITUTE OF SCIENCE, BANGALORE, INDIA 7

O1

2

5

6

7

89

10 11

12




2-level

3-level 5-level

4 3

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Voltage space vector diagram of the proposed scheme

Consists of four concentric hexagonal

diagrams with different radii (0.366kVdc ,0.634kVdc , 1kVdcand 1.366kVdc).

Operates in the inner hexagons at lowervoltage to retain the advantages ofmultilevel inverter like low switching

frequency.At higher voltage, the outermosthexagon and the 12-sided polygonal spacevector structure is used resulting in highlysuppressed 5thand 7thorder harmonics.

The leads to 12-step operation at ratedvoltage operation, leading to the completeelimination of 6n1 harmonics. (n=odd)from the phase voltage.

End of linear modulation

OE: 1.225kVdc

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Inverter Topology

R-phase

Pole voltage Level S11 S21 S31

1.366kVdc 3 1 1 1

1.0kVdc 2 0 1 1

0.366kVdc 1 1 0 1

0Vdc 0 1 0 0

Consists of three cascaded 2-level inverters

Two inverters are supplied with a dc bus of0.366kVdcwhile the third one is supplied witha dc bus of 0.634kVdc.

Switch status for different levels of pole voltage

A

O

B

D

C

Pole voltage of overall inverter-vAOPole voltage of INV3- vBOPole voltage of INV2-vABPole voltage of INV1-vCD

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Transformer connection for generation of 12-sidedpolygonal voltage space vector

Asymmetric DC-links are easily realized by a combination of star-deltatransformers, since 0.634kVdc=3 x 0.366kVdc.

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The modulation index (m), is defined as the ratio ofthe length of the reference vector to the length of theradius of the dodecagon. m = 0.966 in linearmodulation and m =1 at 12-step operation.

Here, the radius of the dodecagon is 1.225kVdc.Thusthe maximum fundamental phase voltage available fromthis space vector diagram is 0.806kVdc(in 12-step).

It is known that, the maximum fundamental voltageavailable from a conventional hexagonal space vectordiagram in 6-step mode is 0.637Vdcand equal to0.577Vdc at the end of linear modulation.

For comparison purpose, if the maximum fundamentalvoltage available in 6-step mode and 12-step mode are

made equal to 0.637Vdc, then k = 0.637/0.806=0.789.

For k = 0.789, the maximum phase voltage availablehere in linear modulation is 0.615Vdcand equal to0.637Vdcin 12-step mode of operation. There is hencean increase in linear modulation range.

Comparison with hexagonal space vector structure

radius= 1.225kVdc

Radius of dodecagon

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Modulating waveform

The modulating waveform for phase-A for 35Hz operation (linearmodulation range) is shown.

The modulating waveform is synchronized with the start of the sector(sampling interval is always a multiple of twelve).

Because of asymmetric voltage levels, three asymmetric synchronized

triangles are used; their amplitudes are in the ratio 1:3:1.

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Switching sequence analysis

Three pole voltages are shown for a 60degree interval at 35Hz operation.

Level shifted SVPWM is used here.

In Aphase the voltage level fluctuatebetween levels 3 and 2 , and in Cphase the voltage level fluctuatesbetween levels 1 and 0 .

The sequence in which the switchesare operated are as follows: (200),(210), (211), (311), (321), (311), (211),(210), (211), (311), (321), (211), (221),(321), (221), (210), (220), (221), (321),

(331), (221), (220),where the numbers in

brackets indicate the level of voltage.

This sequence corresponds to 2samples per sector. There are altogether12 sectors spanning from 00to 300, 300to 600and so on.

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Experimental Setup

A digital signal processor (DSP), TMS320LF2812 is used for experimental

verification.For different levels of output in the pole voltage, three carriers are required.However, it is difficult to synthesize three carrier waves in the DSP, as such onlyone carrier is used and the modulating wave is appropriately scaled and levelshifted.

A 3.7kW induction motor was fed by the proposed inverter operating underopen loop constant V/f control at no load. The motor was made to run underno load in order to show the effect of changing PWM patterns of the generatedvoltage on the motor current, particularly during transient conditions.

In order to keep the overall switching frequency within 1 KHz, number of

samples is decided as follow:Upto 20 Hz operation: 4 samples per sector.20 Hz-40 Hz: 2 samples per sector.Beyond 40 Hz: 1 sample per sector-extending up to final 12-step mode.Individual inverters are switched less than half of the total cycle.

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Experimental results-Operation at 10 Hz

Pole voltage waveforms

Phase voltage and current waveforms

Phase voltage

Phase current

Overall inverter

INV3

INV2

INV1

Switching happens within the innermosthexagon space vectors.

As seen from the pole voltage waveforms,only the lower inverter is switched while theother two inverters are off, hence theswitching loss is low.

Four samples are taken in each sector, soINV3 switching frequency is(12x4X10=480Hz). The first carrier bandharmonics also reside around 48 timesfundamental.

[Inverter Topology]

Normalized harmonic spectrum of

Phase voltage Phase current

[Space Vector]

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Experimental results-Operation at 30 Hz

The space vectors that are switchedlie on the boundaries of the secondand third hexagon from the center.

Number of samples are reducedfrom four to two, thus switching

frequency is (fs=12X2x30=720Hz).

INV3 and INV1 are switched about1/3rd of the total cycle, while INV2is switched about 20% of the cycle.



Phase voltage

Phase current

Overall inverter

INV3

INV2

INV1



[Space Vector]

[Inverter Topology]

INV2 switches

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Operation at 47 Hz ( end of linear modulation range)

One sample is taken at the start ofa sector, so switching frequency isonly around (12X47=564Hz).

The space vectors that areswitched lie between the outerhexagon and the 12-sidedpolygon.



Phase voltage

Phase current

Overall inverter

INV3

INV2

INV1



[Space Vector]

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Operation at 50 Hz ( 12-step operation)

Inverter Topology

Complete elimination of 6n1harmonics (n=odd) from the phasevoltage.

One sample is taken at the start of asector (fs=12X1x50=600Hz).

Each inverter is switched only once ina cycle.



Phase voltage

Phase current

Overall inverter

INV3

INV2

INV1



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Input current at 50 Hz ( 12-step operation)

The input current to the inverter is not peaky in nature, because of thepresence of the star-delta transformers.

Phase voltage

Phase current

Input phasevoltage

Input linecurrent

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Motor acceleration with open loop V/f Control

Transition of motor phase voltage and currentfrom 24 samples to 12 samples per cycle at 40Hz

Because of the suppression of the 5thand 7thorder harmonics, the motor currentchanges smoothly during the transition when the number of samples per sector isreduced from two to one at 40Hz operation.

As the speed of the motor is further increased, the inverter switching states passthrough the inner hexagons and ultimately the phase voltage becomes a 12-stepwaveform.

Under all operating conditions, the carrier is synchronized with the start of thesector.

Transition of motor phase voltage and currentfrom outermost hexagon to 12-step operation.

Phasevoltage

Phasecurrent

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Total Harmonic Distortion upto 100thharmonic

It is seen that voltage WTHD is quite low for all the operating conditions, as

such the torque pulsation and harmonic heating in the machine is minimized.

Harmonic performance of phase voltage and current

10Hz 30 Hz 48.25 Hz 50Hz

Voltage THD 57.59% 27.51% 14.67% 17.54%

Voltage WTHD 0.81% 0.7% 0.97% 1.04%

Current THD 12.31% 10.59% 15.6% 19.54%

Current WTHD 0.28% 0.45% 1.2% 1.5%

1002

2

1

n

n

V

THDV

2100

2

1

n

n

V

nWTHD

V

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A simplified comparative study is made between the proposed topology and

the existing multilevel inverter configurations viz. 3-level NPC and 4-level NPCinverters used for induction motor drives.

The conduction and switching losses incurred in the inverter, and motorphase voltage harmonic distortions are numerically calculated by computersimulation for comparison.

A linear turn-on and turn-off switching profile is used for loss calculation.Losses incurred in snubber circuits, protection circuits, gate drives and due toleakage currents are neglected.

A 2.3kV, 373kW induction motor is driven by a 3-level NPC, 4-level NPC and

the proposed inverter.The inverter drives the induction motor under full load

condition at around 0.85 p.f. lagging. Numbers of samples in a cycle are takenas 24.

Comparison with conventional structures

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Loss comparison with conventional structures

Phasevoltage

WTHD

IGBTSwitching

loss

IGBTConduction

loss

Conductionloss in anti-

paralleldiodes

Clampingdiode

conduction loss

Total

Loss

unit % W W W W W

40 Hz Linear modulation

3-level NPC 0.68 95 2180 272 240 2787

4-level NPC 0.46 61 2400 414 350 3225Proposed Inv 0.46 96 1884 306 0 2286

48 Hz Over modulation

3-level NPC 1.22 27 2370 165 130 2692

4-level NPC 0.89 20 2616 243 169 3049

Proposed Inv 0.55 25 1995 207 0 2227

50 Hz Square wave mode of operation

3-level NPC 4.64 6 2511 184 0 2701

4-level NPC 4.64 12 2730 258 0 3000

Proposed Inv 1.04 10 2034 180 0 2224

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Observations

The phase voltage WTHD for the proposed inverter shows considerableimprovement, particularly at higher modulation indices and the 12-step

mode of operation, because of the suppression or elimination of the 6n1(n=odd) harmonics.

Conduction losses are more dominant than switching losses for IGBT madeinverters. As such, presence of the clamping diodes in NPC invertersincreases the total losses of the inverter. The proposed inverter does nothave any clamping diode and is devoid of any such losses. The switching

losses also remain low for the proposed inverter.

It is seen that the conduction losses in the proposed inverter are always lessthan the conventional inverters. This is because in the proposed inverter, forany level of pole voltage output, two current carrying switches remain inconduction. This is not always the case in NPC inverters; e.g. for a four levelinverter, at higher modulation indices, three switches per phase carry thephase load current when the total dc bus voltage is obtained at the pole.Conduction losses in the proposed inverter are further less in over-modulation region because of the fact that the r.m.s. current in the inverteris less compared to conventional NPC inverters, due to the suppression orelimination of the 6n1 (n=odd) harmonics.

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Synopsis

A multilevel inverter topology is described which produces hexagonalspace vector structures in lower-modulation region and a dodecagonal

space vector structure in the higher modulation region.

In the extreme modulation range, voltage vectors at the vertices of theouter dodecagon and the vertices from the outer most hexagon is usedfor PWM control, resulting in highly suppressed 5thand 7thorderharmonics thereby improving the harmonic profile of the motor current.

This leads to the 12-step operation at 50Hz where all the 5th

and 7th

orderharmonics are completely eliminated.

At the same time, the linear range of modulation extends upto 96.6% ofbase speed. Because of this, and the high degree of suppression of lowerorder harmonics, smooth acceleration of the motor upto rated speed is

possible.

Apart from this, the switching frequency of the multilevel inverter outputis always limited within 1 kHz. The middle inverter ( high voltage inverter)devices are switched less than 25% of the output fundamental switchingperiod.

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Part-IIGeneration of Multilevel Dodecagonal Space

Vector Diagram

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O1

2

5

67

89

10 11

12




2-level

3-level 5-level

4 3

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Multilevel dodecagonal space vector diagram

This is an extension of the singledodecagonal space vector

structure into a multileveldodecagonal structure.

Compared to conventionaldodecagonal space vectorstructure, the device ratings anddv/dt stress on them arereduced to half.

The switching frequency is alsoreduced to maintain the sameoutput voltage quality.

Here the added advantage is thecomplete elimination of 6n1harmonics, n=odd, from thephase voltage throughout themodulation index.

The linear modulation range isalso extended compared to thehexagonal structure.

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Multilevel 12-sided polygonal space vector structure

Consists of two concentricdodecagonal space vectorstructures.

Unlike conventionalhexagonal multilevelstructure, here the sub-

sectors are isoscelestriangles rather thanequilateral triangles.

Each sector is thus dividedinto four sub-sectors asshown.

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Inverter Structure

In order to realize the proposed space vector structure, two conventionalthree level NPC inverters are used to feed an open ended induction motor.

The two inverters are fed from asymmetrical dc voltage sources which can beobtained from the mains with the help of star-delta transformers anduncontrolled rectifiers.

Because of capacitor voltage balancing of the NPC inverters, only two dcsources are used.

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Switching state combination for realizing space vector 16

INV1 produces vector X(220) while INV2 produces vector Y(022).

When they are combined, the resultant vector Z(220, 022) is produced.

Ti i l l ti f d d l t l ti

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Here, the timings for which adjacent vectors are switched are obtained as,

This is similar to conventional space vector PWM.

However, this requires calculation of sine values through a look-up table,which takes unnecessary memory and time in a DSP.

A better algorithm has been generated which can calculate the timings bysampling six reference rotating phasor.

1 1

2 2

0 1 2

6* ;

6

* ;

6

;

sin

sin

sin

sin

ref

ref

s

s

s

V T T

V T T

T T T T

V

V

Timing calculation for dodecagonal space vector locations

Ti i l ti diff t t

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Instead of vectors on thevertices of the sector, three

nearest enclosing vectors arenow switched. This is done toachieve multilevel switching.

The time durations for whichthe original vectors need to be

switched is modified. The newtiming durations are achieved byvolt-second balance.

The timing relation can beextended to other sub-sectors.

Timing relation among different space vectors

V1, T1

V2, T2

V1, T1

V4, T2

V1, T0

Point Switched

for

V1 T1

V2 T2

O T0

Point Switched

for

V1 T1= 2T1-TS

V4 T2 = 2T2

V1 T0= 2T0

Note:

T0 >= 0.T1+T2+T0= T1+T2+ T0=TS.

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Capacitor balancing scheme

The inner dodecagonalspace vectors (points 1-12)have four multiplicities whichare complementary in naturein terms of capacitorbalancing.

The outer dodecagonalspace vectors ( points 13-36) either do not cause anycapacitor unbalancing, orhave complementary states

to maintain capacitorbalancing.

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Inner 12-sided polygon-switching multiplicities for point-1

C2 is discharged, C4 is charged.




The four switching multiplicities are complementary in nature in terms of capacitor balancing.

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Outer 12-sided polygon-switching multiplicities

C4 is discharged, C1 & C2 are

undisturbed.

Point-13, two multiplicities

C3 is discharged, C1 & C2 are

undisturbed.

Point-36: no multiplicity, nocapacitor disturbance

Point-14: no multiplicity, nocapacitor disturbance

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Experimental results-15 Hz operation

Phase voltage

Pole voltage-high voltageinverter

Pole voltage-low

voltage inverter

Phase current

Four samples are taken in each sector and switching takes place entirely in

the inner 12-sided polygon. The phase voltage harmonics reside at 15x12x4=720 Hz, which is 48 times

the fundamental. However, the switching frequency of the pole voltage ofINV1 is (24x15=) 360Hz, while that of INV2 is (32x15=) 480Hz.

The higher voltage inverter switches about 50% of the cycle.

Normalized harmonic spectrum ofPhase voltage

Phase current

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Phase voltage


Pole voltage-low

voltage inverter

Phase current

Three samples are taken in each sector and switching takes place at the

boundary the inner 12-sided polygon. All the 6n1 harmonics, n=odd, areabsent from the phase voltage, while the rest are highly suppressed.

The switching frequencies of the pole voltage of INV1 and INV2 arerespectively (18x23=) 414Hz and (24x23=) 552Hz, with output phase voltageswitching frequency at 828Hz (=23x12x3).


Phase current

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Phase voltage


Pole voltage-low

voltage inverter

Phase current

Two samples are taken in each sector and switching takes place between the

inner and outer dodecagons. This is also seen in the phase voltage waveform, since the outer envelope of the

waveform at lower frequency becomes the inner envelope at higher frequency.

The harmonic spectrum of the phase voltage and current shows the absence ofpeaky harmonics throughout the range.


Phase current

l l 8

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Phase voltage


Pole voltage-low

voltage inverter

Phase current

This is the end of the linear modulation of operation.

Here the number of samples per sector is two, as such the switchingfrequency sidebands reside around 24 times the fundamental. The switchingfrequency of the pole voltages of INV1 and INV2 is respectively (48x12=)576Hz and (48x16=) 768Hz, with an output phase voltage switchingfrequency of 1152Hz (48x12x2).


Phase current

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At the end of end over-modulation region, 24 samples are taken in a sector,corresponding to the vertices of the polygon.

Experimental results-49.9 Hz operation

Phase voltage


Pole voltage-lowvoltage inverter

Phase current


Phase voltage

Phase current

l l 0

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This is the 12-step operation, where one sample is taken at the start of asector. The phase voltage and current is completely devoid of any 5thand 7thorder harmonics.


Phase voltage

Phase current

Phase voltage



Phase current

l th h

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Total Harmonic Distortion upto 100thharmonic

It is seen that voltage WTHD is quite low for all the operating conditions, as

such the torque pulsation and harmonic heating in the machine is minimized.

1002

2

1

n

n

V

THDV

2100

2

1

n

n

V

nWTHD

V

VoltageTHD

VoltageWTHD

CurrentTHD

CurrentWTHD

15Hz 75.4% 1.48% 24.49% 0.56%

23Hz 21.2% 0.54% 9.19% 0.48%

40Hz 24.85% 0.71% 12.08% 0.65%

48Hz 9.67% 0.33% 5.52% 0.26%

49.9Hz 7.26% 0.28% 4.68% 0.24%

50Hz 17.54% 1.04% 19.54% 1.5%

Harmonic performance of phase voltage and current

A l ti f th t

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Acceleration of the motor

Transition of motor phase voltage and currentfrom inner to outer 12-sided polygon

Transition of motor phase voltage and current

from over-modulation to 12-step operation.

Phasevoltage

Phasecurrent

In both the cases, the motor current changes smoothly as the motoraccelerates. This happens because of the use synchronized PWM and totalelimination of 6n1 harmonics, n=odd, from the phase voltage throughoutthe modulation index.

E i t l R lt it b l i t 20 H

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Controller action takenDeliberate unbalancing

Vc1, Vc2

Vc3, Vc4

Capacitor unbalance is

done at steady statewith the motor runningat 20 Hz speed.

Both side capacitors aredeliberately unbalancedand after some time

controller action istaken.

C1,C2 : higher voltage side capacitors

C3,C4 : lower voltage side capacitors

Experimental Results-capacitor unbalancing at 20 Hz

E i t l R lt it b l i t 40H

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Experimental Results-capacitor unbalancing at 40Hz

Controller action taken

Deliberate unbalancing

Vc1, Vc2

Vc3, Vc4

Both the sides are made

unbalanced at the sametime and are seen tocome back to thebalanced state.

Compared to the 20 Hzcase, it requires more

time to restore voltagebalance, since thenumber of multiplicitiesin the outer polygon isless.

C1,C2 : higher voltage side capacitors

C3,C4 : lower voltage side capacitors

Synopsis

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Synopsis

An improved space vector diagram is proposed here that is composed ofof two concentric dodecagons. It reduces the device rating and the dv/dt

stress on the devices to half compared to existing 12-sided schemes.

The entire space vector diagram is divided into smaller sized isoscelestriangles. PWM switching on these smaller triangles reduces the inverterswitching frequency without compromising on the output voltage quality.

The proposed topology is realized by feeding an open-end inductionmotor with two conventional 3-level NPC inverters, where, the highvoltage inverter always switches at nearly half the output phase voltageswitching frequency.

Additionally, the mechanism for capacitor balancing, using switching state

redundancies is also proposed for the full modulation range

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Part-IIIA Voltage Space Vector Diagram Formed By

Six Concentric Dodecagons

Evolution of space vector structures (Hexagonal and 12 sided)

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O1

25

6

7

89

10 11

12




2-level

3-level 5-level

4 3

Space Vector Structure

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Space Vector Structure

The space vector diagram consists ofsix concentric dodecagonal structures- A, B, C, D, E and F.

These are grouped as type-1 andtype-2 dodecagons, where type-2dodecagons (A, C and E) lead type-1

dodecagons (B, D and F) by 150

.

The radii of these polygons are inthe ratio r1: r2: r3: r4: r5: r6 =1: cos (/12): cos (2/12):cos (3/12) :cos (4/12) :cos (5/12).

The entire space vector diagram isdivided into 12 sectors each of width300.

Power Circuit of the Inverter

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Power Circuit of the Inverter

The power circuit of the inverter consists of 2 three level NPC invertersfeeding an open end induction motor.

These two inverters are fed from isolated dc voltage sources having voltageratio of 1:0.366. This ratio of voltages is obtained from a combination of stardelta transformers since 1:0.366= (3+1):1.

Realization of space vector 27

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Realization of space vector 27

Point 27 can have two switching combinations- (110,002) or (221,002).

PWM timing calculations

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PWM timing calculations

PWM timing calculations are done separately for type-1 and type-2 dodecagons.

Later they are used to find a uniform timing relation.

[movie]

PWM timing calculations type 2 polygon

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PWM timing calculations type-2 polygon

Instead of switching points V1andV2, the same reference vector VRcanbe realized by switching V

3

and V4

,but with different time durations.

This will reduce the instantaneouserror between the reference vectorand the switching vectors, causingmultilevel operation of the inverter.

V1, T1

V2, T2

V3, T1

V4, T2

provided

Point Switched

for

V1 T1

V2 T2

O T0

Point Switched

for

V3(=kV1) T1=T1/k

V4(=kV2) T2=T2/k

O T0

T0 0

Note:

k =V3/ V1=V2/ V4is a fraction.T1+T2+T0= T1+T2+ T0=TS.

PWM timing calculations type 2 polygon

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PWM timing calculations type-2 polygon

The same relation can be extended to the type-2 polygon.

V1, T1

V2, T2

V3, T1

V4, T2

PWM timing calculations for both types of polygons

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Points O,K and J are from type-1 polygon, while point F is on type-2 polygon.


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r4

T2

T1

T0

Point Switched

forO T0

K T1

J T2

Point Switched

for

F T0 = T0/ (1-k1)

K T1=T1- T0 . k1/2J T2=T2- T0 . k1/2 T1+T2+T0= T1+T2+ T0=TS.

r5

1

12

(radius of inner dodecagon)k =

(radius of outer dodecagon).cos( )

Experimental verification

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Experimental verification

A 3.7kW induction motor was fed by the proposed inverter under experimentalcondition, operating under open loop constant V/f control at no load. Themotor was made to run under no load in order to show the effect of changingPWM patterns of the generated voltage on the motor current.

In order to limit the switching frequency of the inverter, number of samples isdecided as follow:

Upto 10 Hz operation: 8 samples per sector.10 Hz-30 Hz: 4 samples per sector.30Hz-12step operation: 2 samples per sector leading to final 12-step mode.The samples are always taken synchronized with the start of the sector.

A digital signal processor (DSP), TMS320LF2812 is used for experimental

verification. The DSP is used for calculating the PWM timing durations. Theactual gating signals to drive all the devices are generated using a SPARTANXC3S200 FPGA. The FPGA stores the look-up table for the switching statecombination of both the inverters for a particular space vector point.


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Experimental results 10 Hz operation

Phase voltage


Pole voltage-low

voltage inverter

Phase current


Phase current

Switching happens within the innermost dodecagonal space vectors.

Here, the number of samples per sector is taken as 8, as such the voltage andcurrent harmonics reside around (12x8=) 96 times the fundamental.

Individual devices of INV1 and INV2 are respectively switched at (10x16=)160 Hz and (10x48=) 480 Hz.

INV1 is switched only 1/3rdof a cycle, thereby the switching loss is less.


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Phase voltage


Pole voltage-low

voltage inverter

Phase current


Phase current

Switching happens within the first and second dodecagonal space vectors.

4 samples are taken in a sector, so the first band of carrier harmonicsreside around 48 times the fundamental.

Because of the multilevel structure, all the harmonics are highlysuppressed.

Operation at 24.5 Hz

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Operation at 24.5 Hz


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Experimental results 24.5 Hz operation

Phase voltage

Pole voltage- highvoltage inverter


Phase current


Phase current

Here the reference vector passes through the boundary of E dodecagon. Assuch, switching happens sometimes among points on the D and Edodecagons, while at other times among E and F dodecagons.

The high voltage inverter switches about 20% of the cycle, thus the switchinglosses are minimized.


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Phase voltage



Phase current


Phase current

Two samples per sector are taken here. The phase voltage waveform of phase A distinctly shows the presence of 20steps in a cycle, although 24 vectors are switched altogether.

The phase voltage harmonics reside at (24x45=) 1080 Hz, while individualdevices of INV1 and INV2 switch at (5x45=) 225 Hz and (15x 45=) 675 Hz.

20-steps in phase voltage at Operation at 46 Hz

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20 steps in phase voltage at Operation at 46 Hz

Vectors numbered 37, 48, 50 and 60 switched at the positive peak of thephase-A waveform have same projection on A-phase axis.


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Experimental results 49.9 Hz operation

Phase voltage



Phase current


Phase current

The phase voltage waveform of phase A shows the 20 steps in a cycle.

The switching vectors involved are located on the vertices of the A and Bdodecagons, because of very small zero periods in a cycle.

20-steps in phase voltage at 49.9 Hz

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p p g

Vectors numbered 49, 61 and 72 switched at the positive peak of the phase-Awaveform have same projection on A-phase axis.


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p p

Phase voltage



Phase current


Phase current

This is the 12-step operation of the inverter, when maximum fundamentalvoltage is available.

Under this condition, INV1 and INV2 are switched 3 and 12 times respectivelyin a cycle.

Input current drawn from the grid

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p g

Motor phase voltage

Grid side voltage

input current


input current

Because of the presence of the star-delta transformer at the input that formsthe dc bus ratio, the input current is more sinusoidal than what is observed in asingle transformer supplying an uncontrolled rectifier

Motor phasecurrent

Motor acceleration with open loop V/f Control

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p p /

Transition of motor phase voltage and currentfrom 20 Hz to 30Hz

In the first case, the reference vector starts from inside dodecagon E, crossesthrough the boundary of it and finally settles below the D dodecagon.

In the second case, the number of samples per sector is changed from 2 to 1 at12-step operation.

Correct calculation of the PWM timings and complete elimination of the 5thand 7thorder harmonics ensure that the motor current changes smoothly during thetransition.

Transition of motor phase voltage and currentfrom over-modulation to 12-step operation.

Phasevoltage

Phasecurrent

Comparison with a 5-level space vector diagram

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Phase

voltage

THD

Phase

voltage

WTHD

Phase

current

THD

Phase

Current

WTHD

unit % % % %20 Hz

5-level Inv 28.76 0.68 10.73 0.54

Proposed Inv 22.26 0.51 8.53 0.42

24.5 Hz

5-level Inv 19.78 0.54 9.85 0.52

Proposed Inv 16.24 0.42 7.14 0.43

46 Hz

5-level Inv 19.91 0.77 16.05 0.89

Proposed Inv 15.69 0.57 12.62 0.62

49.9 Hz

5-level Inv 15.3 1.31 18.8 3.07

Proposed Inv 7.26 0.28 4.68 0.24

50 Hz

5-level Inv 30.54 4.64 52.47 9.55

Proposed Inv 17.54 1.04 19.54 1.5

p p g

The harmonic distortion is lessin the proposed scheme.

This is more prominent in thehigher modulation indiceswhere the number of samplesper sector is less, thus theswitching frequency harmonicscontaining 5thand 7thorderharmonics in the 5-levelscheme come closer to thefundamental.

Because of the totalelimination of the these

harmonics from the phasevoltage in the present case, theripple content in the phasevoltage will be less.

Harmonic performance in terms of flux ripple

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p pp

The rms value of the flux ripple is calculated and plotted above under constant

V/f ratio and 24 samples in a fundamental period. It shows that for most of the operating conditions, the flux ripple is around 1%

of the fundamental flux impressed on the machine, and thus restricts thetorque ripple in the machine.

Synopsis

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y p

A new space vector diagram for induction motor drive is proposed, whichdivides the space vector plane into six concentric dodecagons.

Here the space vector diagram is characterized by alternately placed type-1and type-2 dodecagons which become closer to each other at higher radii. Assuch the harmonics in the phase voltage are reduced.

Apart from this, the known benefits of dodecagonal space vector diagramlike the complete elimination of all 6n1 harmonics, (n=odd) from phasevoltage and the extension of linear modulation range, are also retained here.

The high voltage inverter having a voltage of about 3 times the lower one, isswitched almost 1/3rdcompared to the low voltage inverter.

A comparison with 5-level inverter topology is also given which shows thatthe present scheme produces less harmonic distortion in the phase voltage.

Because of the use of star-delta transformers for having the dc bus in theratio 1:0.366, the input current has lesser harmonics compared to the casewhen a single transformer supplies the inverter.

Conclusion

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Different dodecagonal space vector diagrams are proposed in this work.

In one of the schemes, the space vector diagram consists of two concentric

dodecagons, with the radius of the outer one twice the inner one. This has thebenefit of reducing the device rating and dv/dt stress on the devices.

This is then further refined to distribute six dodecagons in the space vectordiagram. Switching on these closely spaced dodecagons will highly reduce theharmonic content in the phase voltage, apart from totally eliminating all the 5th

and 7th

order harmonics from the phase voltage.

In another work, a 4-level inverter with asymmetric dc links is used to generatehexagonal space vector diagrams at lower modulation indices and a dodecagonalspace vector structure at higher modulation index finally leading to 12-stepoperation of the inverter. This structure thus, incorporates the advantages of both

hexagonal and dodecagonal space vector diagrams.

With increased linear modulation range, less switching frequency and improvedharmonic spectrum, the proposed concepts may be considered as an interestingaddition to the field of multilevel inverters for high/medium voltage high powerapplications.

Papers out of this work

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Anandarup Das, K. Sivakumar, Rijil Ramchand, Chintan Patel and K. Gopakumar, "ACombination of Hexagonal and 12-sided Polygonal Voltage Space Vector PWM control forIM Drives Using Cascaded Two Level Inverters", IEEE Trans. On Industrial

Electronics, vol. 56, no. 5, May 2009, pp. 1657-1664. Anandarup Das, K. Sivakumar, Rijil Ramchand, Chintan Patel and K. Gopakumar, "A Pulse

Width Modulated Control of Induction Motor Drive Using Multilevel 12- sided PolygonalVoltage Space Vectors", IEEE Trans. on Industrial Electronics, vol. 56, no. 7, July2009, pp. 2441-2449.

Anandarup Das, K. Sivakumar, Rijil Ramchand, Chintan Patel and K. Gopakumar, "A High

Resolution Pulse Width Modulation Technique Using Concentric Multilevel DodecagonalVoltage Space Vector Structures", Proc. of ISIE 2009, Jul. 2009. (Best paper awardin the conference).

Anandarup Das, K. Sivakumar, Rijil Ramchand, Chintan Patel and K. Gopakumar,"Multilevel Dodecagonal Space Vector Generation for Open-end Winding Induction MotorDrive Using Conventional Three Level Inverters", Proc. of EPE 2009, Sep 2009, pp 1-8.

Anandarup Das, K. Sivakumar, Gopal Mondal and K. Gopakumar, "A Multilevel Inverterwith Hexagonal and 12-sided Polygonal Space Vector Structure for Induction MotorDrive", Proc. of IECON 2008, Nov 2008, pp 1077-1082.

Anandarup Das and K. Gopakumar "A Voltage Space Vector Diagram Formed By SixConcentric Dodecagons for Induction Motor Drives", communicated to IEEE Trans. onPower Electronics.

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