chapter 5 modeling of enhanced ibc with transient...

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150 CHAPTER 5 MODELING OF ENHANCED IBC WITH TRANSIENT RESPONSE 5.1 INTRODUCTION A transient response or natural response is the response of a system for a change in equilibrium. The transient response is not necessarily tied to "on/off" events but to any event that affects the equilibrium of the system. The impulse response and step response are transient responses to a specific input that indicates the changes. Transient response of the converter is mainly focused on the practical nature of the device switches that are prone to degrade with excessive heat, usage and operating voltage. During transient analysis, first an initial operating point is calculated (based on DC values) and later all momentary voltages and currents are computed as a result of a time dependent voltage / current source, influence of capacitors and inductors as well as all non-linearities that are studied to provide better understanding. Clipping effects and voltage reduction due to the circuit component voltage or operating limitation are also analyzed. From this analysis, details of maximum reverse recovery loss, harmonics and current sharing based on the input and output transfer characteristics can be evaluated to obtain the reliable application of the converter. The step change between input and output (transient time from change in input to change in output) is the major factor analyzed to prove that the device is much faster with low conduction losses. The parameters that are

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Page 1: CHAPTER 5 MODELING OF ENHANCED IBC WITH TRANSIENT …shodhganga.inflibnet.ac.in/bitstream/10603/16145/10/10_chapter 5.p… · magnetic field across the circuit. The mutual inductance

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CHAPTER 5

MODELING OF ENHANCED IBC WITH

TRANSIENT RESPONSE

5.1 INTRODUCTION

A transient response or natural response is the response of a system

for a change in equilibrium. The transient response is not necessarily tied to

"on/off" events but to any event that affects the equilibrium of the system.

The impulse response and step response are transient responses to a specific

input that indicates the changes. Transient response of the converter is mainly

focused on the practical nature of the device switches that are prone to

degrade with excessive heat, usage and operating voltage. During transient

analysis, first an initial operating point is calculated (based on DC values) and

later all momentary voltages and currents are computed as a result of a time

dependent voltage / current source, influence of capacitors and inductors as

well as all non-linearities that are studied to provide better understanding.

Clipping effects and voltage reduction due to the circuit component voltage or

operating limitation are also analyzed.

From this analysis, details of maximum reverse recovery loss,

harmonics and current sharing based on the input and output transfer

characteristics can be evaluated to obtain the reliable application of the

converter. The step change between input and output (transient time from

change in input to change in output) is the major factor analyzed to prove that

the device is much faster with low conduction losses. The parameters that are

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dependent on the switch have been taken into account for the overall analysis

that yields the suitable device configuration of the system for various

applications.

5.2 MODELLING CIRCUIT OF DESIGNED IBC

The proposed IBC functions as a two-port model with successive

cascade of switches. Figure 5.1 shows the basic function block for analysis.

Here all the switches , , ) are modeled as a single two-port network.

The modeled two-port network has sub-blocks of switches that are also

modeled in a similar fashion to obtain the exact response for entire small and

large signal analysis. The switch is modeled with four parameters. They are

transconductance, admittance, voltage gain and current gain which give the

details about the overall functioning efficiency of the circuit.

Figure 5.1 Model of proposed IBC considering all the switches as singletwo-port network

5.3 ANALYSIS OF INPUT STAGE IN PROPOSED IBC

The inductor in proposed IBC with ferrite core is taken for analysis.

The parasitic capacitance due to the parallel passage and addition of flat core

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accounts for an electrostatic storage, which in turn acts as a ripple filter. This

reduces the amount of reactance produced by leakage inductance.

Figure 5.2 Equivalent input stages with parasitic capacitance

Consider the boost inductors having inductances and

respectively. Inductors carrying current in parallel produce the significant

magnetic field across the circuit. The mutual inductance extracted by the

inductor is given in equation (5.1) which is related with the coupling

co-efficient and permeability of the core. The use of ferrite core for coupling

induces a capacitive effect in the boost inductor which impacts filtering of the

ripple.

(5.1)

The leakage inductance in the inductor forms a major source for

ripple and hence has to be analyzed to reduce the overall input ripple added to

the source input. The leakage inductance is expressed in terms of and

for both the boost inductors. The leakage inductance is given by the equations

(5.2) and (5.3).

(5.2)

(5.3)

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The above equations give a detailed explanation about the leakage

inductance that accounts for the change in the input current. The overall

residual reactance calculated with the parasitic capacitance in the boost stage

is given as which is a function of leakage inductance. The residual

inductance is expressed in the equation (5.4) which is a function of total

leakage inductance.

= = = (5.4)

This residual inductance is responsible for the total input current

ripple which also depends on self-inductance ).

The output voltage of the inductor of the boost inductor is a

function of inductance to the overall current in the inductor as expressed in

the equation (5.5). This equation gives the voltage which does not account for

any fluctuation whereas the current suffers series of fluctuations due to

leakage inductance.

= = (5.5)

The current ripple is a function of leakage inductance with the

harmonics due to the induction current. The equation of current harmonics is

expressed in terms of inductor voltage in a sine function of line frequency

altered with respect to the leakage inductance. The leakage inductance is

reduced by coupling the inductor where the maximum potential is conserved

with reduction in the current ripple fed to the switches. The equation (5.6)

gives the detailed explanation on the output current from the boost inductor.

= (1 + sin( )) (5.6)

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The above equation represents the total current fed by the boost

inductor to the switches with all the harmonics. The main consequence of the

equation is that when the residual inductance is zero the current ripple is

exactly reduced to zero. Thus the current ripple depends only on the leakage

inductance.

The analysis is further focused on the current induced by the

magnetic flow of current across the inductor, which is also equal to the above

constraints. The current induced by the magnetic path across the inductor is

given by,

= [ ] (5.7)

The induced current in the inductor due to the Magnetic Path

Length (MPL) and the number of turns (N) is given by the above equation

(5.7). Furthermore, the analysis is focused to obtain the overall reactive

components responsible for the change in the current.

The current due to the nominal factors that is responsible for the

change in the current is given by the equation (5.8).

= ( ) (5.8)

The above equation gives the exact match for the current with

ripple. The ripple can be minimized by reducing the reactance using a

capacitive filter that is achieved by the ferrite core coupling. The current in

the inductor mainly depends on the average charge flowing in the circuit

( ), area of coil ( ), magnetic flux ( ), and the total number of windings in

the inductor.

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5.4 MODELLING OF SWITCH ON TWO-PORT NETWORK

A two-port network is an electrical network device with two pairs

of terminals to connect with the external circuits. Two terminals constitute a

port if the currents applied to them satisfy the essential requirement known as

the port condition which states that the electric current entering on one

terminal must equal the current emerging from the other terminal on the same

port. The switches have two states of operation which cannot be modeled with

single model. Since, the switch exhibits dual properties, it cannot be modeled

with single two-port function. Thus the switch is modeled with two different

approaches to specify the exact operation.

5.4.1 Modeling of Switch when the Switch is Active

When the switch is active, the circuit functions at both high

frequency and low frequency, thus it cannot be modeled with same modeling

available for the transistor. To mitigate this problem, the switch is modeled

with hybrid parameter that has the ability to yield the necessary results

experimented in the simulation.

Hybrid model of switch is shown in the Figure 5.3 and the hybrid

parameters that are derived from the basic equation are given in the equation

(5.9) and (5.10)

Figure 5.3 Hybrid model of the switch

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The hybrid parameters of evaluation are given as

when = 0, when = 0, when = 0, and

when = 0. The calculation is simplified in terms of voltage

gain, current gain, admittance and impedance.

= = (5.9)

The equation (5.9) shows the relation of that is given by the

voltage gain across the switch which is simplified by substituting entire

parameters and final simplified form of voltage gain is given by the equation

(5.10) which is a function that influences the duty cycle.

2 (5.10)

The power in the switch is calculated with the ideal

input voltage to the current obtained from the specification. The total power

delivered to the load by the switch is given by the equation (5.11).

× (5.11)

The equation (5.11) shows the relative power production ability of

the converter which is calculated in terms of Equivalent Series Resistance

(ESR) of the converter. The current gain is expressed interms of threshold

voltage ( ) that is required to operate the switch in active mode is given in

the equation (5.12).

= (5.12)

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Equation (5.13) shows the admittance of the circuit. The admittance

is related with boosting voltage efficient , conductivity ) of the

switch and final output of the switch ( ).

= 2 ln 1 + (5.13)

The total impedance across the switch is calculated in the equation

(5.14) where the impedance depends on ratio of the total reactance attached

with the switch to the total resistance offered by the switch.

=( )

(5.14)

The above equation (5.14) is related with timing analysis and plays

a major role for the switching time calculation. The switching, used for ZVS

calculation, occurs when the switching time is calculated where the

impedance level tends to minimum value and threshold potential can be

reversed.

5.4.2 Modeling of Switch when the Switch is Inactive

When the switch is in OFF state it acts as a resistive element across

the circuit, and hence it is modeled with resistive elements as it offers the

barrier resistance to current flow across the switch. The resistance in the

circuit is modeled with the four parameters that are given by resistive nature

of the circuit modeled with specific function. Here the resistance and

admittance is calculated.

The equation gives the value of current that is fed into the switch

when it is in OFF state. In resistance modelling the switch acts as a resistor

when it offers maximum impedance at the time of current flow. In resistance

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estimation the voltage across the switch is high and the equivalent current

across the switch is equal to zero thus affecting the maximum resistance at the

switching phase.

The resistance in the switching phase exponentially increases with

factors that alter the gate voltage, as the voltage level increases and the

current reduces across the switch.

Figure 5.4 Resistive model of switch implying off condition

The value of resistance is expressed in the equation (5.15) which

relates gate driving voltage and the reactance produced by driving current.

= (5.15)

The output voltage ( ) is calculated from the product of

boosting coefficient and input voltage. This prediction gives the amount of

load added to the switch when the switch is in off state. Resistance estimation

for the entire switch is constant as the circuit is symmetrical.

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5.5 MODELLING OF OUTPUT STAGE

The character of any device depends on output load of the device

and thus essential to analyze the output stage. The load may be of three types:

resistive, capacitive and inductive. To know the exact operational capability

of the proposed IBC a model of RLC load is analyzed with serial and parallel

connections.

5.5.1 Modelling of Proposed IBC with RLC Load in Series

In Figure 5.5 the proposed boost converter circuit is modelled with

RLC load in series considering only one switch as active and all other

switches as resistances across the path.

Figure 5.5 Proposed IBC with RLC load in series

The reactance in RLC load produces a damped oscillation which is

due to the stored energy in the LC that tends to decrease after the transfer to

the switches. This feedback produces sufficient damage to the converter if

prolonged for a long time. Whereas the designed converter has the ability to

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reduce the feedback generated at the output stage. This feedback is high only

at the time of switching. In the proposed converter, the switching time is very

low, hence the feedback potential is also low. If the switching frequency

increases there is a series resonance over the switch which affects the nature

of switching.

The resistance in the load is given by the equation (5.16).

on substitution of the inductor and capacitor

reactance, the total applied reactance is calculated.

+ (5.16)

The voltage level of the feedback is given by the equation (5.17).

+ (5.17)

The current is the function of frequency and sine of the reactance is

the load. The frequency of the resonance occurring in the output load is given

by 1/2 .

5.5.1.1 Condition of switch when feedback voltage is greater than

boosted voltage

Let the feedback voltage from the RLC resonant load be and

the output from the boost converter - . In case the feedback voltage is

greater than output voltage, the operation of boost converter will be affected.

This condition cannot be provided when the converter is supplied with input

voltage.

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By assuming the input voltage of the converter to be zero, the

analysis is carried out. The voltage at the switch is zero as there is no input

from the boost inductor. The residual voltage of the converter is as expressed

in the equation (5.18).

= (5.18)

The residual voltage subsides when the input voltage is equal to

half of the feedbacks generated in the output load. If < , then the

switch acts as a high resistance material due to the increase in junction

depletion region. In contradiction, to make the switch active, the voltage input

from the boost inductor must be higher than feedback voltage.

From the above analysis, it is inferred that the converter is stable

when the input is greater than the charge stored in the load and the converter

functions as normal boost converter.

5.5.2 Modelling of Proposed IBC with RLC Load in Parallel

The resonance condition differs only for the combination of parallel

RLC load, where the total impedance on the load only differs. The impedance

of the parallel load is presented in the equation (5.19)

= + +

=

= (5.19)

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Figure 5.6 Proposed IBC with parallel RLC load

The voltage level of the feedback is given by the equation (5.20).

(5.20)

The current is a function of frequency and sine of the reactance in

the load. The frequency generated in the load is expressed as = .

The residual voltage influences the switch as given in equation (5.18).

5.6 ANALYSIS OF SWITCHING TIME

The current flowing through the device is reduced to zero before

the voltage increases. The switch turns OFF when the current applied to the

switch gate is zero. The frequency of ZCS is expressed as given in the

equation (5.21).

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= (5.21)

The average frequency of ZCS is calculated in terms of resonant

tank and the switching frequency ranges from 3.6 to 4.4 , which

yields the average time to achieve the ZCS as 229 to 265 .

The voltage across the device is reduced to zero before the current

increases. The switch turns ON when the voltage across the switch is zero.

This enables maximum current flow across the switch to the load. The

frequency of ZVS is given by the equation (5.22).

= (5.22)

The average frequency of ZVS is calculated in terms of resonant

tank and the switching frequency is given by 4.2 to 5.1 and gives

the average time for achieving the ZCS as 238 to 197 .

5.7 SIMULATION RESULTS

5.7.1 Junction Temperature between Switching Frequency

Junction temperature of any semiconductor depends on the

operating frequency. The increase in operating frequency increases the flow

of electrons. Excess heat generated due to fast movement of electrons,

increases the bond breaking. Bond breaking in junction makes the switch

unstable. This state of switch might affect the switching frequency due to the

reduced threshold voltage level of the switch. This makes the switch to alter

the operation of voltage level. Figure 5.7 illustrates the temperature variation

caused due to RLC load.

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Figure 5.7 Simulation result for temperature variations

5.7.1.1 Analysis of the result

When Xc>>XL, RL tends to zero. The load applied is highly

capacitive. Hence if the voltage level is less than the charge potential, the

junction temperature increases at switching than normal.

When XL>>XC, RC tends to zero. Here the magnetic field in the

inductance cause induced EMF across the conductor. This reactance produces

sufficient charge in the temperature as that of capacitive reactance.

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When Xc = XL , RL tends to R. Here the load is resistive, thus there

is no back voltage or current flow across the switch. In this condition, the total

heat produced is less than the reactive components. From the results obtained

it is clear that the junction temperature increases with increase in reactance

and requires a heat sink to enable the converter for prolonged usage in high

reactive loads.

5.7.2 Losses in Switches and Diodes

The main losses focused in a converter are losses due to

semiconductor. The losses vary with junction temperature in semiconductor

as shown in Figure 5.8. The losses accounted by semiconductors are analyzed

in three modules based on the feedback from load.

Module 1 represents the converter when operated in high capacitive

load (XC>>XL). The capacitive load supplies back voltage when the voltage

level fed to the load is lower than its potential voltage thus supplying

sufficient reverse bias voltage at switch 1, when switch 1 is active. This

occurs mainly at switching point causing maximum loss in addition to

switching loss. The diodes are maintained to have loss only due to its resistive

nature.

Module 2 represents the converter when operated in high capacitive

load (XL>>XC). The inductive load stores the voltage in the form of magnetic

field inducing EMF in adjacent line. Thus the induced EMF due to the

inductor reactance provides sufficient voltage at reverse bias to the switch 2.

This causes the switch to increase the junction barrier. If the junction barrier

gets increased, it takes additional time for switching. The loss will be high for

the switch which is inactive when the load is highly inductive.

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Module 3 represents the operation of the converter in resistive load

(i.e. when both the reactance of capacitor and inductor are equal). The load

applied to converter dissipates power in terms of heat and has no influence on

any other parameter. Here the losses due to switch are low, whereas the losses

due to diodes are high.

Figure 5.8 Simulation showing the loss in the switches in various loads

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5.7.3 Measurement of Losses in a Switch

Figure 5.9 The losses that occur in a switch

Figure 5.9 shows the losses that occur in a switch. A switch has

three losses which contribute for overall loss in the converter. The losses

accounted by the switch are switching loss, conduction loss and reverse

recovery loss. A switch has lower reverse recovery loss than other losses. The

conduction and switching losses account for 98% of overall loss contributed

by the switch in a converter.

The conduction loss is high when the device is ON whereas the loss

in device during OFF state is due to the conductor in reverse bias condition

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caused by minority carriers in the switch. Thus the loss is low when the

device is in OFF state.

Switching loss is directly proportional to the product of total

switching frequency. As the frequency increases, the loss also increases. This

is due to the reverse polarity in the switch. The sum of two losses gives the

overall loss contributed by the switch.

5.7.4 Voltage Gain

Voltage gain of the boost converter is also called as boosting

co-efficient which depends on duty cycle. The relation between the voltage

gain and duty cycle is given. From the simulation results shown in Figure

5.10, it is clear that duty cycle increases with an increase in voltage gain.

Figure 5.10 Relation between duty cycle and boosting co-efficient

5.7.5 Ideal Powers Developed in both the Switches at Switching Stage

Figure 5.11 represents the voltage output from the switches

providing exact potential change while switching. The graph illustrates the

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ideal nature of switching. The power loss while switching is also very low.

The time gap between the active stages of the switch is quite low, hence the

output voltage remains same at all times.

Figure 5.11 Switching stages and the ideal voltages after switching

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5.7.6 THD Calculation

Figure 5.12 Simulation showing the amount of THD

Total Harmonic Distortion of a signal is a measure of harmonics

present in the signal and is defined as the sum of powers of all harmonic

components to the power of the fundamental frequency. THD is used to

characterize the linearity of the system and power quality.

Figure 5.12 shows two different frequencies and their harmonics

(Output Current). When the cycle is operated at 900kHz, the magnitude

variation is high accounting for the THD of 7.6% from 3rd to 13th harmonic

with increasing operating frequency and the harmonic will be reduced. When

the same is operated at 1850Hz the calculated THD is only 6.3%. But this

change is not stable as the increase in frequency might lead to increase in

THD which depends on the working frequency of the switch.

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Table 5.1 Comparison of different analysis of research work

ParameterProposed

IBC atD<50%

ProposedIBC atD>50%

ProposedIBC Transient

Analysis

ZVS Switching Time 203.5 197 192 238

ZCS Switching Time 225 225 219 265

Current Sharing 3.25 3.5 3 4

Voltage Gain 2.2 3.4 2.15 8.5

Proposed IBC for PV Panel ApplicationEfficiency 97.8%

VoltageRating

150 –275V

Table 5.1 depicts the different analysis of proposed soft switching

technique for IBC. Soft switching analysis (D < 50% and D > 50 %) results

are almost matches with transient analysis results through a modelling. The

performance analysis of proposed IBC for PV panel results are also showing

the effectiveness of the research findings.

5.7 SUMMARY

From this analysis, the circuit model is reduced to lucid functions

and IBC is analyzed with RLC load for a time period of 1ms to 1ns. Further,

the analysis yields the details of maximum reverse recovery loss, harmonics

and current sharing based on the input and output transfer characteristics. The

step change between input and output is the major factor analyzed to prove

that the device is much faster and has lower conduction losses. The final

output of the modeling demonstrates that the voltage current ratio and gain of

the converter is almost equal to the simulated ratios.