Consider a bus and its associated circuits consisting of lines or transformers. The algebraic sum of all the circuit currents must be zero when there is no bus fault. With all circuit CT ratios being equal, the secondary currents also add to zero when there is no bus fault.

Bus protection with a differential relay. When there is no fault, the algebraic sum of circuit currents is zero

One area of concern is the saturation of a CT during an external fault. Consider the fault at Feeder. The current in the CT on this feeder is the sum of all feeder currents, and consequently this CT is in danger of becoming saturated.

Primary current, secondary current, and the flux in the core of a CT in saturation. Remanence may cause saturation to set in earlier and last longer

A saturated CT produces no secondary current while the CT core is in saturation. The secondary current becomes negligible. Under these conditions, the secondary winding is no longer strongly coupled with the primary winding – the transformer essentially acts like an air-core device.

A lack of strong coupling implies that the secondary winding presents a verylow impedance to any external circuit connected at its terminals, instead of actinglike a current source of high equivalent impedance. It should be clear that, if thesecondary current in one CT becomes zero for any period during an external fault,the differential current will be equal to the missing current causing the relay to trip.

In general the core of a properly chosen CT should not saturate within 1/2 to 1 cycleof fault inception.

However, often the requirement placed on bus differential relays is that they should restrain from operating for external faults even if a CT shouldsaturate in 1/4 cycle or less after the occurrence of a fault. This requirement places a very confining restriction on a computer based bus differential relay.

However, analog relays have a very ingenious solution to the problem posed by a saturating CT. Since the saturated CT secondary appears as a low impedance path in the differential circuit, it is sufficient to make the relay a high-impedance device.

The spurious differential current produced by the saturated CT then flows through its own secondary winding and by passes the relay having a much higher impedance. The condition is illustrated in Figure. The saturation of the CT is itself responsible for saving a false operation which would have resulted from thesaturation.

Effect of saturating CT on a high impedance differential relay. The lower impedance of the saturated CT secondary bypasses the differential current from the relay

(a) Complete equivalent circuit of a current transformer. (b) A useful approximation for practical CTs. (c) Phasor diagram

CT secondary current error caused by saturation of the CT cores are quite substantial – when they occur the secondary current disappears for a portion of the waveform. However, even whenthe CT core is not saturated to such an extent, the secondary current is always in error due to the small but non-zero magnetizing current required to set up the flux in the core.

The leakage reactance of primary and secondary windings is generally negligible in most practical current transformers; hence the equivalent circuitof Figure (b) is more appropriate for its analysis.

The load (burden) impedance Zb includes resistance of all the secondary wiring as well as the impedance of allinstruments and relays connected to the CT. The primary current I1, the secondary current Ib, the magnetizing current Im, the core flux φ, and the voltage across the secondary winding V2 are shown in the phasor diagram of Figure (c).

Note that, although the phasor diagram is generally used in this analysis, there may be some harmonics present in the magnetizing current due to the nonlinearity of the core B-H characteristic. In any case, I2 differs from Ib by Im, which is therefore theCT error for the primary current and burden impedance shown

The CT classifications (such as 10C400 or 10T400) indicate the upper limit of the CT error as being 10%when the primary current is 20 times normal and the secondary voltage is less than or equal to 400 volts. The letters C or T in the class designation indicate the type of CT construction – C type being a better CT than the T type.

The CT error is generally kept low by a proper choice of CT and its connected burden. The only point of departure for computer relaying is that conceivably the CT error could be computed and corrected inside the computer relay if the CT characteristic and burden impedance were given as inputs to the computer relay. This clearly cannot be done in conventional relays.

Transient Performance of CT

Transient Performance of CT

Volt

Time

Transient Performance of CT

• Offset fault current

Transient Performance of CT

Transient Performance of CT

Transient Performance of CT

(a) Capacitive voltage transformer. (b) Equivalent circuit

CVT transient response. (a) Complete primary voltage collapse at voltage maximum.(b) Voltage collapse at zero voltage. Note that the secondary transient is much more pronounced in case (b)

Some voltage transformers, especially those for lower voltage transmission, are magnetically coupled potential transformers with a primary winding and a secondary winding. Such transformers are very accurate, and in general their transformationerrors can be neglected.

A fairly common voltage transformer uses a capacitor voltage divider network, as shown in Figure (a). The voltage divider reduces the line potential to a few kV,and is further reduced to the standard relaying voltage by a magnetic core transformer. The capacitive voltage divider presents a capacitive Th’ev’enin impedance as shown in Figure (b).

In order to eliminate any phase angle errors due to the load current flowing through the capacitive Th’ev’enin impedance, a tuning inductance L is connected in series with the primary winding. By making 1/2πf(c1 + c2) = 2πfL, the phase shift across (c1 + c2) is exactly cancelled by the phase shift across L at all load currents, and once again the secondary voltage is in phase with the primary voltage. In general, the steady state error of the Capacitive Voltage Transformer (CVT) is negligible.

However the transient response of a CVT is of some concern in relay design. The equivalent circuit of Figure (b) can be used to determine the output waveformacross the burden when a fault occurs on the primary circuit. As the primary voltage changes suddenly from its pre-fault value to its (smaller) post-fault value, the output voltage undergoes a subsidence transient before settling to its final steady state value. The subsidence transient magnitude depends upon CVT parameters, burden impedance and power factor, and upon the angle of incidence of the primary fault.

In general, the faults occurring at or near zero voltage produce the worst subsidence transient. Figures (a) and (b) show samples of CVT response for representative installations.

Although omitted from most simulation studies, usually a ferroresonance suppression circuit is also present on the CVT secondary side, and does affect the transient response.

The CVT transient response causes difficulties in those relaying tasks which require voltage inputs. In particular, faults causing near-complete voltage collapse create false voltage pictures at the relay input terminals.

Special attention should be given to relay algorithm design in such cases, particularly if severe voltage collapse may be caused by a fault near a zone boundary. Short transmission lines fed from weak systems usually constitute difficult relay design problems due to transientCVT errors.

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