course informaon - university of california, berkeleyee290c/sp18/lec/lecture0...- cadence ideal...

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Course Informa-on Instructor: Dr. Osama Khan Units: 4 Meets: TuTh 3:30-5 pm Cory 293 Pre-reqs: At least one of EE140, 142, 151 ; ( or equivalent) Office: Swarm Lab, Cory Hall, email: [email protected] Office: 512 Cory Hall, email: [email protected] Office Hours: TBD GSI: Edward Wang ([email protected] ) GSI Office: TBD GSI Office Hours: TBD Discussion sec-on: TBD

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Page 1: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

CourseInforma-onInstructor:Dr.OsamaKhanUnits:4Meets:TuTh3:30-5pmCory293Pre-reqs:AtleastoneofEE140,142,151;(orequivalent)Office:SwarmLab,CoryHall,email:[email protected]:512CoryHall,email:[email protected]:TBDGSI:EdwardWang([email protected])GSIOffice:TBDGSIOfficeHours:TBDDiscussionsec-on:TBD

Page 2: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

Introduc-onsq Nameq Whatprojectsyouhavedonebefore?q Funfactaboutyourselfq Whatyouareexpec-ngfromthisclass?q Majorq Year

Page 3: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

EE194BLESoC(spring2017)•  EE194:“28nmSoCforIoT”•  BLE-specificdigitalperipherals:GFSK,statemachineforMAC•  RISC-VinsteadofARM•  1.1mmx1.1mm

Page 4: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

EM9304

Page 5: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

WirelessMote

Radio Microprocessor Memory

PowerManagement

Sensor &Sensor Interface

Analytics Frequency &Timing Reference

Crypto. Engine Location Engine

Page 6: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

HardwareArchitecture

Page 7: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

RadioArchitectureLow-IFarchitectureSingleantennainterface.

Page 8: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

DigitalBaseband

Page 9: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

PowerManagement

Page 10: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

Goals•  Translatewirelesscommunica-onsystemspecifica-onsinto

architectureandcircuitspecifica-ons.(Topdownapproach)

•  Matlabsystemsimula-ontoevaluatecommunica-onsystemperformance.

•  Projectdriven:1mmx1mmSoCtapeoutin28nmFDSOIprocess.

•  Teameffort:Emphasisoncommunica-onandcollabora-on.

•  UnderstandtransistorlevelcircuitdesignallthewayuptotheC-soiwareexecu-on.

Page 11: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

ToDoq EECSAccountq BWRCServerAccessq ST28nmFDSOIPDKAccessq Slackchannelq PiazzaAccessq BLE5Specifica-onsq EM9304Datasheet

Page 12: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

Tenta-veTimelineq Jan31st

-  CadenceIdealblocksimula-ons-  Matlabsimula-onsq DigitalFPGAimplementa-on

q Feb.28-  Schema-cDesign-  Chisel/VerilogImplementa-on

q March22-  AnalogLayout-  DigitalAPR

q April12-  Systemco-simula-ons

q April30-  FinalIntegra-on(PADS,ESD)-  Chiplevelchecks(DRC&LVS)

Page 13: Course Informaon - University of California, Berkeleyee290c/sp18/lec/Lecture0...- Cadence Ideal block simulaons - Matlab simulaons q Digital FPGA implementaon q Feb. 28 - Schemac Design

TeamForma-onq Digitalteamgoal-  FPGAimplementa-onofthecore-  ExecuteC-soiwarecode- WriteVerilog/Chisel

q Analogteamgoal-  Spicesimula-onwithidealblocks-  VerifyagainsttheMatlabsimula-ongoldenblock.-  Analog/RFcircuitdesign

q AnalogTopvs.DigitalTopflow?