dual slope for dvm ppt
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V. R. GAIKWAD
Dual Slope Analog to Digital Converter
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Block Diagram
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Circuit Diagram
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Time Domain Analysis
tV
TV
RCTV
RCtVtv
RCTV
RCtV
tv
VvTvvRCTVTv
TtVvv
vdvRC
tv
inref
inref
o
inrefo
refio
ino
ini
t
io
0)(
)(
;);()0(
)(
;;0)0(
)0(1)(0
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Reflection Spot
What is the resolution of 3 ½ digit DVM which can measure input voltage from 0 V to 2 V
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Example
Specifications Maximum input voltage
Vin =2 V 3 ½ digit display Measurement Cycles per
second (Sampling frequency) fs=25 Hz
Design Measurement interval
Ts =1/ fs=40 ms Integration duration of
Vin T = Ts / 2=20 ms Integration duration of
Vref ; tmax = T / 2=10 ms Vref= -VinmaxT/ tmax=-4 V For N clock cycles in
time interval tmax; clock required is fclk=N/ tmax=200 kHz
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Reference
Design with Operational Amplifier and Analog Integrated Circuit By Sergio Franco
Modern Digital Electronics By R. P. Jain
Introduction to System design using Integrated Circuit By B. S. Sonde
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