ece 667 spring 2013 synthesis and verification of digital systems

1ECE 667 - Synthesis & Verification - Word-level Diagrams

ECE 667ECE 667Synthesis and Verification

of Digital Systems

Word-level (decision) DiagramsWord-level (decision) DiagramsBMDs, TEDsBMDs, TEDs

ECE 667 - Synthesis & Verification - Word-level Diagrams

2

OutlineOutline

• Review of design representations– common representations of Boolean and arithmetic functions

• Motivation for word-level diagrams– RTL synthesis, verification and verification– Need more abstract representation

• Higher level “decision” diagrams– Binary Moment Diagram (BMD) – word level– Taylor Expansion Diagram (TED) – symbolic level


3

Motivation (Verification)Motivation (Verification)

• Equivalence checkingEquivalence checking– Logic, RTL, behavioral, algorithmicLogic, RTL, behavioral, algorithmic– Difficulty: different levels of abstractionDifficulty: different levels of abstraction

• Current approachesCurrent approaches– Structural (cut points)Structural (cut points)– Functional (canonical BDDs)Functional (canonical BDDs)– Not efficient for designs with arithmetic Not efficient for designs with arithmetic

componentscomponents

• QQ: how to perform verification of : how to perform verification of dataflow designs w/out bit-blastingdataflow designs w/out bit-blasting

• AA: a canonical representation on a : a canonical representation on a higher level of abstraction higher level of abstraction (BMD,TED)(BMD,TED)

BA

s1

10

F1

Dak

bk>

+*-

AB

s2

01

F2

bk

ak

**

-D


4

Motivation (Synthesis)Motivation (Synthesis)

• Typical design flow: Typical design flow: single DFG extractedsingle DFG extracted– ““what you write is what you get”what you write is what you get”

Better design space exploration• Canonical representation• Not required for synthesis, but

useful in design space exploration

C, C++, HDL

DFG extraction

High Level Synthesis

RTL HDL

Functional specification

DFG extraction


5

Design RepresentationsDesign Representations

• Boolean functions ( f : B B )– Truth table, Karnaugh map– SoP, PoS, ESoP– Reed-Muller expansions (XOR-based)– Decision diagrams (BDD, ZDD, etc.)

• Arithmetic functions ( f : B Int )– Binary Moment Diagrams (*BMD, K*BMD, *PHDD)– Multi-terminal, Algebraic Decision Diagrams (ADD)

• Arithmetic functions (f : Int Int )– Taylor Expansion Diagrams (TED)


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Canonical RepresentationsCanonical Representations

• Each minimal, canonical representation is characterized by– Decomposition type

• Shannon, Davio, moment decomposition, Taylor exp., etc.– Reduction rules

• Redundant nodes, isomorphic sub-graphs, etc.– Composition method (“APPLY”, or compose rule)

• What they represent– Boolean functions (f : B B)

– Arithmetic functions (f : B Int )

– Algebraic expressions (f : Int Int )


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Decomposition TypesDecomposition Types

• Shannon expansion (used in BDDs)

f = x fx + x’ fx’

• Moment decomposition (BMD):

replace x’=1-x,

f = x fx + (1-x) fx’ = fx’ + x fx

where fx = fx - fx’

– also called positive Davio decomposition


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Binary Moment Diagrams (*Binary Moment Diagrams (*BMDBMD))

• Devised for word-level operations, arithmetic• Based on modified Shannon expansion (positive Davio)

f = x fx + x’ fx’ = x fx + (1-x) fx’ = fx’ + x (fx - fx’ ) = fx’ + x fx

where fx’ = fx=0, is zero moment

f x = (fx - fx’ ) is first moment, first derivative

• Additive and multiplicative weights on edges (*BMD)


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*BMD - Construction*BMD - Construction• Unsigned integer: X = 8x3 + 4x2 + 2x1 + x0

• X(x3=1) = 8 + 4x2 + 2x1 + x0

x3

• X(x3=0) = 4x2 + 2x1 + x0

• Xx3 = 8

8

x2

x1

x0

4210

10

x0

x1

x2

12

4

x3

8

BMD

*BMD

Multiplicative edges


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*BMD - Word Level Representation*BMD - Word Level Representation• Efficiently modeling symbolic word-level operators

Word level

4

10

x0

x1

x2

12

4

y0

y1

y2

21

10

x0

x1

x2

y0

y1

y2

12

4

24

1

Word level

X+Y X Y


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Limitations of *Limitations of *BMDBMD• *BMD requires bit-level expansion

– works on Boolean fundamentals– modeled with constant and first moment only

• BMD representation of F = X2 , X={x2, x1, x0}

10

x0

x1

x2

x1

x0 x0

2

4

8


12

Are BDDs and *BMDs sufficiently High Level?

• Both are canonical for fixed variable order

• BDDs– Good for equivalence checking and SAT– Inefficient for large arithmetic circuits (multipliers)

• BMDs– Efficient for word-level operators– Less compact for Boolean logic than BDDs– Good for equivalence checking, but not for SAT – Insufficient for high-order arithmetic expressions


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Symbolic Level RepresentationSymbolic Level Representation• Can we devise a more general representation than

“word-level” *BMD ?

X + Y

10

X

Y

Symbolic level

X Y

10

X

Y

Symbolic level


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Taylor Expansion Diagram (TED)Taylor Expansion Diagram (TED)

• FunctionFunction F F treated as a treated as a continuous functioncontinuous function• Taylor Expansion Taylor Expansion (around (around x=0x=0))::

F(x) = F(0) + x F’(0) + F(x) = F(0) + x F’(0) + ½ x½ x22 F’’(0) + … F’’(0) + …• Notation:Notation:

– FF00(x) = F(x=0)(x) = F(x=0) 0-child 0-child - - - - - -- - - - - -

– FF11(x) = (x) = F’(x=0) F’(x=0) 1-child1-child ---------- ----------– FF22(x) = ½ (x) = ½ F’’(x=0) F’’(x=0) 2-child2-child ====== ======– etc.etc.

F(x) = FF(x) = F00(x)(x) + x F+ x F11(x) + x(x) + x22 F F22(x) (x) + …+ …

x

F0(x) F1(x) F2(x) …

F(x)


15

Construction - Your First TEDConstruction - Your First TED

F = A2B + 2C + 3A F0(A) = F|A=0 = 2C + 3

F1(A) = F’|A=0 = 2AB|A=0 = 0

F2(A) = ½ F’’|A=0 = B

B

10

A

G= 2C + 3H0(B) = B|B=0 = 0

H1(B) = B’ = 1

C G0(C) = (2C+3)|C=0 = 3

G1(C) = (2C+3)’ = 2

B

C

23

H

(normalization will move weights from terminals to edges)


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TED – a few ExamplesTED – a few Examples

1

x0

x1

x2

x3

2

4

1

0

1x0

x1

x2

1

1

1

44

816

16

64

11

(A+B)C +1

10

B

C

A

1

(A+B)(A+2C)

10

B

C

A

B

1

2

X 2= (8x 3+ 4x 2+ 2x 1 + x 0 )2


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TED Reduction Rules - 1TED Reduction Rules - 1

a) Nodes with all empty edges

1. Eliminate redundant nodes:

b) with only a constant term

0

f = 0 a2 + 0 a + g(b) = g(b), independent of af = 0 a2 + 0 a + 0 = 0

a

0

fa

b 0

f

gb

g


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TED Reduction Rules - 2TED Reduction Rules - 22. Merge isomorphic subgraphs (identical nodes)

(A2 + 5A + 6)(B + C)A

B

C

10 0 11

BB

CC

6 5 1A

B

C

01

6 5 1


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TED NormalizationTED Normalization

• TED is normalized if– there are no more than two terminal nodes: 0 and 1– weights of edges of a given node must be relatively prime (to

allow sharing isomorphic graphs)

26

B

A

2

2A + 2B + 6

normalized3

0

B

A

1

2

2

1 3

B

A

1

2

11

2(A + B + 3)


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Normalization - ExampleNormalization - Example

(A2 + 5A + 6)(B + C)

A

B

C

50 0 16

BB

CC

A

B

C

01

6 5 1

A

B

C

10 0 11

BB

CC

6 5 1


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TED: Composition TED: Composition ((APPLYAPPLY operation) operation)

• Operation depends on relative order of variables x, y – if x = y, then z = x, and

h(x) = f(x) OP g(x) = f0(x) OP g0(y) + x [f1(x) OP g1(y)] + x2 [f2(x) OP g2], …

– if x > y, then z = x, and h(x) = f0(x) OP g(y) + x [f1(x) OP g(y)] + x2 [f2(x) OP g], …

– else ….

u

f

x v

g

yOP =

• Recursive composition of nodes, starting at the top

h = f OP gqz

OP = (+, - , •)


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APPLYAPPLY Operation - Example Operation - Example

*

A+B

0 1

4

3

A

B = 3•5

4•6A

0•5

C

A+2C

0 1

6

5

A

21•5

B

0•0 0•2 1•0 1•2

C C1•5

1•0 1•2

+

1•1

B3•1

0•1 1•1

C

0

7

2

B

0

8

1

+=0+7

8+7B

0+0 0+2 1

C

(A+B)(A+2C)

20 1

C

A

B B

2


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Properties of TEDProperties of TED

• Canonical (if ordered, reduced, normalized)• Linear for polynomials of arbitrary degree• Can contain word-level, and Boolean variables• TEDs can be manipulated (add, mult) using simple

APPLY operator, similar to BDD or BMD:

• f = g + h; APPLY(+, g, h)• f = g * h; APPLY(*, g, h)• f = g – h; APPLY(+, g, APPLY(*, -1, h))


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Properties of TEDProperties of TED

• Canonical• Compact• Linear for polynomials of

arbitrary degree– TED for Xk, k = const, with n

bits, has k(n-1)+1 nodes.• Can contain symbolic, word-level,

and Boolean variables• It is not a Decision Diagram

1

x0

x1

x2

x3

2

4

1

0

1x0

x1

x2

1

1

1

44

816

16

64

11

X2=(8x3+4x2+2x1+x0)2

n = 4, k = 2


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TED for Boolean logicTED for Boolean logic

AND

10

x

y

x y = x y

10

x1 -1

x’ = (1-x)

NOTOR

x y = (x + y – x y)

10

x

yy-1

1

XOR

x

10

yy-2

1

x y = (x + y – 2 x y)

• Needed to model arithmetic-Boolean interface • Same as *BMD for Boolean logic


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TED for Arithmetic CircuitsTED for Arithmetic Circuits

• Arithmetic circuits contain related word-level (A, B) and Boolean (ak, bk) variables

A = [ an-1, …, ak , …,a0 ] = 2(k+1)Ahi + 2k ak + Alo

BA

s1

10

F1

Dak

bk

>

+*-

s1 = ak (1-bk)

Ahi Alo

0 1

2k

2(k+1)

Ahi

ak

Alo


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Applications to RTL VerificationApplications to RTL Verification

• Equivalence checking with TEDs– interacting word-level and Boolean variables

A

B

s2

01

F2

bk

ak

*

*-

D

BA

s1

10

F1

Dak

bk

>

+*-

F1 = s1(A+B)(A-B) + (1-s1)Ds1 = (ak > bk) = ak (1-bk)

F2 = (1-s2) (A2-B2) + s2 Ds2 = ak’ bk = 1 - ak + ak bk

A = [an-1, …,ak,…,a0] = [Ahi,ak,Alo], B = [bn-1, …,bk,…,b0] = [Bhi,bk,Blo]


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RTL Verification – RTL Verification – cont’d.cont’d.

• Related word-level and Boolean variables F1 = s1(A+B)(A-B) + (1-s1)DA = [Ahi, ak, Alo]

B = [Bhi, bk, Blo] s1 = (ak > bk) = ak (1-bk)

1

ak

1

Ahi

D

ak

bk bk

Bhi

Alo

Blo

2k

122k+2

2k+2

-2k+

2

-2 2k+2

-1-1

F1 = F2

Alo

1

2k+12k

This is a common (isomorphic)TED for both designs:

TED(F1) TED(F2)


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Verification of Algorithmic SpecificationsVerification of Algorithmic Specifications

xx

xx FAB1

FAB2FAB2FAB3

A0A1

A3A2

B0B1B2B3

FFT(A)

FFT(B)

IFFT0IFFT1

IFFT3IFFT2InvFFT(FAB)

A[0:3]

B[0:3]

C0C1C2C3

Conv(A,B)

Use TED to prove equivalence: IFFTi=Ci


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SummarySummary• Features of TED

– Canonical, minimal, normalized– Compact (linear for polynomials)– Represents word-level blocks and Boolean logic

• Applications– Equivalence checking, RTL verification – Symbolic simulation (representation)– Algorithm verification

• Open problems– Satisfiability, functional test generation– Finite precision arithmetic

ece 667 spring 2013 synthesis and verification of digital systems

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