faster-than-real-time dynamic simulation of ac/dc grids

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Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids Supervisor: Dr. Venkata Dinavahi RTX-LAB Department of Electrical & Computer Engineering University of Alberta Sep. 13, 2021 Shiqi Cao

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Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids

Supervisor: Dr. Venkata Dinavahi

RTX-LAB

Department of Electrical & Computer Engineering

University of Alberta

Sep. 13, 2021

Shiqi Cao

Outline

Background

• Transient Stability Problem

• Traditional Solution Methodology

• Recent Research Background

Current Research Progress

• Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

• Flexible time-stepping dynamic emulation of AC/DC grid for faster-than-SCADA applications

Conclusions

2

Transient Stability Problem

3

• The power system dynamic simulation for transient stability analysis is basically solving the following set of differential algebraic equations (DAEs):

ሶ𝒙 = f(x, u, t), (1)

➢Network Equations:

g(x, u, t) = 0. (2)

➢ Initial Conditions:

𝒙𝟎 = 𝒙 𝑡0 , (3)

Background Current Research Progress Conclusion

Traditional Solution Methodology

4

• Discretization:

➢ Integration method (e.g., trapezoidal rule)

𝑭 𝒛 =∆𝑡

2𝒇 𝒙, 𝒖, 𝑡 + 𝒇 𝒙, 𝒖, 𝑡 + ∆𝑡 − 𝒙 𝑡 + ∆𝑡 − 𝒙 𝑡 , (4)

• Linearized:

➢ Iterative method (e.g., Newton-Raphson)

𝑱 𝒛𝒊 ∙ Δ𝒛 = −𝑭(𝒛𝒊) (5)

• Solving Linear Algebraic Equations:

➢LU decomposition

➢Gauss elimination

• Update

➢Jacobian matrix

➢State variables

Background Current Research Progress Conclusion

Recent Research Background

5

• Developing new parallel numerical integration algorithms:

➢Parallel-in-time

➢Parallel-in-space

• Utilizing high-performance computation platforms:

➢Supercomputers

➢Multiprocessors

➢GPUs

Background Current Research Progress Conclusion

AC/DC Grid Modeling

6

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

AC Grid Modeling

• Synchronous Machine Model

➢Rotor mechanical equations:

ሶ𝛿 𝑡 = 𝜔𝑅 ∙ Δ𝜔 𝑡 ,

ሶΔ𝜔(𝑡) =1

2𝐻𝑇𝑒 + 𝑇𝑚 − 𝐷 ∙ Δ𝜔 𝑡 , (10)

➢Rotor electrical equations:

ሶ𝜓𝑓𝑑(𝑡) = 𝜔𝑅 ∙ 𝑒𝑓𝑑 𝑡 − 𝑅𝑓𝑑𝑖𝑓𝑑 𝑡 ,

ሶ𝜓1𝑑(𝑡) = −𝜔𝑅 ∙ 𝑅1𝑑𝑖1𝑑(𝑡),

ሶ𝜓1𝑞(𝑡) = −𝜔𝑅 ∙ 𝑅1𝑞𝑖1𝑞(𝑡),

ሶ𝜓2𝑞(𝑡) = −𝜔𝑅 ∙ 𝑅2𝑞𝑖2𝑞(𝑡), (11)

[1] S. Cao, N. Lin, and V. Dinavahi, “Faster-than-real-time dynamic simulation of AC/DC grids on reconfigurable hardware,” IEEE Transactions on Power Systems, vol. 35, no. 2, pp. 1539–1548,

Mar. 2020.

Background Current Research Progress Conclusion

AC/DC Grid Modeling

AC Grid Modeling

• Synchronous Machine Model

➢Excitation system with PSS and AVR

ሶ𝑣1 𝑡 =1

𝑇𝑅∙ 𝑣𝑡 𝑡 − 𝑣1 𝑡 ,

ሶ𝑣2 𝑡 = 𝐾𝑠𝑡𝑎𝑏 ∙ Δ ሶ𝜔 𝑡 −1

𝑇𝜔𝑣2(𝑡),

ሶ𝑣3 𝑡 =1

𝑇2∙ 𝑇1 ሶ𝑣2 𝑡 + 𝑣2 𝑡 − 𝑣3 , (12)

DC Grid Modeling

• MMC Average Value Model

7

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

Background Current Research Progress Conclusion

AC/DC Grid Modeling

8

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

AC/DC Grid Interface

• Since different simulation algorithms

are applied to the AC and DC systems,

an interface is introduced to enable the

two types of simulation compatible in

one program.

Background Current Research Progress Conclusion

Proposed Fine-Grained Relaxation Algorithm

9

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

• 9th-order synchronous machine:∆𝑥1

𝑛+1

∆𝑥2𝑛+1

∆𝑥3𝑛+1

⋮∆𝑥9

𝑛+1

=

𝐽11𝑛 𝐽12

𝑛 𝐽13𝑛

𝐽21𝑛 𝐽22

𝑛 𝐽23𝑛

𝐽31𝑛 𝐽32

𝑛 𝐽33𝑛

⋯⋯⋯

𝐽19𝑛

𝐽29𝑛

𝐽39𝑛

⋮ ⋮ ⋮ ⋱ ⋮𝐽91𝑛 𝐽92

𝑛 𝐽93𝑛 ⋯ 𝐽99

𝑛

−1−𝑓1

𝑛

−𝑓2𝑛

−𝑓3𝑛

⋮−𝑓9

𝑛

(6)

where the superscription n denotes the iteration index.• A random Δ𝑥𝑖 can be derived in the following equations:

𝐽11𝑛 Δ𝑥1

𝑛+1 + 𝐽12𝑛 Δ𝑥2

𝑛+1 + 𝐽13𝑛 Δ𝑥3

𝑛+1 +⋯+ 𝐽19𝑛 Δ𝑥9

𝑛+1 = −𝑓1𝑛

𝐽21𝑛 Δ𝑥1

𝑛+1 + 𝐽22𝑛 Δ𝑥2

𝑛+1 + 𝐽23𝑛 Δ𝑥3

𝑛+1 +⋯+ 𝐽29𝑛 Δ𝑥9

𝑛+1 = −𝑓2𝑛

⋮ ⋮ ⋮

𝐽91𝑛 Δ𝑥1

𝑛+1 + 𝐽92𝑛 Δ𝑥2

𝑛+1 + 𝐽93𝑛 Δ𝑥3

𝑛+1 +⋯+ 𝐽99𝑛 Δ𝑥9

𝑛+1 = −𝑓9𝑛 (7)

Δ𝑥𝑖𝑛+1=

−𝑓𝑖𝑛−σ𝑗≠𝑖

𝑗=1−9𝐽𝑖𝑗

𝑛Δ𝑥𝑗𝑛+1

𝐽𝑖𝑖𝑛 (8)

Approximate: Δ𝑥𝑖𝑛+1=

−𝑓𝑖𝑛−σ𝑗≠𝑖

𝑗=1−9𝐽𝑖𝑗

𝑛Δ𝑥𝑗𝑛

𝐽𝑖𝑖𝑛 (9)

Background Current Research Progress Conclusion

• The emulation of integrated AC/DC grids is conducted on the Xilinx Virtex® UltraScaleTM XCVU9P FPGA board.

Hardware Emulation on FPGA

10

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

Background Current Research Progress Conclusion

• Specifics of major AC/DC grid hardware modules:

➢The DC grid parts are fully parallelized with the largest latency of 90 Tclk, under an FPGA clock latency of 10 ns, the FTRT ratio is over 200𝜇𝑠

90×10𝑛𝑠≈ 222.

➢With a maximum FGRA iteration of 11, the estimated overall latency of the dynamic simulation is (32+394+98+35)*11+1313=7462 clock cycles. With a time-step of 10 ms, FTRT

ratio reaches over 10𝑚𝑠

7462×10𝑛𝑠≈ 134.

Hardware Emulation on FPGA

11

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

Background Current Research Progress Conclusion

FTRT Emulation Results and Validation

12

• Two-Area Systems:

➢At t=5s, a load of 183.5MW and 383.5MW areremoved temporarily from Bus 7 and 9respectively.

➢The integration of HVDC system improves thestability issue by doubling the rectifier's outputpower following the detection of the gridfrequency exceeding the threshold at around7s, it lasts till the frequency is restored to thestandard 60Hz at t=10s, as Fig. (b) shows.

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

Background Current Research Progress Conclusion

FTRT Emulation Results and Validation

13

• Large scale AC/DC grid:

➢Three-phase-to-ground fault

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

Background Current Research Progress Conclusion

14

FTRT Emulation Results and Validation

Faster-Than-Real-Time Dynamic Simulation of AC/DC Grids on Reconfigurable Hardware

• Large scale AC/DC grid:

➢ Inter-area oscillation

• Results on oscilloscope:

Background Current Research Progress Conclusion

Proposed Flexible Time-Stepping Algorithm

15

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢4th-order Runge-Kutta:

𝑅𝐾1 = 𝑑𝑡 ∙ 𝑓 𝑡𝑛, 𝑥𝑛 ,

𝑅𝐾2 = 𝑑𝑡 ∙ 𝑓 𝑡𝑛 +𝑑𝑡

2, 𝑥𝑛 +

𝑅𝐾1

2,

𝑅𝐾3 = 𝑑𝑡 ∙ 𝑓 𝑡𝑛 +𝑑𝑡

2, 𝑥𝑛 +

𝑅𝐾2

2,

𝑅𝐾4 = 𝑑𝑡 ∙ 𝑓 𝑡𝑛 + 𝑑𝑡, 𝑥𝑛 + 𝑅𝐾3 ,

𝑥𝑛+1 = 𝑥𝑛 +1

6𝑅𝐾1 + 2𝑅𝐾2 + 2𝑅𝐾3 + 𝑅𝐾4 . (1)

➢Local truncation error (LTE)

𝐿𝑇𝐸 = 𝑥 𝑡𝑛+1 − 𝑥𝑛+1. (2)

➢ LTE-based flexible time-stepping:• 5th-order Adams-Bashforth (AB5)

ҧ𝑥𝑛+1 = 𝑥𝑛 +𝑑𝑡

7201901𝐹𝑛 − 2774𝐹𝑛−1 + 2616𝐹𝑛−2 − 1274𝐹𝑛−3 + 251𝐹𝑛−4 , (3)

where ҧ𝑥𝑛+1 can be treated as the exact values.

• As the exact values are solved from AB5, the adaptive time-step (෪𝑑𝑡) can be obtained as:

෪𝑑𝑡 =6 ҧ𝑥𝑛+1−𝑥𝑛+1 𝑑𝑡

(𝑅𝐾1+2𝑅𝐾2+2𝑅𝐾3+𝑅𝐾4)(4)

[2] S. Cao, N. Lin, and V. Dinavahi, “Flexible time-stepping dynamic emulation of AC/DC grid for faster-than-SCADA applications ,” IEEE Trans. Power Syst., vol. 36, no. 3,

pp. 2674–2683, May 2021.

Background Current Research Progress Conclusion

Proposed Flexible Time-Stepping Algorithm

16

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢Event-based flexible time-stepping (FTS):

This algorithm is relative to the contingencies taking place in the system. After a serious disturbance,

the synchronous generators may lose synchronism, resulting in a rapid change of output voltages and

generator rotor angles. Therefore, the rate of change voltage and rotor angle (𝑑𝑣/𝑑𝑡, 𝑑𝛿/𝑑𝑡) can be

treated as the main time-step control indices.

➢ Proposed local equipment based flexible time-stepping

Fig. 1

Background Current Research Progress Conclusion

AC/DC Grid Modeling

17

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢AC/DC grid interface

𝑌𝑀𝑀𝐶 =𝑃𝑀𝑀𝐶+𝑗∙𝑄𝑀𝑀𝐶

𝑉𝑏𝑢𝑠2 (5)

In this case, the converters can be treated

as time-varying P+jQ loads, which means

both P and Q values are updated in every

time-step to reveal the dynamic process of

the converter stations. Meanwhile, the AC

grid provides the voltage U and phase angle

θ to the EMT emulation.

Fig. 2

Background Current Research Progress Conclusion

Hardware Emulation on FPGA

18

Background Current Research Progress Conclusion

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢ Relationship between hardware resources

and synchronous generators

Fig. 3

➢FTRT ratio under various contingencies

Hardware Emulation Results

19

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢ Three phase to ground fault.

At the time of 5s, a three-phase-to-

ground fault occurs at Bus 68 in System 1.

The impacts after the disturbance are severe

to the AC system, including the generators’

rotor angles, bus voltages, and the

frequencies, as shown in Fig. 4. At t2=5.1 s,

the three-phase-to-ground fault is cleared,

and the system returns to the steady-state in

about 5 s.

Fig. 4

Background Current Research Progress Conclusion

Hardware Emulation Results

20

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢ Generator Outage and Sudden Load Change

Fig. 6Fig. 5

Background Current Research Progress Conclusion

➢ Relative error:

𝜖 =𝑉𝐶𝑎𝑙𝑐𝑢𝑙𝑎𝑡𝑒𝑑−𝑉𝑇𝑆𝐴𝑇

𝑉𝑇𝑆𝐴𝑇∙ 100% (6)

Fig. 7

Hardware Emulation Results

21

Flexible Time-Stepping Dynamic Emulation of AC/DC Grid for Faster-Than-SCADA Applications

➢ Working principle of the proposed FTRT emulation

The proposed FTRT emulation can be utilized by the power control center in a real power

transmission system, as given in Fig 8. Once a disturbance occurs and is detected, the peripheral devices

delivered the recorded data to the FPGA boards running a virtual grid via the high-speed interfaces of the

FPGA board, including QSFP (Quad Small Form-factor Pluggable), Samtec® FireFly, and Ethernet

interfaces. Meanwhile, in the control center, there could be several power injection scenarios being

emulated in the FTRT hardware platforms. With more than 100 FTRT ratio, the control center has

sufficient time to come up with an optimum solution that helps maintain the synchronism of the

generators and regulate the frequency. it should be pointed out that since the focus of this work is to

demonstrate how FTRT being developed and used to maintain a stable system, only an effective solution

is demonstrated, and other control actions that are unable to stabilize the system will be automatically

disregarded.

Background Current Research Progress Conclusion

29

Background Current Research Progress Conclusion

Conclusion

• This work proposed the fine-grained relaxation and flexible time-steppingalgorithm for faster-than-real-time dynamic simulation of integrated AC/DC gridsfor dynamic security assessment (DSA) and predictive control in energy controlcenter.

• And a power injection strategy is proposed for mitigating the adverse impactsafter a serious disturbance.

• Meanwhile, the emulated dynamic network models achieved factors of more than100 faster than real-time execution.

Thank you for your attention!

Shiqi Cao