h igh s peed, p luggable o ptical b ackplane c onnector t echnology richard pitwon, ken hopkins,...

HIGH SPEED, PLUGGABLE OPTICAL

BACKPLANE CONNECTOR TECHNOLOGY

HIGH SPEED, PLUGGABLE OPTICAL

BACKPLANE CONNECTOR TECHNOLOGY

Richard Pitwon, Ken Hopkins, Dave MilwardXyratex Technology Ltd

International Symposium on Photonic Packaging

Electrical Optical Circuit Board and Optical Backplane

organized by Fraunhofer IZM & VDI/VDE-IT

Munich, GermanyNovember 2006

David R. Selviah, Ioannis PapakonstantinouKai Wang, F. Anibal FernándezUniversity College London (UCL)

Purpose

British government funded initiative to investigate incorporation of optical backplanes into high bandwidth systems and develop solutions

THE STORLITE PROJECT

2 ISPP Electro-Optical Circuit Board | Munich 2006

University College London

Investigation into performance enabling polymer waveguide

structures and characterisation

Xyratex

Investigation into optical backplane connector technology and prototype

solution development

Exxelis Ltd

Optical PCB manufacture

Duration

June 2003 – November 2005

http://www.dti.gov.uk/

http://www.xyratex.com/

RESEARCH OBJECTIVES

• Investigation of current state of the art in optical PCB technology research

• Polymeric waveguide fabrication and characterisation

• Optical PCB Design Rules

• Investigation into low-cost technology drivers

• Method of pluggable daughtercard connection to an optical backplane

• Development of prototype solutions

• Parallel optical transceiver and pluggable optical backplane connector

• Development of prototype demonstration assembly



RESEARCH AND DEVELOPMENT OVERVIEW

• High speed parallel optical transceiver

• Opto-mechanical registration interface

• Low-cost optical backplane connection

mechanism

• Low cost precision optical alignment and

assembly method

• Optical PCB interface coupling method

• Prototype demonstration unit



HIGH BANDWIDTH BACKPLANE ENVIRONMENTS

48 Drive RAID Storage System

12 Drive SBOD Storage System

16 Drive EBOD Storage System



HIGH BANDWIDTH BACKPLANE

Power Module

Multi Layer Interconnect Backplane

Controller

Module

Dual PortDisk Drives

Air FlowChannels

High Speed Connectors

To Controllers



BACKPLANE ENGAGEMENT MODEL

Orthogonal daughtercard

engagement to backplane

Embedded optical channels to

carry high speed serial signals

between cards

Copper layers to carry power,

control signals and low speed

signals

High bandwidth backplane



Daughtercard

VCSEL

PROPOSED COUPLING PRINCIPLE

Optical Waveguides

Backplane

Surface emitting photonics used

on daughtercard interface

Butt-coupling scheme allows for

minimum number of

intermediary optical interfaces

Copper Planes

Copper Traces



PARALLEL OPTICAL TRANSCEIVER DESIGN

• Quad duplex parallel optical transceiver

• 10.3 Gbps per channel (82 Gb/s aggregate bandwidth)

• Electronic daughtercard connector

• Flexible and rigid PCB sections

• Optical backplane interface

Flexible mid-section

Rigid base section

Rigid optical

interface

Electronic

connector

Active opto-mechanical

coupling interface



PHOTONIC INTERFACE

DESIGN

Source: ULM Photonics GmbH

Source: Microsemi Corporation

Source: GRINTech GmbH

VCSEL ArrayVCSEL Array

PIN ArrayPIN Array

GRIN Lens ArrayGRIN Lens Array

MT compatible

interface



OPTOELECTRONIC PCB WITH MT – SOCKET

INTERPOSER


(a)

(b)

MT-socket interposer

MT-plugCeramic lens holder

MT-pins

MT - SOCKET INTERPOSER ON THE TOP OF

BACKPLANE


3.8870 ± 0.00010.35650 ± 0.00001

0.66

±

0.01

0.02 mm0.53125 mm

3.8825 ± 0.005 mm

0.25 mm

ACTUAL ALIGNMENT OF THE

COMPONENT


waveguides

registration features

3886 µm

SUPPORT DAUGHTERCARD DESIGN

4 XFP ports

PCB material

Rogers 4350 on

outer layers

Transceiver receptacle

4 Port 10 GbE LAN Physical Relay board

Host interface



CHARACTERISATION SETUP

MT patchcord for

stand alone testing

Physical layer relay

board

• Test traffic: 10 GbE LAN (10.3 Gbps)

• VCSEL bias current: 11.91 mA

• VCSEL modulation current: 9.8 mA

• Divergence: 25°

• Output optical power: 0.43 mW

• Average optical jitter: 31.2 ps (Pk – Pk)



CONNECTOR MECHANISM

Principal Function

Elevation and retraction of optical interface



ALIGNMENT METHOD BASED ON MT

CONCEPT


daughtercard MT-pin

4 VCSEL array

MT-pin

4 PD array

x

z

y

θφ

backplanearray of 12waveguides

MT-holes

POLYMER OPTICAL WAVEGUIDE TECHNOLOGY


POLYMER WAVEGUIDE CHARACTERISTICS

Waveguide Material

UV-curable polymeric acrylate (Truemode®)

Propagation loss @ 850 nm: 0.04 dB/cm

Heat degradation resilience: up to 350°C

Waveguide properties

Size: 70 µm x 70 µm

Core index: 1.556

Cladding index: 1.526

Numerical aperture: 0.302

Waveguide Array

Centre to centre pitch: 250 µm


PROTOTYPE DEMONSTRATOR CONSTRUCTION

Separate passive

electrical backplane

Passive Electrical Backplane



Daughtercard Guide Features




Daughtercard Power Supply




Daughtercard to Optical Backplane Coupling Evaluation




Optical Backplane Integration

Separate optical PCB




Complete Demonstration Unit




TEST AND CHARACTERISATION

Optical Coupling Characterisation

Test traffic: 10 GbE LAN (10.3 Gbps)

Wavelength: 850 nm

Reference Signal – No Waveguide

Jitter : 0.34 UI

Relative Loss: 0 dB

10 cm Waveguide with Isapropanol

Jitter 0.36 UIRelative Loss 4.5 dB

10 cm Waveguide – Diced and Polished


10 cm Waveguide – Diced Only


Arrangement:

Active connector – waveguide - patchcord

Multimode MT fibre

patchcord

Active prototype

connector


TEST AND CHARACTERISATION

Arrangement:

Test traffic source (10 GbE LAN)

Fibre cable

XFP Port 1 (Rx)

Daughtercard 1

Connector 1 (Tx)

Optical PCB

Connector 2 (Rx)

Daughtercard 2

XFP Port 2 (Tx)

Fibre cable

Traffic Capture

High Speed Network Link Evaluation

Bit Error Rate < 10-12


CONTOUR MAP OF VCSEL AND PD

MISALIGNMENT


(a) Contour map of relative insertion loss compared to the maximum coupling position for VCSEL misalignment at z = 0.

(b) Same for PD misalignment at z = 0. Resolution step was Δx = Δy = 1 µm.

Dashed rectangle in the middle of the maps corresponds to the expected relative insertion loss according to the calculated misalignments along x and y in text slides.

The minimum insertion loss was 4.4 dB, corresponded to x = 0, y = 0, z = 0

TOLERANCES ALONG X, Y AND Z FOR CONNECTOR

COMPONENTS


X y Z

MT-plug 3 μm (pin-to-pin) 3 μm (pin-to-GRIN) ________

MT-socket 3 μm (hole-to-hole)3 μm (hole-to-

waveguide)________

OPCB features

+2.5 μm (increase in registration wall-to-wall spacing due to

overexposure) 2.5 μm (due to 5 μm

extra spacing between feet of

interposer)

1 μm (core thickness control)

+10 μm (accuracy of dicing in respect to the dicing

lines on the board) +2.5 μm (backstop shift

due to overetching)

Tolerance of MTinterposer socket

towaveguides

8 μm or 3 μm ifoverexposure widening

isknown and reproducible

4 μm

+12.5 μm or +10 μm if overexposure widening

is known and reproducible

Combined tolerance

of VCSEL and PIN to

waveguides

11 μm or 6 μm ifoverexposure widening

isknown and reproducible

7 μm

+12.5 μm or +10 μm if overexposure widening

is known and reproducible

RELATIVE INSERTION LOSS OF VCSEL AND PD AS THEY MOVE AWAY FROM THE OPCB

WAVEGUIDES.


0

0.5

1

1.5

2

2.5

3

3.5

4

0 20 40 60 80 100 120 140 160 180 200

axial distance z (μm)

Inse

rtio

n L

oss

(dB

)

VCSEL

Photo Detector

CROSSTALK MEASUREMENT

1


Power received at the end of 0th waveguide as a function of the lateral distance of the VCSEL from its center. The boundaries and the centers of the waveguides on the

backplane are marked. In the cladding power drops at a rate of 0.011 dB/µm

-250 0 250 500 750 1000 1250 1500

-35

-30

-25

-20

-15

-10

-5

0

x (m)

Rel

ativ

e p

ower

at

0th

wav

egu

ide

(dB

)

VCSEL

0th 1st 2nd 3rd 4th 5th 6th

PD


Signal-to-cross-talk (SCR) levels that 0th waveguide experiences from its adjacent waveguides.

-70 -50 -30 -10 0 10 30 50 700

5

10

15

20

25

30

35

x (m)

SXR

(dB

) 1st

2nd

3rd

4th

5th

6th(b)


2


SCR experienced by waveguides number 1 and 4 and of waveguides number 2 and 3 from the array of four in the connector if all are in use. Dashed-dot lines determine the

boundaries of the maximum expected cross-talk based on current connector tolerances.

-80 -60 -40 -20 0 20 40 60 800

5

10

15

20

25

x (m)

SCR

(dB

)

1 and 4 waveguides in connector

2 and 3 waveguides in connector


3

STABILITY TESTING OF THE MT – SOCKET INTERPOSER 1


Insertion loss and signal to cross-talk (SCR) as a function of mating cycle for 75 engagements.


Histogram of insertion loss

STABILITY TESTING OF THE MT – SOCKET INTERPOSER 2

Purpose

Industrial collaborative effort to develop commercial technology drivers for optical backplane and connector technology and drive the proliferation of optical backplane technology into the industrial sector

THE CANDEO PROJECT


Xyratex

Commercial development of proprietary parallel optical

transceiver technology

Samtec

Commercial development of optical backplane engagement mechanism


http://www.samtec.com/

CANDEO CURRENT STATUS

• High speed parallel optical transceiver design modified for

commercial design

• Single stage optical backplane engagement mechanism

developed

• Commercial form factor module designed and developed

• First mechanical prototype on exhibition by Samtec and Xyratex

at Electronica 2006, Samtec booth 419 in Hall B4


Phase I(currently underway)Phase I(currently underway)

http://www.xyratex.com/xyratex/whatsnew/detail.asp?release_id=153

INTEGRATED OPTICAL AND ELECTRONIC PCB MANUFACTURING


Academic PartnersUniversity College London (UCL) – Waveguide design, modelling, measurementHeriot-Watt University – Direct UV laser waveguide fabrication Loughborough University – Laser ablation, surface treatment, printing waveguide fabrication, flip-chip assembly

Industrial PartnersXyratex – End user and project manager BAE Systems – End userRenishaw – End user Exxelis – Polymer chemistry, lithographic waveguide fabricationCadence – PCB layout toolsRsoft Design – Optical modeling toolsXaar – print head technology

Purpose

To compare multimode, polymer waveguide manufacture techniques for large area optical backplanes and to develop design rules.

SUMMARY

Xyratex White Papers • An Optical Backplane Connection System with Pluggable Active Board Interfaces(available from Xyratex website)

• Pluggable Optical Backplane Connector Technology (available)

• Optical vs Copper Cost and Performance Evaluation (pending)

www.xyratex.com

Xyratex White Papers • An Optical Backplane Connection System with Pluggable Active Board Interfaces(available from Xyratex website)

• Pluggable Optical Backplane Connector Technology (available)

• Optical vs Copper Cost and Performance Evaluation (pending)

www.xyratex.com

Intellectual Property 7 patent applications related to optical PCB interconnect and communication structures and methodologies

Intellectual Property 7 patent applications related to optical PCB interconnect and communication structures and methodologies


SUMMARY

UCL Publications (available from UCL website)

Papers published on waveguide devices

• Sources misalignment x, y, z

• Detector misalignment x, y, z

• Straight tapered waveguide

• Bends

• Propagation loss

• Thermal optics switch

• Power splitter

• Precision low cost alignment

www.ee.ucl.ac.uk/%7Eodevices/

UCL Publications (available from UCL website)

Papers published on waveguide devices

• Sources misalignment x, y, z

• Detector misalignment x, y, z

• Straight tapered waveguide

• Bends

• Propagation loss

• Thermal optics switch

• Power splitter

• Precision low cost alignment

www.ee.ucl.ac.uk/%7Eodevices/


http://www.xyratex.com/xyratex/whatsnew/detail.asp?release_id=153

Thank You for Your Attention

Richard C A PitwonSenior Photonics Engineer

Ken HopkinsHardware Architect

Dave MilwardDevelopment Manager

E-mail: [email protected]


David R SelviahF. Anibal Fernández Senior Academics

Ioannis PapakonstantinouPostgraduate Researcher

Kai WangResearch Fellow

E-mail: [email protected]

Acknowledgements

UK Department of Trade and Industry

EPSRC

ExxelisDr Navin Suyal

Prof. Frank Tooley


h igh s peed, p luggable o ptical b ackplane c onnector t echnology richard pitwon, ken hopkins,...

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