high output current, rail-to-rail input/output single cmos ... · high output current, rail-to-rail...

NJU77903

- 1 - Ver.02

High Output Current, Rail-to-Rail Input/Output Single CMOS Operational Amplifiers

■ GENERAL DESCRIPTION

The NJU77903 is CMOS operational amplifier combines full swing input and output with operating up to 36V.

It outputs typically up to 200mA of peak-to-peak current to drive low resistance load including inductance load such as Angle resolver, Lineout cable and Piezo actuator.

In addition, it has enhanced RF noise immunity. ■ FEATURES

● High output current ±100mA typ. (200mApp typ.) ● Wide Operating Temperature Topr = -40ºC to +125ºC ● Rail-to-Rail Input / Output ● Enhanced RF noise immunity ● Wide Operating Voltage 6.8V to 36V ● Supply Current 9.5mA typ. ● Open Loop Gain 100dB typ. ● Input Bias Current 1pA typ. ● Slew Rate 3.5V/µs typ. ● Unity Gain Frequency 1.5MHz typ. ● Thermal shutdown ● Current Limit ● Package Outline TO252-5 DFN8−W2 (ESON8-W2/Size: 3mm x 3mm)

■ APPLICATIONS ● Angle Resolver ● Motor Driver ● Speaker Driver ● 4mA to 20mA Transmitter ● Liner Power Booster

■ PIN CONFIGURATION

NJU77903DL3 (TO252-5) NJU77903KW2 (DFN8−W2(ESON8-W2))

1 2 3 4 5

PAD

[ TOP VIEW ]

1

2

3

4

8

7

6

5

[ TOP VIEW ]

PAD

1

2

3

4

8

7

6

5

[ BOTTOM VIEW ]

NJU77903DL3 (TO252-5)

NJU77903KW2 (DFN8−W2(ESON8-W2))

■ PACKAGE OUTLINE

NJU77903DL3 PIN CONFIGURATION

1 V+

2 OUTPUT

3 V-

4 -INPUT

5 +INPUT

Exposed pad should connect with a V- terminal.

NJU77903KW2 PIN CONFIGURATION

1 NC

2 OUTPUT

3 V-

4 -INPUT

5 +INPUT

6 LIM2 (Output Sink Current Limit Trim Terminal)

7 LIM1 (Output Source Current Limit Trim Terminal)

8 V+

Exposed pad should connect with a V- terminal. The NC pin and The PAD have to be wired as short as possible to connect with a V− terminal.

NJU77903

- 2 - Ver.02

■ ABSOLUTE MAXIMUM RATINGS (Ta=25ºC, unless otherwise noted.) PARAMETER SYMBOL RATING UNIT

Supply Voltage V+ - V- 40 V Differential Input Voltage (Note 1) VID ±36 V

Input Voltage (Note 2) VIN V- - 0.3 to V+ + 0.3 V Input Current IIN ±10(Note 3) mA

Output Voltage (Note 4) VO V- - 0.3 to V+ + 0.3 V Power Dissipation (Note 9)

PD (2-layer / 4-layer)

mW TO252-5 1190(Note 5) / 3125(Note 6) DFN8−W2 (ESON8-W2) 640(Note 7) / 2080(Note 8)

Operating Temperature Range Topr -40 to +125 °C Storage Temperature Range Tstg -55 to +150 °C

(Note1) Differential voltage is the voltage difference between +INPUT and -INPUT. (Note2) Input voltage is the voltage should be allowed to apply to the input terminal independent of the magnitude of V+. The normal

operation will establish when any input is within the Common Mode Input Voltage Range of electrical characteristics. (Note3) If the input voltage exceeds the supply voltage,the input current must be limited 10 mA or less by using a restriction resistance. (Note4) Output voltage is the voltage should be allowed to apply to the output terminal independent of the magnitude of V+. (Note5) 2-layer: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layers, FR-4) mounting (Note6) 4-layer: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 4layers, FR-4) mounting (Note7) Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)

(Note8) Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)

(For 4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5) (Note9) Power dissipation is the power that can be consumed by the IC at Ta=25ºC, and is the typical measured value based on

JEDEC condition. When using the IC over Ta=25ºC subtract the value [mW/ºC] = PD / (Tstg (MAX)-25) per temperature. (Note10) The NC pin and The PAD have to be wired as short as possible to connect with a V− terminal.

■ RECOMMENDED OPERATING VOLTAGE

PARAMETER SYMBOL RATING UNIT

Supply Voltage V+-V- +6.8 to +36 V

Figure 1 : Power Dissipation Derating Curve

0

500

1000

1500

2000

2500

3000

3500

0 25 50 75 100 125 150Ambient Temperature Ta [ºC]

Pow

er D

issi

patio

n Pd

[mW

]

TO252-5 (4-layer)

DFN8-W2 (4-layer)

TO252-5 (2-layer)

DFN8-W2 (2-layer)

NJU77903

- 3 - Ver.02

■ ELECTRICAL CHARACTERISTICS (V+= +12V, V-= 0V, VIC= +6V, RL=10kΩ, Ta=25ºC, unless otherwise noted.)

PARAMETER PARAMETER TEST CONDITION Min. Typ. Max. UNIT

INPUT CHARACTERISTICS Input Offset Voltage VIO RS=50Ω - 1 6 mV Input Offset Voltage Drift ΔVio/ΔT Ta = -40ºC to 125ºC - 20 - µV/ºC Input Bias Current IB - 1 - pA Input Offset Current IIO - 1 - pA Open Loop Gain AV VO=1V to 11V, RL=10kΩ to V+/2 80 100 - dB

Common Mode Rejection Ratio CMR VIC=0V to 6V, VIC=6V to 12V 55 75 - dB

Common Mode Input Voltage Range VICM CMR≧55dB 0 - 12 V

OUTPUT CHARACTERISTICS

Output Voltage VOH

RL=10kΩ to V+/2 11.97 11.99 - V Isource=100mA 11.4 11.65 - V VOL

RL=10kΩ to V+/2 - 0.01 0.03 V Isink=100mA - 0.35 0.6 V

Output Source Current Limit1 ISOURCELIM1

[ NJU77903DL3 ] 250 375 495 mA

[ NJU77903KW2 ] ： LIM1=OPEN （Figure2-1）

Output Source Current Limit2 ISOURCELIM2 LIM1=V+ （Figure2-1）

NJU77903KW2 ONLY 0 50 150 mA

Output Sink Current Limit1 ISINKLIM1

[ NJU77903DL3 ] 200 375 545 mA

[ NJU77903KW2 ] ：

LIM2=OPEN （Figure2-2）

Output Sink Current Limit2 ISINKLIM2 LIM2=V- （Figure2-2）

NJU77903KW2 ONLY 0 40 120 mA

POWER SUPPLY Supply Current IDD No Signal, RL=OPEN - 9.5 12.5 mA

Supply Voltage Rejection Ratio SVR V+ = 6.8V to 36V 70 85 - dB

DYNAMIC PERFORMANCE Unity Gain Frequency fT RL=10kΩ to V+/2, CL=10pF - 1.5 - MHz Phase Margin ΦM RL=10kΩ to V+/2, CL=10pF - 75 - deg

Slew Rate （Note 11） SR GV=0dB, RL=10kΩ to V+/2, CL=10pF,

Vin=4Vpp (4V to 8V) 2.5 3.5 - V/µs

NOISE PERFORMANCE

Equivalent Input Noise

Voltage en f=10kHz, RS=50Ω - 50 - nV/√Hz

Total Harmonic Distortion

+ Noise THD GV=6dB, RF=10kΩ, RL=10kΩ, CL=10pF, Vo=2Vpp, f=10kHz - 0.03 - %

(Note 11) Number specified is the slower of the positive and negative slew rates.

NJU77903

- 4 - Ver.02

■ ELECTRICAL CHARACTERISTICS (V+= +15V, V-= -15V, VIC= 0V, RL=10kΩ, Ta=25ºC, unless otherwise noted.)

PARAMETER PARAMETER TEST CONDITION Min. Typ. Max. UNIT

INPUT CHARACTERISTICS Input Offset Voltage VIO RS=50Ω - 2 8 mV Input Offset Voltage Drift ΔVio/ΔT Ta = -40°C to 125°C - 20 - μV/°C Input Bias Current IB - 1 - pA Input Offset Current IIO - 1 - pA Open Loop Gain AV VO=-14V to +14V, RL=10kΩ to 0V 80 100 - dB

Common Mode Rejection Ratio CMR VIC=-15V to 0V, VIC=0V to 15V 60 80 - dB

Common Mode Input Voltage Range VICM CMR≧60dB -15 - 15 V

OUTPUT CHARACTERISTICS

Output Voltage VOH RL=10kΩ to V+/2 14.97 14.99 - V

Isource=100mA 14.45 14.70 - V VOL

RL=10kΩ to V+/2 - -14.99 -14.97 V Isink=100mA - -14.70 -14.45 V

Output Source Currrent Limit1 ISOURCELIM1

[NJU77903DL3 ] - 400 - mA

[ NJU77903KW2 ] ： LIM1 terminal = OPEN , (Figure 2-1)

Output Source Current

Limit2 ISOURCELIM2 LIM1 terminal=V+, (Figure 2-1) NJU77903KW2 ONLY - 60 - mA

Output Sink Current Limit1 ISINKLIM1

[ NJU77903DL3 ] ： - 400 - mA

[ NJU77903KW2 ] ： LIM2 terminal = OPEN (Figure 2-2)

Output Sink Current Limit2 ISINKLIM2 LIM2 terminal=V-, (Figure 2-2)

NJU77903KW2 ONLY - 30 - mA

POWER SUPPLY Supply Current IDD No Signal, RL=OPEN - 12 16 mA DYNAMIC PERFORMANCE Unity Gain Frequency fT RL=10kΩ to V+/2, CL=10pF - 2 - MHz Phase Margin ΦM RL=10kΩ to V+/2, CL=10pF - 70 - deg

Slew Rate (Note 12) SR GV=0dB, RL=10kΩ to V+/2, CL=10pF,

Vin=4Vpp (-2V to +2V) - 4 - V/µs

NOISE PERFORMANCE

Equivalent Input Noise

Voltage en f=10kHz, RS=50Ω - 50 - nV/√Hz

Total Harmonic Distortion

+ Noise THD GV=6dB, RF=10kΩ, RL=10kΩ, CL=10pF, Vo=2Vpp, f=10kHz - 0.03 - %

(Note 12) Number specified is the slower of the positive and negative slew rates.

■ Output Current Limit Trim Circuit [NJU77903KW2]

Figure 2-1: Output Source Current Limit Trim

1

2

3

4 5

6

7

8V+

LIM1

RLIM1=0Ω to OPEN

RLIM1

Figure 2-2: Output Sink Current Limit Trim

1

2

3

4 5

6

7

8

LIM2

RLIM2

RLIM2=0Ω to OPEN

V-

NJU77903

- 5 - Ver.02

■ TYPICAL CHARACTERISTICS

Supply Current vs. Supply VoltageAV=0dB, RL=OPEN, V-=0V

0

2

4

6

8

10

12

14

16

18

20

0 5 10 15 20 25 30 35 40Supply Voltage V+ [V]

Supp

ly C

urre

nt [m

A]

Ta=-40ºC

Ta=125ºC

Ta=85ºCTa=25ºC

Supply Current vs. TemperatureAV=0dB, RL=OPEN

0

2

4

6

8

10

12

14

16

18

20

-50 -25 0 25 50 75 100 125 150Ambient Temperature [ºC]

Supp

ly C

urre

nt [m

A]

V+/V-=6.8V/0V

V+/V-=30V/0V

V+/V-=12V/0V

Input Offset Voltage vs. Supply VoltageAV=0dB, V-=0V

-10

-8

-6

-4

-2

0

2

4

6

8

10


Inpu

t Offs

et V

olta

ge [m

V]

Ta=-40ºC

Ta=125ºC

Ta=85ºCTa=25ºC

Input Offset Voltage vs. TemperatureAV=0dB

-10

-8

-6

-4

-2

0

2

4

6

8

10


Inpu

t Offs

et V

olta

ge [m

V]

V+/V-=6.8V/0V

V+/V-=30V/0V

V+/V-=12V/0V

Input Offset Voltagevs. Common-Mode Input Voltage

V+/V-=±6V

-15

-12

-9

-6

-3

0

3

6

9

12

15

-8 -6 -4 -2 0 2 4 6 8Common-Mode Input Voltage [V]

Inpu

t Offs

et V

olta

ge [m

V] Ta=-40℃

Ta=25℃

Ta=125℃

Input Offset Voltagevs. Common-Mode Input Voltage

V+/V-=±15V

-15

-12

-9

-6

-3

0

3

6

9

12

15

-16 -12 -8 -4 0 4 8 12 16Common-Mode Input Voltage [V]

Inpu

t Offs

et V

olta

ge [m

V]

Ta=-40℃ Ta=25℃Ta=125℃

NJU77903

- 6 - Ver.02

Input Offset Voltage vs. Output CurrentV+/V-=±6V

-30

-20

-10

0

10

20

30

-250 -200 -150 -100 -50 0 50 100 150 200 250Output Current [mA]

Inpu

t Offs

et V

olta

ge [m

V]

Ta=25℃Ta=- 40℃

Ta=50℃

Ta=85℃

Ta=125℃

OUTPUT SOURCECURRENT

OUTPUT SINK CURRENT

Supply Voltage Rejection Ratiovs. TemperatureV+=6.8V to 36V , V-=0V

0

20

40

60

80

100

120


Supp

ly V

olta

ge R

ejec

tion

Rat

io [d

B]

Input Offset Voltage vs. Output CurrentV+/V-=±15V

-30

-20

-10

0

10

20

30

-250 -200 -150 -100 -50 0 50 100 150 200 250Output Current [mA]

Inpu

t Offs

et V

olta

ge [m

V] Ta=25℃Ta=-40℃

Ta=50℃

Ta=85℃

Ta=125℃

OUTPUT SOURCECURRENT

OUTPUT SINK CURRENT

Supply Voltage Rejection Ratiovs. Frequency

V+/V-=12V/0V , VIN:2VPP, GV=40dB, RS=1kΩ, RF=100kΩ, Ta=25ºC

0

10

20

30

40

50

60

70

80

90

100

100 1k 10k 100kFrequency [Hz]

V+

V‐

Supp

ly V

olta

ge R

ejec

tion

Rat

io [d

B]

Supply Voltage Rejection Ratiovs. Frequency

V+/V-=30V/0V, VIN:2VPP, GV=40dB, RS=1kΩ, RF=100kΩ, Ta=25ºC

0

10

20

30

40

50

60

70

80

90

100


V+

V‐

Supp

ly V

olta

ge R

ejec

tion

Rat

io [d

B]

NJU77903

- 7 - Ver.02

Common-Mode Rejection Ratio vs. TemperatureV+/V-=±6V

0

20

40

60

80

100

120


Com

mon

-Mod

e R

ejec

tion

Rat

io [d

B]

VICM=-6 to 0V

VICM=0 to 6V

Common-Mode Rejection Ratio vs. TemperatureV+/V-=±15V

0

20

40

60

80

100

120


Com

mon

-Mod

e R

ejec

tion

Rat

io [d

B]

VICM=-15 to 0V

VICM=0 to 15V

Common-Mode Rejection Ratio vs. Frequency

V+/V-=±6V, VIN=3VPP, GV=40dB, RS=1kΩ, RF=100kΩ, Ta=25ºC

0

10

20

30

40

50

60

70

80

90

100


Com

mon

-Mod

e R

ejec

tion

Rat

io [d

B]

Common-Mode Rejection Ratio vs. Frequency

V+/V-=±15V, VIN=3VPP, GV=40dB, RS=1kΩ, RF=100kΩ, Ta=25ºC

0

10

20

30

40

50

60

70

80

90

100


Com

mon

-Mod

e R

ejec

tion

Rat

io [d

B]

Maximum Output Voltagevs. Output Source Current

V+/V-=12V/0V

10

10.2

10.4

10.6

10.8

11

11.2

11.4

11.6

11.8

12

0 50 100 150 200Output Source Current [mA]

Max

imum

Out

put V

olta

ge [V

]

Ta=-40℃

Ta=25℃

Ta=85℃

Ta=125℃

Maximum Output Voltagevs. Output Source Current

V+/V-=30V/0V

28

28.2

28.4

28.6

28.8

29

29.2

29.4

29.6

29.8

30

0 50 100 150 200Output Source Current [mA]

Max

imum

Out

put V

olta

ge [V

]

Ta=-40℃

Ta=25℃

Ta=85℃

Ta=125℃

NJU77903

- 8 - Ver.02

Maximum Output Voltagevs. Output Sink Current

V+/V-=12V/0V

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

0 50 100 150 200Output Sink Current [mA]

Max

imum

Out

put V

olta

ge [V

]

Ta=-40℃

Ta=25℃

Ta=85℃

Ta=125℃

Maximum Output Voltage vs.Output Sink Current

V+/V-=30V/0V

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

0 50 100 150 200Output Sink Current [mA]

Max

imum

Out

put V

olta

ge [V

]

Ta=-40℃

Ta=25℃

Ta=85℃

Ta=125℃

Input Bias Current vs. TemperatureVICM=0V

1p

10p

100p

1n

10n

100n


Inpu

t Bia

s C

urre

nt [A

]

V+/V-=±15V

V+/V-=±6V

Input Offset Current vs. TemperatureVICM=0V

1p

10p

100p

1n

10n


Inpu

t Offs

et C

urre

nt [A

]

V+/V-=±15V

V+/V-=±6V

Pulse ResponseV+/V-±6V, VIN4VP-P, f=100kHz

PulseEdge=10nsec, Gv=0dB, CL=10p, RL=10k

-4

-2

0

2

4

6

8

10

12

-1 0 1 2 3 4 5 6 7 8 9Time [usec]

Inpu

t Vol

tage

[V]

-12

-10

-8

-6

-4

-2

0

2

4

Out

put V

olta

ge [V

]

Input Voltage

Ta=125ºC

Ta=85ºCTa=25ºC

Ta=-40ºC

0

2

4

0

2

4

Output Voltage

Pulse ResponseV+/V-±15V, VIN4VP-P, f=100kHz


-4

-2

0

2

4

6

8

10

12

-1 0 1 2 3 4 5 6 7 8 9Time [usec]

Out

put V

olta

ge [V

]

-12

-10

-8

-6

-4

-2

0

2

4

Inpu

t Vol

tage

[V]

Input Voltage

125ºC

85ºC

Ta=25ºC

-40ºC

0

2

4

0

2

4

Output Voltage

NJU77903

- 9 - Ver.02

Voltage Gain vs. TemperatureV+/V-=±6V, VO=-5V to 5V, RL=10kΩ

0

20

40

60

80

100

120

140

160


Volta

ge G

ain

[dB

]

Voltage Gain vs. TemperatureV+/V-=±15V, VO=-14V to 14V, RL=10kΩ

0

20

40

60

80

100

120

140

160


Volta

ge G

ain

[dB

]

Equivalent Input Noise Voltagevs. Frequency

RF=2KΩ, RG=20Ω, Ta=25ºC

1

10

100

1000

10000

1 10 100 1k 10k 100kFrequency [Hz]

V+/V-=30V/0V

V+/V-=12V/0V

Equi

vale

nt In

put N

oise

Vol

tage

[nV/

√H

z]

Slew Rate vs. TemperatureV+/V-±6V, VIN4VP-P, f=100kHz


0

1

2

3

4

5

6


Slew

Rat

e [V

/ use

c]

Rise

Fall

Slew Rate vs. TemperatureV+/V-±15V, VIN4VP-P, f=100kHz


0

1

2

3

4

5

6


Slew

Rat

e [V

/ use

c]

Rise

Fall

NJU77903

- 10 - Ver.02

Voltage Gain/Phase vs. FrequencyV+/V-=±6V, Gv=20dB, VIN=-30dBm, RL=10kΩ, CL=10pF

-40

-30

-20

-10

0

10

20

30

40

1k 10k 100k 1M 10M 100MFrequency [Hz]

Volta

ge G

ain

[dB

]

-180

-135

-90

-45

0

45

90

135

180

Phas

e [d

eg]

-40℃ 25℃

85℃ 125℃

Gain

Phase

Voltage Gain/Phase vs. FrequencyV+/V-=±15V, Gv=20dB, VIN=-30dBm, RL=10kΩ, CL=10pF

-40

-30

-20

-10

0

10

20

30

40

1k 10k 100k 1M 10M 100MFrequency [Hz]

Volta

ge G

ain

[dB

]

-180

-135

-90

-45

0

45

90

135

180

Phas

e [d

eg]

-40℃ 25℃

85℃ 125℃

Gain

Phase

Phase Margin vs. Load CapacitanceV+/V-=±6V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

0

10

20

30

40

50

60

70

80

90

10p 100p 1n 10nLoad Capacitance [F]

Phas

e M

argi

n [d

eg]

Ta=-40℃

Ta=25℃

Ta=125℃

Phase Margin vs. Load CapacitanceV+/V-=±15V, RL=10kΩ, VIN=-30dBm, Gv=20dB,

-10

0

10

20

30

40

50

60

70

80

90


Phas

e M

argi

n [d

eg]

Ta=-40℃

Ta=25℃

Ta=125℃

Unity Gain Frequency vs. Load CapacitanceV+/V-=±6V, RL=10kΩ, VIN=-30dBm, Gv=20dB

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-60 -30 0 30 60 90 120 150Ambient Temperature [ºC]

Uni

ty G

ain

Freq

uenc

y [M

Hz]

CL=1nFCL=10pF

CL=10nF

Unity Gain Frequency vs. Load CapacitanceV+/V-=±15V, RL=10kΩ, VIN=-30dBm, Gv=20dB

0.0

0.5

1.0

1.5

2.0

2.5

3.0


Uni

ty G

ain

Freq

uenc

y [M

Hz]

CL=1nFCL=10pF

CL=10nF

NJU77903

- 11 - Ver.02

Gain Margin vs. Load CapacitanceV+/V-=±6V, RL=10kΩ, VIN=-30dBm, Gv=20dB,

-10

-5

0

5

10

15

20

25

30

35

40


Gai

n M

argi

n [d

B]

Ta=-40℃

Ta=25℃

Ta=125℃

Gain Margin vs. Load CapacitanceV+/V-=±15V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

-5

0

5

10

15

20

25

30

35

40


Gai

n M

argi

n [d

B]

Ta=-40℃

Ta=25℃

Ta=125℃

Phase Margin vs. TemperatureV+/V-=±6V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

0

10

20

30

40

50

60

70

80

90


Phas

e M

argi

n [d

eg]

CL=1nF

CL=10pF

CL=10nF

Phase Margin vs. TemperatureV+/V-=±15V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

0

10

20

30

40

50

60

70

80

90


Phas

e M

argi

n [d

eg]

CL=1nF

CL=10pF

CL=10nF

Gain Margin vs.TemperatureV+/V-=±6V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

0

10

20

30

40

50


Gai

n M

argi

n [d

B]

CL=10nF

CL=1nF

CL=10pF

Gain Margin vs. TemperatureV+/V-=±15V, RL=10kΩ, VIN=-30dBm, Gv=20dB

-10

0

10

20

30

40

50


Gai

n M

argi

n [d

B]

CL=10nF

CL=1nFCL=10pF

NJU77903

- 12 - Ver.02

THD + Noise vs. Output Voltage V+/V-=±15V, GV=20dB, RF=9.1kΩ, RS=1kΩ, Ta=25ºC

0.001

0.01

0.1

1

10

0.1 1 10 100Output Voltage [Vpp]

f=100Hz

f=1kHz

f=10kHz

Tota

l Har

mon

ic D

isto

rtio

n +N

oise

[%]

THD + Noise vs. Output VoltageV+/V-=±6V, GV=20dB, RF=9.1kΩ, RS=1kΩ, Ta=25ºC

0.001

0.01

0.1

1

10

100

0.1 1 10 100Output Voltage [Vpp]

f=100Hz

f=1kHz

f=10kHz

Tota

l Har

mon

ic D

isto

rtio

n +N

oise

[%]

Thermal Shutdown Temperaturevs. Supply Voltage

V-=0V

100

120

140

160

180

200

220


Junc

tion

Tem

pera

ture

[ºC

] Thermal ShutdownTemperature

Recoverytemperature

THD + Noise vs. Output PowerV+/V-=±6V, GV=20dB, RF=9.1kΩ, RS=1kΩ, Ta=25ºC

0.001

0.01

0.1

1

10

0.01 0.1 1 10Output Power [mW]

f=100Hz

f=1kHz

f=10kHz

Tota

l Har

mon

ic D

isto

rtio

n +N

oise

[%]

THD + Noise vs. Output PowerV+/V-=±15V, GV=20dB, RF=9.1kΩ, RS=1kΩ, Ta=25ºC

0.001

0.01

0.1

1

10

0.01 0.1 1 10 100Output Power [mW]

f=100Hzf=1kHz

f=10kHz

Tota

l Har

mon

ic D

isto

rtio

n +N

oise

[%]

NJU77903

- 13 - Ver.02

Output Source Current Limitvs. TemperatureV+/V-=12V/0V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ourc

e C

urre

nt L

imit

[mA

]

Output Sink Current Limitvs. TemperatureV+/V-=12V/0V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ink

Cur

rent

Lim

it [m

A]

Output Source Current Limitvs. Supply Voltage

Ta=25ºC, RL=1Ω,V-=0V

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ourc

e C

urre

nt L

imit

[mA

]

Output Sink Current Limit vs.Supply Voltage

Ta=25ºC, RL=1Ω, V-=0V

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ink

Cur

rent

Lim

it [m

A]

Output Sink Current Limitvs. TemperatureV+/V-=30V/0V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ink

Cur

rent

Lim

it [m

A]

Output Source Current Limitvs. TemperatureV+/V-=30V/0V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ourc

e C

urre

nt L

imit

[mA

]

NJU77903

- 14 - Ver.02

Output Source Current Limit vs. Current Limit Trim Resistance

V+/V-=30V/0V, Ta=25ºC, RL=1Ω

0

50

100

150

200

250

300

350

400

450

0 20 40 60 80 100Trim Resistance [kΩ]

Out

put S

ourc

e C

urre

nt L

imit

[mA

]

1

2

3

4 5

6

7

8

INM INP

NCV+

OUTLIM1

LIM2V-

Output Sink Current Limit vs. Current Limit Trim Resistance

V+/V-=30V/0V, Ta=25ºC, RL=1Ω

0

50

100

150

200

250

300

350

400


Out

put S

ink

Cur

rent

Lim

it [m

A]

1

2

3

4 5

6

7

8

INM INP

NC V+

OUT LIM1

LIM2V-

Output Source Current Limit vs. Current Limit Trim Resistance

V+/V-=12V/0V, Ta=25ºC, RL=1Ω

0

50

100

150

200

250

300

350

400


Out

put S

ourc

e C

urre

nt L

imit

[mA

]

1

2

3

4 5

6

7

8

INM INP

NCV+

OUTLIM1

LIM2V-

Output Sink Current Limit vs. Current Limit Trim Resistance

V+/V-=12V/0V, Ta=25ºC, RL=1Ω

0

50

100

150

200

250

300

350

400

450


Out

put S

ink

Cur

rent

Lim

it [m

A]

1

2

3

4 5

6

7

8

INM INP

NC V+

OUT LIM1

LIM2V-

NJU77903

- 15 - Ver.02

■Application Note The NJU77903 is CMOS operational amplifier that combines rail−to−rail input and output with operating up to 36V. It is able to

output high current without the power booster. Therefore, the NJU77903 is suitable for the application requires high operating voltage and high output current.

This application note is one of effectual measures for understanding the dissipation power, thermal shutdown and behavior of current limit, to avoiding unexpected trebles. This application note consists of following matter.

1. Calculation of dissipation power 2. Thermal shutdown 3. Current limit 4. Resolver Excitation Circuit 5. Input Overvoltage Protection This description does not assure the actual behavior. The performance of the NJU77903 should be conducted trials using

actual equipment.

NJU77903

- 16 - Ver.02

1. Calculation of dissipation power The dissipation power is determined by the type of loads. It in case of resistance load and inductance load are shown

respectively on this note. The symbols of supply voltage are defined as VDD and VSS instead of V+ and V-. 1.1 Calculation of dissipation power with resistance load

The dissipation power from the time 0 toπ and it fromπ to 2π are calculated separately.

■ t=0 to π Fig. 1.1 shows the internal current from 0 to π, Fig. 1.2 shows the Output current and the Output voltage from 0

to π. Io is the Output current and IA is the current with the exception of the Output current. The dissipation power from 0 toπis expressed by the following equation.

R

VRVVIVV

dRVVVIVV

dIVVIVVP

OODDASSDD

OODDASSDD

OODDASSDDR

22

sinsin1

sinsin1

2

0

01

　　

　　

Fig. 1.1 the internal current from 0 to π

VDD

VSS

R

IA IO

Fig. 1.2 the Output current and Voltage with resistance load

Vosinθ

π 2π0

IOsinθIO

-IO

VO

-VO

NJU77903

- 17 - Ver.02

■ t=π to 2π Fig. 1.3 shows the internal current from π to 2π, the dissipation power from π to 2π is expressed by the following

equation.

R

VRVVIVV

dRVVVIVV

dIVVIVVP

OOSSASSDD

OSSOASSDD

OSSOASSDDR

22

sinsin1

sinsin1

2

2

2

2

　　

　　

In the case of VDD = -VSS, the internal loss PR is the following result.

R

VRVVIVVP OODD

ASSDDR 22 2

■ example for use

The dissipation power is calculated on the following condition. Condition: VDD/VSS= +6V/-6V Vo=1Vpk R=20Ω（Io=1Vpk/20Ω=50mApk=100mApp） IA=1.5mA

mWVVVmAVV

RV

RVVIVVP OODD

ASSDDR

184202

120

1625.166

22

2

2

　　

On the single power supply operation (VDD/VSS= +12V/0V) with the load resistance(R=20Ωwhich is the middle point Voltage), the dissipation power is 187 mW. It is same as previous one.

Fig. 1.3 the internal current from π to 2π

VDD

VSS

R

IA

IO

Fig.1.4 the Output current and Voltage with resistance

Vosinθ

π 2π0

IOsinθIO

-IO

VO

-VO

NJU77903

- 18 - Ver.02

1.2 Calculation of dissipation power with inductance load The dissipation power from the time 0 toπ and it fromπ to 2π are calculated separately.

■t=0 to π Fig. 1.5 shows the internal current from 0 to πand Fig. 1.7 shows the

Output current and the Output Voltage from 0 to π. Since it is an inductance load, the Output Current and the Output Voltage make 90-degree phase difference. Io is the Output Current and IA is the current with the exception of the output current.

The loss by output current from 0 to π is expressed by the following equation.

2sin21sinsincos1 OOODDOODDLO IVIVIVVP

The loss by output current from 0 to π is expressed by the following equation.

ODDASSDD

OOODDASSDDL

IVIVV

dIVdIVIVVP

2

2sin211sin1

001

　　

■t=π to 2π

Fig. 1.6 shows the internal current from π to 2π.The loss by output current fromπ to 2π is expressed by the following equation.

2sin21sinsincos2 OOOeeOSSOLO IVIVIVVP

The Dissipation power from π to 2π is expressed by the following equation.

OSSASSDDOOOeeASSDDL

IVIVVdIVdIVIVVP 22sin211sin1 22

2 　

In the case of VDD=-VSS, the dissipation power is the following result.

ODDASSDDL

IVIVVP 2

Fig. 1.5 the internal current from 0 to π

VDD

VSS

L

IA IO

Fig.1.6 the internal current from π to 2π.

VDD

VSS

L

IA

IO

Fig.1.7 the Output current and Output Voltage with inductance load

IOsinθ

VOcosθ

π 2π0

IO

-IO

VO

-VO

NJU77903

- 19 - Ver.02

■ example for use The dissipation power is calculated on the following condition.

Condition: VDD/VSS= +6V/-6V Io=50mApk(100mApp)

IA=1.5mA

mWmAVmAVVIVIVVP ODDASSDDL 20950625.1662

On the Single power supply operation whose equivalent circuit is Fig1.8, the dissipation power is as follows. Condition: VDD/VSS= +12V/0V Io=50mApk(100mApp) IA=1.5mA

mWmAVmAVVIVIVVP ODDASSDDL 2095021225.1662

Fig1.9 is the supply-voltage dependency of the dissipation power on inductance load. The NJU77903 should be operated in lower than package power (PD).

Internal loss vs. Supply Voltageload inductance, IA=1.5mA

0

200

400

600

800

1000

1200

1400

0 5 10 15 20 25 30 35 40Supply Voltage [V]

Inte

rnal

loss

[m

W]

Io=200mApp

Io=150mApp

Io=100mApp

Io=50mApp

Fig1.9 the supply-voltage dependency of the dissipation power by inductance load. (Single−Supply)

Fig1.8. Equivalent circuit (Single Supply

VDD

L

VDD/2

VDD/2

-VDD/2

L

NJU77903

- 20 - Ver.02

1.3 the current with the exception of the Output current Fig1.10 shows the Evaluation circuit of the current with the exception of the Output current. This result shows Fig1.11 and

Fig1.12. Fig1.10 the current with the exception of the Output current

The current with the exception of the Outputcurrent vs.Supply Voltage

AV=0dB, RL=OPEN

0

1

2

3

4

5

6

0 5 10 15 20 25 30 35 40Supply Voltage [V]

The

curr

ent w

ith th

e ex

cept

ion

ofth

e O

utpu

t cur

rent

[mA

]

Ta=-40ºC

Ta=-55ºC

Ta=125ºCTa=85ºC

Ta=25ºC

Fig1.11 the current with the exception of the Output current vs. Supply Voltage

The current with the exception of the Outputcurrent vs. temperature

AV=0dB, RL=OPEN

0

1

2

3

4

5

6

-50 -25 0 25 50 75 100 125 150 temperature [ºC]

The

curr

ent w

ith th

e ex

cept

ion

ofth

e O

utpu

t cur

rent

[mA

]

V+=6.8V

V+=30VV+=12V

Fig1.12 the current with the exception of the Output current vs. temperature

VDD

VSS

IA

A

Open

NJU77903

- 21 - Ver.02

2. Thermal Shutdown The NJU77903 has thermal shutdown (TSD) function in case that dissipation power exceeds Package Power PD. Fig 2.1

shows Thermal Shutdown Temperature vs. Supply Voltage. When the junction temperature exceeds the shutdown temperature approximately 175°C on the Supply Voltage 12V, the TSD function operates and disables the output current. Under the TSD operation, the output terminal is regarded as high impedance terminal. If the output voltage is necessarily GND Voltage, the output terminal should be connected to GND via resistance. When the junction temperature cools to recovery temperature approximately 160°C on the Supply Voltage 12V, the NJU77903

automatically recover from the TSD operation and output current is re-enabled. The TSD function is not intended to replace proper heat sinking. The NJU77903 should be operated in lower than 150°C the maximum junction temperature.

Fig 2.1 Thermal Shutdown Temperature vs. Supply Voltage

Thermal Shutdown Temperaturevs. Supply Voltage

V-=0V

100

120

140

160

180

200

220


Junc

tion

Tem

pera

ture

[ºC

] Thermal ShutdownTemperature

Recoverytemperature

NJU77903

- 22 - Ver.02

3. Current Limit The NJU77903 is designed with internal current limit in case of overload condition. Fig. 3.1 shows the Output Source Current

Limit vs. temperature and Fig. 3.2 shows the Output Sink Current Limit vs. temperature respectively. With the increasing in temperature, the limits are reduced.

Fig. 3.3 shows Output Source Current vs. time. Output Source Current Limit decreases gradually since junction temperature

rises. The output current is temporarily disabled due to TSD operation in Ta=160°C line of Fig. 3.3 (time = 55msec to 75msec). When the junction temperature falls, the output current is automatically recovered (time = 75msec). In order to prevent from damage the NJU77903 should be running under maximum junction temperature.

Fig3.1 Output Source Current Limit vs. temperature

Output Source Current Limit vs. TemperatureVDD=12V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ourc

e C

urre

nt L

imit

[mA

]

Output Sink Current Limit vs. TemperatureVDD=12V, RL=1Ω

0

100

200

300

400

500

600

700

800

900

1000


Out

put S

ink

Cur

rent

Lim

it [m

A]

Fig3.2 Output Sink Current Limit vs. temperature

Fig3.3 Output Source Current Limit vs. Time

Output Source Current vs. timeVDD=12V, RL=1Ω

0

50

100

150

200

250

300

350

400

450

500

-25 0 25 50 75 100 125 150time [msec]

Out

put S

ourc

e C

urre

nt [

mA

]

Ta=25℃Ta=85℃

Ta=125℃Ta=150℃

ThermalShutdown

ThermalShutdown

NJU77903

- 23 - Ver.02

4. Resolver Excitation Circuit Fig4.1 shows the Typical Resolver Excitation Circuit using the NJU77903 and the NJM2904. The NJM2904 (A) makes

midpoint voltage and the NJM2904 (B) makes signal phase inversion. Fig4.2 is the circuit without NJM2904 (A), its dominant voltage is given by resistance voltage divider. Fig4.3 is the circuit omitted NJM2904 (A) and NJM2904 (B), it is available under the condition using the input signals which have phase difference one another. Fig 4.4 shows output voltage and current. The output voltage (Vout) is the voltage drop on the inductance load, the output current (Iout) is defined as positive side according Fig 4.4. The inductance load makes phase difference between Vout and Iout. However, it is not just 90° because of internal resistance on inductance. The performance of resolver excitation should be conducted trials using actual equipment.

Fig4.1 Resolver Excitation Circuit Fig4.2 Resolver Excitation Circuit （This version omitted NJM2904(A)）

Fig4.3 Resolver Excitation Circuit （This version omitted NJM2904）

Vout

Iout

NJU77903

NJU77903NJM2904

AC

Vout

Iout

NJU77903

NJU77903

AC1

AC2

Vout

Iout

NJU77903

NJU77903

NJM2904(A)

NJM2904(B)

AC

DC

NJU77903

- 24 - Ver.02

Fig 4.4 Output Voltage and Output Current of Resolver Excitation Circuit

Output VoltageV+/V-=12V/0V, Freq=10kHz

-5

-4

-3

-2

-1

0

1

2

3

4

5

0 0.05 0.1 0.15 0.2time [msec]

Out

put V

olta

ge V

out [

V]

-40℃

25℃

125℃

Output CurrentV+/V-=12V/0V, Freq=10kHz

-80

-60

-40

-20

0

20

40

60

80

0 0.05 0.1 0.15 0.2time [msec]

Out

put C

urre

nt Io

ut [m

A]

-40℃

25℃

125℃

NJU77903

- 25 - Ver.02

5．Input Overvoltage Protection If the input voltage exceeds the supply rail, You must use a limiting resistor as shown in Fig5.1, because you must be limited

to less than the input current of absolute maximum ratings. Resistance value of the current limiting and can be calculated by the following equation.

IIN = ≦10mA, (VSIG≧V+) IIN = ≦10mA, (VSIG≦V-)

Fig5.1a Input Overvoltage (VSIG≧V+) Fig5.1b Input Overvoltage (VSIG≦V-)

VSIG － V+ RIN

V- － VSIG

RIN

V+

V-

VOUT

RIN

RIN

VSIG+

VSIG-

IIN

IIN

V+

V-

VOUT

RIN

RIN

VSIG+

VSIG-

IIN

IIN

NJU77903

- 26 - Ver.02

■ PACKAGE DIMENSIONS

6.54±0.19

5.34±0.12

6.04±

0.06

1.14±

0.13

0.52±0.06

0.52±0.06

5.34±0.12

MIN4.15

2.29±0.09

(4.8)

(2.5)

(1.4

)

(0.9

)

(1.7

)

0～0.25

0.51

1.27

0.5±0.12 2.5±

0.5

TO252−5

Unit：mm

NJU77903

- 27 - Ver.02

■ PACKAGE DIMENSIONS

[CAUTION] The specifications on this databook are only given for information ,

without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

Unit：mm

DFN8-W2 (ESON8-W2)

1.5

+0.0

6 -0

.04

0.01

+0.0

10

-0.0

08

3.0±0.05

3.0 ±

0.05

0.2 S

0.7±

0.05

0.325 0.3 AB M S

0.3 ±

0.05

0.65

B

A

S

S 0.05

2.3 +0.06-0.04

+0.06 -0.04 0.05

C0.5

3-R0.5

S A 0.10 M

S M

B

0.1

0

high output current, rail-to-rail input/output single cmos ... · high output current, rail-to-rail...

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