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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 1

Optical Spatial Quantization for HigherPerformance Analog-to-Digital Conversion

Mona Jarrahi, Student Member, IEEE, R. Fabian W. Pease, Fellow, IEEE,David A. B. Miller, Fellow, IEEE, and Thomas H. Lee, Member, IEEE

Abstract—A novel optical spatial quantized analog-to-digitalconversion scheme for real-time conversion at ultrahigh samplingfrequencies is presented. At each sampling instant, the analoginput voltage deflects an optical sampling pulse onto an arrayof photodetectors. The output code is derived from the outputvoltages of the photodetectors on which the optical beam lands.Particular benefits of the proposed architecture are significant re-duction in jitter through the use of a mode-locked laser to generatethe sampling pulses, high quantization bandwidth through a fullyoptical quantization scheme, and the system simplicity through theuse of just one phase modulator and an embedded binary encoderin the binary-connected photodetector arrays. We experimentallydemonstrate an eight-level quantization consuming only 7.2 pJ perquantization with 18-GHz bandwidth, projected to an estimatedbandwidth of 30 GHz. Measured 8-ps full-width half-maximumphotodetector output voltages promise the potential of realizing a3-bit 125-GS/s analog-to-digital converter.

Index Terms—Analog-to-digital conversion, mode-locked lasers,optical sampling, phase modulation, photodetector.

I. INTRODUCTION

A CHIEVING THE high sampling rates required for directconversion of wideband analog electrical signals to dig-

ital remains at the heart of the trend towards maximally digitalelectronic systems. With rapidly increasing signal bandwidthscomes a corresponding need for higher speed analog-to-digitalconversion [1], [2].

There has been a tremendous amount of work on analog-to-digital converters (ADCs) operating at gigasamples to tens ofgigasamples per second sampling rates, with large input band-widths and moderate resolutions. This type of high-speed ADCis of particular interest for test and measurement equipment[3]–[6], optical communications [7], and wireless communica-tions such as digital receivers [8], [9] software radio [10], andwideband radar [11].

Optical techniques are believed to have a great potential forrealizing high-speed ADCs thanks to the large bandwidth of

Manuscript received November 15, 2007; revised May 8, 2008. This workwas supported by the Stanford University Center for Integrated Systems, TexasInstruments Incorporated, and Agilent Technologies.

M. Jarrahi is with the Stanford Microwave Integrated Circuits Laboratory, De-partment of Electrical Engineering, Stanford University, Stanford, CA 94305-4070 USA (e-mail: [email protected]).

R. F. W. Pease, D. A. B. Miller, and T. H. Lee are with the Elec-trical Engineering Department, Stanford University, Stanford, CA 94305-4070 USA (e-mail: [email protected]; [email protected];[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TMTT.2008.2002230

optical modulators and low-jitter ultra-high-speed samplingclocks offered by mode-locked lasers [12]. Equally significantis the ability to distribute optical clocks without a consequentincrease in amplitude and phase noise due to the robust natureof photons for transmitting information. A number of opticalanalog-to-digital conversion schemes have been proposed toovercome the limited sampling speed of electronic ADCs.Many of the proposed optical ADCs employ optical samplingto overcome the timing jitter limitation of electronic samplingcircuits, but use electronic ADCs for quantization [12]–[14].Optical time-stretch ADCs [15] are based on stretching thesignal in time prior to electronic digitization. Another cate-gory of optical ADCs employs optical quantization by usingoptical modulators [16]–[21]. Among this category are theinterferometric ADCs, first proposed by Taylor [22], which usean array of phase modulators with geometrically increasinglengths. Although the first generation of these ADCs were notpractically feasible due to multiple-modulator mismatches andlarge device sizes, the follow-up work [23] using one phasemodulator with binary encoding shows a great potential forachieving high-speed analog-to-digital conversion.

Here, we analyze the operation of an optical spatial quantizedADC based on the interferometric analog-to-digital conversionscheme (first proposed in [24]). We explain that the proposedarchitecture not only benefits from the low-jitter high-speed op-tical sampling clocks and the large bandwidth of the opticalphase modulators, but, in contrast to other interferometric tech-niques, it also takes advantage of a fully differential binary en-coder embedded in the binary-connected photodetectors to di-rectly resolve the ADC output bits. We experimentally demon-strate an eight-level quantization consuming only 7.2 pJ perquantization operation over an 18-GHz bandwidth. Measured8-ps full-width half-maximum (FWHM) photodetector outputvoltages promise the realization of a 3-bit 125-GS/s ADC withthis architecture.

II. OVERVIEW OF THE OPTICAL SPATIAL QUANTIZED ADC

The architecture of the proposed ADC system is shown inFig. 1. An optical input from a mode-locked laser is first coupledinto an input waveguide. The optical pulse then splits and propa-gates down two waveguide branches as part of a Mach–Zehnderinterferometer. A phase modulator is integrated in one of thebranches to vary the phase of the optical pulses according to

, the analog electrical signal to be digitized. A fully differ-ential implementation could be achieved by applying a differ-ential signal to both branches. After passing through the halfMach–Zehnder interferometer, the optical beams from the two

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2 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES

Fig. 1. Schematic of the optical spatial quantized ADC system.

branches enter a slab waveguide region, which allows free prop-agation in the lateral direction and then diverge and interfere.The resulting interference pattern from the two optical pulsesforms a spot on an effective image plane, a spot whose posi-tion is proportional to the phase difference between the two op-tical pulses. In effect, the combination of the phase modulatorand the free-propagation region together constitute an imagingbeam-deflection system whose deflection is determined by thephase difference between the two optical pulses entering thefree-propagation region and, more specifically, by the modu-lating electrical signal.

Integrating photodetector arrays inside the output waveguidesat appropriate positions along the image plane enables mea-surement of the spatial distribution of optical power. Therefore,the number of output waveguides determines the total numberof resolvable quantization levels. The ADC output quantizationlevels, specified by , are resolved by con-necting the photodetector arrays in a binary fashion, where isthe ADC resolution.

Using the 2-D beam propagation simulation package BEAM-PROP [25], we modeled the optical intensity variations on theimage plane as a function of the modulator phase shift providedby the analog electronic signal. Simulation results, illustrated inFig. 2, show a 6 deflection angle of the resulting interferencepattern within the phase shift, while using a 700- m-wide350- m-long free propagation region.

We use Fraunhofer diffraction theory to further analyzethe beam-deflection operation in the discussed architecture.According to Fraunhofer diffraction theory [26], the opticalpattern on the image plane would be the Fourier transform ofthe optical pattern entering the free propagation region scaledby a factor. This theory is valid if the image plane is in thefar field of the two optical beams entering the free propagationregion

(1)

where is the optical wavelength, is the length of the freepropagation region, and is the spacing between two input

Fig. 2. Optical intensity variations on the image plane as a function of the mod-ulator phase shift.

Fig. 3. Optical intensity on the effective image plane after introducing a phaseshift between optical pulses entering the free propagation region.

waveguides. The intensity of the resulting optical pattern on theimage plane is calculated as

(2)

where is the phase shift induced by the phase modulator,is the optical mode size in the input waveguide (assuming a

circular optical mode shape), is the optical clock power, andis the position on the image plane. The resulting optical peak

on the image plane (Fig. 3) is deflected uniformly byover an induced phase shift of .

In order to resolve output bits, the full deflection range onthe image plane is divided between output waveguides, where

. The optical power coupled to the th output waveguideis given by

(3)


JARRAHI et al.: OPTICAL SPATIAL QUANTIZATION FOR HIGHER PERFORMANCE ANALOG-TO-DIGITAL CONVERSION 3

where

Since the photodetector arrays integrated in the output waveg-uides are connected in a binary fashion, the differential outputvoltage representing the th output bit, , is calculated as

(4)

where is the photodetector responsivity, is the photode-tector resistance, is half of the clock period, and is thetime constant of the photodetector.

The resulting voltage for each output bit would be a sinusoidalsignal. By using linear photodetectors, we cannot get more thanone period of the sinusoidal signal per phase modulation.However, by employing nonlinear photodetectors, it would bepossible to get a periodic output voltage with up to periodsper phase modulation for the th output bit. Therefore, thebinary-connected nonlinear photodetectors can also perform thebinary encoding (positive and negative output voltages representdigital “1” and “0,” respectively).

By employing this encoding technique, we can increase theADC resolution without having to use a large number of phasemodulators or photodetectors. By accurately designing the pho-todetector arrays and their nonlinearity, it would also be possibleto get more square (rather than sinusoidal) output bit voltagesover the induced phase modulation. Moreover, the differentialencoding scheme implies a small sensitivity of the ADC outputto the laser power fluctuations. In this study, we operate the pho-todetectors in the saturation regime to take advantage of theirnonlinear characteristics.

III. OPTICAL SPATIAL QUANTIZED ADC PERFORMANCE

The bandwidth of the optical spatial quantized ADC is deter-mined by the bandwidth of the beam deflector, or more specifi-cally, by the phase modulator bandwidth. The optical phase shiftintroduced by a traveling-wave phase modulator is given by

(5)

where is the phase modulation efficiency in degreesmm , is the modulating electric voltage, is

the length of the modulator, is the phase settling timeof the modulator, and is the microwave attenuation.

In order to keep the maximum ADC error to 0.5 LSB

(6)

where is the phase shift deviation from ideal case (nomicrowave loss and speed limitation), and is the re-quired phase shift for resolving the LSB bit. Therefore,

(7)

For a Nyquist rate ADC, (7) should be evaluated for, where and are the ADC sampling fre-

quency and bandwidth, respectively. To a first order of approx-imation, the microwave losses of the analog electrical signalalong the phase modulator can be neglected, simplifying thelimitation to

(8)

The computed ADC bandwidth will diminish further whenmicrowave losses of the phase modulating electrical signal areincluded. Skin effect and field coupling to the substrate increasethe microwave loss dramatically at high frequencies [27]. Thecollective effect of all such loss mechanisms ultimately boundsthe useful operational bandwidth for a desired ADC resolution.The effect of microwave loss can be reduced by increasing thephase modulation efficiency to allow the use of a shorter phasemodulator.

As modulation techniques keep improving, higher phasemodulation efficiencies and smaller phase modulation settlingtimes are achieved. State-of-the-art phase modulation settlingtimes can be on the order of few picoseconds, making itpossible to achieve high conversion bandwidths through thisarchitecture.

Equation (8) shows the tradeoff between the ADC resolu-tion and bandwidth using the optical spatial quantized scheme.Other ADC resolution limiting factors are phase modulator non-linearity, photodetector mismatches, waveguide misalignments,and crosstalk between the output waveguide channels.

Noise is another important factor limiting the ADC resolu-tion. The noise sources contributing to the signal-to-noise ratiodegradation in the optical spatial quantized ADC are the opticalshot noise in output photodetectors, thermal noise in the termi-nation resistance and output photodetectors, and a backgroundnoise resulting from optical reflections at device boundaries. Itshould be mentioned that the mode-locked laser noise effect isneglected, due to the fully differential detection architecture.

In contrast to conventional ADC schemes, the optical clockpower directly affects the ADC output voltages in the opticalspatial quantized scheme (3), (4). This indicates a great poten-tial for increasing the ADC signal-to-noise ratio, and ADC res-olution, by increasing the optical clock power.

IV. PHASE MODULATOR DESIGN AND MEASUREMENT RESULTS

The phase modulation mechanism is based on the quantum-confined Stark effect, in which an applied perpendicular electricfield induces a shift in the absorption spectrum, and an accom-panying shift in the refractive index of a multiple quantum wellstructure [28].

In this study, multiple quantum well layers are designed asintegral parts of the intrinsic region of a p-i-n diode integratedinside the optical waveguide, which is designed for single trans-verse mode operation for wavelengths longer than 860 nm. Thephase-modulating electric signal, which in combination withthe substrate bias generates the electric field across the mul-tiple quantum well layers, propagates on a coplanar waveguide



Fig. 4. Schematic of the traveling wave phase modulator.

(CPW) along the optical waveguide. Traveling wave phase mod-ulation allows a long modulation path while maintaining a smalljunction area [29], [30]. Consequently, the bandwidth-efficiencytradeoff is reduced and higher modulation bandwidth and effi-ciency are achieved at the same time.

The schematic structure of the traveling wave phase mod-ulator is shown in Fig. 4. Light is launched into the opticalwaveguide formed in the junction of a p-i-n diode. The epi-taxial layers grown on a semiinsulating GaAs substrate con-sist of a 0.1- m-thin layer of multiple quantum wells sand-wiched between two nominally undoped Al Ga As layersof 0.4- m thickness forming the intrinsic region of a p-i-n diode.A 1- m-thick, p cm Be Al Ga As layer fol-lowed by a 1- m-thick p cm C Al Ga Aslayer, and a 2- m-thick n cm Si Al Ga Asserve as upper and lower cladding layers, respectively.

GaAs/AlGaAs p-i-n layers are grown by molecular beam epi-taxy on a semiinsulating GaAs substrate. The 2- m-wideridge waveguides are defined by Cl reactive ion etching.Au/Ni/Ge/Au n-contact metal region with a total thicknessof approximately 0.5 m formed by standard liftoff and thenrapid-thermal annealed at 415 C for 30 s. A benzocyclobutenelayer was spun on the device and etched back up to the top ofthe waveguide for planarization of the etched surface such thatthe microwave CPW lines can be placed on top. A Ti/Pt/Auevaporation and liftoff step forms the metallization of the CPWand the p-type metal contact.

The CPW metal electrode structure comprised of metal ontop of the optical waveguide and ground planes to either side isdesigned to have a characteristic impedance of 50 and a prop-agation constant that allows the phase modulating electric signal

to travel in phase synchronism with the light. The CPW complexcharacteristic impedance and the complex prop-agation constant can be determined knowing thetransmission line impedance per unit length and admittanceper unit length . The line impedance per unit length is char-acterized by a conventional CPW inductance and resistance perunit length. The line parallel-plate capacitance and the wave-guide diode depletion region capacitance (operated in reversebias), together with a series resistance modeling the semicon-ductor losses associated with transverse current flow, representthe line admittance per unit length. The 50- CPW terminationis fabricated using a part of the waveguide semiconductor.

The phase settling time of the modulator is given by[30]

(9)

where is the depletion region depth, is the length of thephase modulator, is the carrier average drift velocity acrossthe depletion region, is the p-i-n diode contact resistivity, and

and are the velocities of the optical wave and the mi-crowave, respectively.

CPW scattering parameters of a 1-mm-long phase modulatorand the extracted characteristic impedance and propagationconstant are shown in Fig. 5. The extracted characteristicimpedance is quite close to 50 , and remains within a 6%deviation throughout the measurement range. This impedancelevel allows the modulator input/output to be connected easilyto conventional 50- RF systems. The satisfactory agreementbetween the experimental microwave velocity and the desiredoptical velocity of m/s assures less than a2% microwave-optical velocity mismatch for frequencies below50 GHz. The experimental RF attenuation is also shown inFig. 5. The device performance can be improved by increasingthe center strip width to reduce attenuation caused by metalmicrowave loss.

By calculating the CPW propagation constant from scatteringparameter measurements as a function of frequency, an electricfield settling time of 2.1 ps is estimated for a 1.5-mm-long phasemodulator. The expected operational bandwidth of the quanti-zation system utilizing this phase modulator is 30 GHz, wherethe microwave attenuation of the CPW is the primary band-width-limiting mechanism.

Fig. 6 shows the measured phase modulation charac-teristics at 870-nm wavelength. A relatively linear phasechange of 270 V mm and an optical loss of less than0.28 dBV mm are measured at 2.1-V reverse bias voltage.Using a 1.5-mm active region phase modulator, we measureda phase shift over a 450-mV analog input signal voltagerange.

V. PHOTODETECTOR DESIGN AND MEASUREMENT RESULTS

Each photodetector comprises p-i-n diodes monolithicallyfabricated along the output waveguides. It consists of an activeregion terminated in 50 through 6- m metal spacing oneither side. The generated photocurrent along the active regionis a function of the multiple quantum well reverse bias set bythe substrate voltage. The simulation results suggest an optical



Fig. 5. CPW characteristics calculated from CPW scattering parameters.

Fig. 6. Traveling wave phase modulator phase/amplitude modulationcharacteristics.

absorption coefficient of 1.5 mm along the photodetectorunder 6-V reverse bias. The combination of the 0.218-fF mparasitic capacitance along the photodetector and the 50-termination resistance implies an FWHM output pulse width of5.5 ps for a 400- m photodetector.

The response of the 400- m photodetector to a 150-fs inputpulse is 8-ps FWHM at 6-V reverse bias [see Fig. 7(a)]. Thisindicates the capability of the photodetector to detect an opticalpulse train at 125 GHz. The side peak in the photodetector re-sponse in Fig. 7(a) is due to multiple reflections in the free prop-agation region and the output waveguide boundaries, degradingthe ADC signal-to-noise ratio at high sampling rates. These re-flections can be prevented by covering the structure with an an-tireflection coating such as a silicon–nitride film.

The responsivity of the 400- m photodetector is calculatedby measuring the photodetector output voltage versus the inci-dent optical pulse energy [see Fig. 7(b)]. While the photode-tector saturates at an incident pulse energy of 330 fJ, a respon-sivity of 3.2 10 A/W is calculated at small incident pulseenergy levels. As mentioned before, the photodetectors are oper-ated around the nonlinear (saturation) regime in order to achieve

Fig. 7. (a) Response of a 400-�m photodetector to a 150-fs input pulse, mea-sured by pump-probe electrooptic (EO) sampling technique [31] using an exci-tation from a mode-locked Ti : sapphire laser. (b) Output voltage of the 400-�mphotodetector versus the incident optical pulse energy.

Fig. 8. (a) Die micrograph of the fabricated ADC. (b) Resolved quantizationlevels as a function of the analog input voltage.

a binary encoding through the binary-connected photodetectorarrays.

VI. EXPERIMENTAL RESULTS ON THE FABRICATED ADC

A die micrograph of the fabricated ADC is shown in Fig. 8(a).The phase modulator is 1.5-mm long and the free propagationregion is 350- m long. Lengths of 50, 150, and 400 m arechosen for the first, second, and third bit photodetector arrays,respectively. Different photodetector lengths are to compensatefor the voltage amplitude reduction at higher bit levels. The150-fs optical sampling pulses from a Ti-sapphire mode-lockedlaser operating at 870 nm are coupled into the input waveguideby using a lensed fiber and fiber collimators.

The location of the output optical peak is determined by mon-itoring the output voltage of the arrayed photodetectors. Sincethe output photodetectors are connected in a binary fashion, theADC digital output code will be determined according to thepolarity of , , and voltages. The resolved pho-todetector outputs and the resolved quantization levels within

100-mV analog input voltage range and an input energy of2 pJ per optical pulse are shown in Fig. 8(b). By accuratelydesigning the photodetector arrays and their nonlinearity, wewould be able to achieve output voltages with steeper zero-



Fig. 9. (a) Integral nonlinearity (INL) and differential nonlinearity (DNL).(b) Measured fast Fourier transform (FFT) spectrum for f = 80 MS/s.

crossings (closer to a square shape rather than a sinusoidal).Depending on the digital technology, we can adjust the opticalpulse energy or utilize high gain stages prior to digital circuitsto match the output voltage with the technology logic levels.

The linearity of the ADC is characterized by measuring thedifferential nonlinearity and integral nonlinearity during dc op-eration of the ADC. The static nonlinearity error of less than0.2 LSB is calculated [see Fig. 9(a)]. The main source of non-linearity is the interferometric quantization technique and thephase modulation nonlinearity with respect to the modulatingvoltage. In addition, optical loss in the phase modulator branchand all other sources of mismatch between the two arms of thehalf Mach–Zehnder interferometer increase nonlinearity.

To verify the quantization operation, the output voltage to a10- and 30-MHz analog signal is observed in the time domain ata mode-locked laser sampling clock frequency of MHz.The signal-to-noise plus distortion ratio (SNDR) is calculatedusing the corresponding spectral response [see Fig. 9(b)]. AnSNDR of 17.8 and 18.5 dB is obtained for an input signal fre-quency of MHz and MHz, respectively,which confirms an eight-level quantization operation at the sub-sequent frequencies. The limited repetition rate of the availablemode-locked laser prevented measuring SNDR at higher sam-pling rates. Due to this limitation, we used a new technique formeasuring the ADC bandwidth.

The ADC bandwidth is determined by measuring the cutofffrequency at which the ADC error exceeds 0.5 LSB. For thismeasurement, we monitor the ADC least significant bit output

to a 0.9-Vpp sinusoidal analog input voltage under lasercontinuous-wave operation. The expected output voltageand its subsequent frequency response at low frequencies andcutoff frequency are shown in Fig. 10(a) and (b). Cutoff fre-quency can be calculated by comparing the measured frequencyresponse of with theoretical expectations. The measuredfrequency response of at the analog input frequency of1 GHz is shown in Fig. 10(c). The response of was sat-isfactory up to an input signal frequency of 18 GHz , which wasthe upper frequency limit of the employed spectrum analyzer.

Fig. 10. V and its subsequent frequency response at: (a) low frequencies,and (b) cutoff frequency. (c) Measured frequency response of V to a 1-GHzanalog input.

This implies an ADC bandwidth of at least 18 GHz, projectedto an estimated bandwidth of 30 GHz.

Fig. 11 compares the number of quantized levels versus thepotential sampling frequency of the spatially quantized ADCprototype with other high-speed ADCs, mostly with flash,folded-flash, pipelined, and time-interleaved architectures. TheADCs in the survey are from over 220 converters reported at theIEEE Very Large Scale Integration (VLSI) Circuits Symposiumand the IEEE International Solid-State Circuit Conference, aswell as in the IEEE JOURNAL OF SOLID-STATE CIRCUITS from1997 to 2007.

Power consumption of the ADC is investigated by looking atthe quantization and sampling power consumptions separately.The spatial quantization power is supplied by the input analogsignal performing the phase modulation within the 0.45-Vvoltage range, corresponding to 4-mW maximum analog inputpower, eliminating any static power consumption. As men-tioned, the optical pulses from the mode-locked laser not onlyprovide the low jitter sampling clock, but are also recycledin the spatial quantizer to resolve the output bits. As a result,the input optical pulse power directly affects the amplitudeof the resolved bits and the quantization resolution. The totalenergy, including optical power for quantization operation andelectrical power dissipation in the photodetectors, is 7.2 pJ per



Fig. 11. Comparison between the number of quantized levels versus the po-tential sampling frequency of the optical spatial quantized prototype with otherhigh-speed ADCs in the literature.

quantization operation. It should be remembered that the calcu-lated energy consumption of 7.2 pJ per quantization operationdoes not include the power consumption of the comparatorstages, which might be required to generate the standard digitaloutput voltages.

VII. CONCLUSION

Optical spatial quantized analog-to-digital conversion is apromising scheme, which, in contrast to conventional ADCs,eliminates any intermediate sample-and-hold and quantizationcircuits by directly launching the optical sampling pulses atspatial positions corresponding to quantization levels, andwhich operates at a frequency limited by the mode-lockedlaser repetition rate. Particular benefits of the proposed ar-chitecture are significant reduction in jitter through the useof a mode-locked laser to generate the sampling pulses, highquantization bandwidth through a fully optical quantizationscheme, and lower power consumption by extracting someportions of the required power from the analog electrical signaland optical clock directly.

The experimental results of the optical spatial quantized ADCprototype demonstrate an eight-level quantization consumingonly 7.2 pJ per quantization with 18-GHz bandwidth, projectedto an estimated bandwidth of 30 GHz. Measured 8-ps FWHMphotodetector output voltages promise the potential of realizinga 3-bit 125-GS/s ADC. Current design requires additional com-parator stages to resolve the ADC output bits with the tech-nology logic levels. However, the system has the potential ofachieving logic level outputs directly by accurately setting thephotodetector nonlinearity in the embedded binary encoder.

This technique is of particular value for increasing theflexibility and capability of electronic systems by eliminatingmany performance-limiting components along the path to thedigital domain. Realization of some electronic systems, such asthe software radio, may become possible by utilizing such ananalog-to-digital conversion technique.

ACKNOWLEDGMENT

The authors wish to acknowledge Prof. Y. Nishi, StanfordUniversity Center for Integrated Systems, Stanford, CA. Theauthors extend special thanks to R. Aldana, and J. Stigwallfor discussions and contributions to this study, H. Chin andO. Fidaner for help with the measurement setup, and D. Mars,Agilent Technologies, Santa Clara, CA, for wafer growth.

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Mona Jarrahi (S’99) received the B.S. degree inelectrical engineering from the Sharif Universityof Technology, Tehran, Iran, in 2000, and the M.S.and Ph.D. degrees in electrical engineering fromStanford University, Stanford, CA, in 2003 and2007, respectively.

With Stanford University, she has been involved inthe investigation of optically assisted electronics formillimeter-wave applications. Her current researchinterests involve millimeter-wave/RF integratedcircuit, millimeter-wave/RF microelectromechanical

systems (MEMS), opto-electronics, and microwave photonics. Her graduatestudies were supported by numerous collaborators from industry; among themRobert Bosch, Texas Instruments Incorporated, and Agilent Technologies.

Dr. Jarrahi is a member of the Optical Society of America (OSA) and the In-ternational Society for Optical Engineering (SPIE). She was the recipient of theRobert Bosch FMA Fellowship. She was the recipient of the 2007 Best StudentPaper Award presented at the IEEE Microwave Theory and Techniques Society(IEEE MTT-S) International Microwave Symposium (IMS).

R. Fabian W. Pease (F’03) received the B.A., M.A.,and Ph.D. degrees from Cambridge University, Cam-bridge, U.K., in 1960, 1962, and 1964, respectively.

He is the William E. Ayer Professor of ElectricalEngineering with Stanford University, Stanford, CA.From 1964 to 1967, he was an Assistant Professorof electrical engineering with the University of Cal-ifornia at Berkeley. In 1967, he joined the technicalstaff of Bell Laboratories, where he initially involvedwith digital television and later led a group that devel-oped processes for electron-beam lithographic mask

manufacture, and demonstrated a pioneering large-scale integration (LSI) cir-cuit built with electron-beam lithography. Since 1978, he has been a Professorof electrical engineering with Stanford University. His group’s areas of researchinclude microfabrication and nanofabrication and their application to electronicand magnetic devices and structures. From 1996 to 1998, he was with the De-fense Advanced Research Projects Agency (DARPA), where he initiated pro-grams in advanced microelectronics and molecular-level printing. He has servedas a consultant to IBM, Xerox, Etec Systems, and Lawrence Livermore Labora-tories. He is on the Technical Advisory Boards of Ultratech Stepper, San Jose,CA, and Affymetrix, Santa Clara, CA. He has authored or coauthored over 200papers and has authored several book chapters.

Dr. Pease has served the IEEE in numerous capacities. He is a member ofthe National Academy of Engineering. He was the recipient of the first IEEEPaul Rappaport Award, the 2001 IEEE Cledo Brunetti Award, the Richard P.Feynman Prize for microfabrication, and a Title A Fellowship from Trinity Col-lege, Cambridge, U.K.

David A. B. Miller (M’84–SM’89–F’95) receivedthe B.Sc. degree from St. Andrews University, Fife,U.K., and the Ph.D. degree from Heriot-Watt Univer-sity, Edinburgh, U.K., in 1979.

From 1981 to 1996, he was a DepartmentHead with Bell Laboratories, Holmdel, NJ. In1987, he joined the Advanced Photonics ResearchDepartment, Bell Laboratories. He is currently theW. M. Keck Professor of Electrical Engineeringwith Stanford University, Stanford, CA, and theDirector of the Ginzton and Solid State and Pho-

tonics Laboratories, Stanford, CA. He has authored or coauthored over 200scientific papers. He holds over 55 patents. His research interests includequantum-well opto-electronic and nanophotonic physics and devices, andfundamental and applications of optics in information, sensing, switching, andprocessing.

Dr. Miller is a Fellow of the Royal Societies of London and Edinburgh, U.K.,the Optical Society of America (OSA), and the American Physical Society. Hehas served as a Board member for both the Optical Society of America (OSA)and the IEEE Lasers and Electro-Optics Society (LEOS), and in various othersociety and conference committees. He was president of the IEEE LEOS in1995. He was the recipient of the Adolph Lomb Medal and the R. W. WoodPrize presented by the OSA, the International Prize in Optics presented by theInternational Commission for Optics, and the IEEE Third Millennium Medal.He holds an honorary degree from Vrije Universiteit Brussel and Heriot-WattUniversity.

Thomas H. Lee (M’87) received the S.B., S.M.,and Sc.D. degrees in electrical engineering fromthe Massachusetts Institute of Technology (MIT),Cambridge, in 1983, 1985, and 1990, respectively.

In 1990, he joined Analog Devices, where he wasprimarily engaged in the design of high-speed clockrecovery devices. In 1992, he joined Rambus Inc.,Mountain View, CA, where he developed high-speedanalog circuitry for 500 MB/s CMOS dynamicrandom access memories (DRAMs). He has alsocontributed to the development of phase-locked

loops (PLLs) in the StrongARM, Alpha, and AMD K6/K7/K8 micropro-cessors. Since 1994, he has been a Professor of electrical engineering withStanford University, Stanford, CA, where his research focus has focused ongigahertz-speed wireline and wireless integrated circuits built in conventionalsilicon technologies, particularly CMOS. He cofounded Matrix Semicon-ductor. He authored The Design of CMOS Radio-Frequency Integrated Circuits(Cambridge Univ. Press), and Planar Microwave Engineering (CambridgeUniv. Press). He also coauthored four books on RF circuit design. He holds 35U.S. patents.

Dr. Lee is an IEEE Distinguished Lecturer of both the Solid-State Circuits So-ciety and the IEEE Microwave Theory and Techniques Society (IEEE MTT-S).He was the two-time recipient of the Best Paper Award presented at the Interna-tional Solid-State Circuits Conference. He was a corecipient of a Best StudentPaper Award presented at the International Solid-State Circuits Conference. Hewas the recipient of the Best Paper prize presented at the CICC. He was the re-cipient of a Packard Foundation Fellowship.


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