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Institutt for Informatikk IN5240 Fundamentals of RF Circuit Design Part 1 Sumit Bagga * and Dag T. Wisland ** * Staff IC Design Engineer, Novelda AS ** CTO, Novelda AS

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Page 1: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

IN5240 Fundamentals of RF Circuit Design

Part 1

Sumit Bagga* and Dag T. Wisland**

*Staff IC Design Engineer, Novelda AS**CTO, Novelda AS

Page 2: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Outline

• Wireless communication systems• Performance metrics of a wireless receiver• RF building blocks

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 3: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Wireless Communications System

• A communication system comprises a transmitter, a channel and a receiver– Analog building blocks in the receiver front-end

operate at RF frequencies and interface the channel to the receiver

– Digital circuitry is responsible for demodulation, and decoding

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 4: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Out of band blocker

Wanted signal

RF Band

Frequency

In-band blockers

RF Channel

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• Standards share spectrum resources– e.g., wideband transmissions (UWB) overlapping WLAN

• Blockers are sources of interference– Adjacent channel or standard in the receiver band à in-band– Out of band à blockers outside of standard

Page 5: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Channel or Band Selection at RF?

• Quality factor, ! ≝ ⁄$%& ', where $%& is the carrier frequency and B is the bandwidth

• GSM standard with RF carriers at 935-960 MHz – If channel select à ' is 200 kHz,

• ! is ⁄950 MHz 200 KHz = 4750– If band select à ' is 25 MHz

• ! is ⁄950 MHz 25 MHz = 380• Narrowband filter characteristics

– Very high ! (' << $%&) and tunability to select channels

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 6: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Receiver Goals

RF Signal conditioning• Filter in-and out-of band blockers• Amplify the wanted signal• Frequency translation

– Down-convert with low-IF, zero-IF, sub-sampling receivers

• Direct-RF sampling

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 7: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Receiver Blocks

RF signal conditioning is realized with active and passive blocks• Passives include switches, circulators, filters,

mixers, resonators • Actives include low-noise amplifiers (LNA),

mixers, local oscillator (LO), variable gain amplifier (VGA), channel select filter, analog-to-digital converter (ADC), and a digital signal processor (DSP)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 8: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Filter or LNA as 1st Receiver Block?

Interference rejection vs noise figure (NF)• Option 1: Passive filter

– ↑ Interferer rejection, but with ↑ insertion loss à ↑ NF

• Option 2: Low-noise amplifier – ↓ Noise figure, but receiver risks desensitization from

interferers

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 9: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

SAW Filter à Out of Band Blockers

• A non-tunable surface acoustic wave (SAW) filter with very high ! (in the hundreds) is generally the first (off-chip) block in the receiver chain – Electrical signal à acoustic wave by interdigital

transducers (IDT) on a piezoelectric substrate (e.g., quartz) à electrical signal

• Low form factor, low insertion loss, and high-frequency operation (typically 50 MHz to 5 GHz)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 10: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Modern RF Receiver

• Heterodyne: signal to low intermediate frequency (low-IF)• Homodyne : signal to dc (direct conversion or zero-IF)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Liscidini, ISSCC, 2015]

Page 11: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Receiver Architecture Trade-OffsArchitecture J L

Direct Conversion No off-chip IF filterSingle synthesizer

LO leakageLO pullingDC offset0/90º LO

Superheterodyne Low LO leakageWeak LO pulling

No 0/90º LO

Off-chip IF filterTwo synthesizers

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 12: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Performance Metrics of RF Receiver

• Gain• Matching• Noise• Distortion• Dynamic Range

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 13: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Noise Factor (F) and Noise Figure (NF)

• Noise factor, ! & noise figure (is ! in dB) ànoise added by the receiver, and is:

– ! = $%&'($%&)*+

= ⁄$'( %'(⁄$)*+ %)*+

= $'(%)*+-$'(%'(

= %)*+-%'(

• Power, . in dBm is 10 log ⁄(. 1 mW)IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Nin

SNRinGNin

SNRoutNout

Page 14: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Noise, SNRmin and Sensitivity

• Minimum input signal (!"#$") to generate an output signal with a specified signal-to-noise ratio (SNR)

• Product of SNRmin and mean noise power or noise floor (%&'(())– Minimum achievable noise at the input of the receiver

BNinNfloor

[PSD][Power]

Psens = SNRmin + Nfloor[Power]SNRmin

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 15: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Receiver Sensitivity Equations

• "#$%# = '()*+%(-./0 1 2)• Power spectral density (PSD), (+% is:

– 456 (-174 dBm/Hz at 290 oK)• Mean noise power of ‘ideal’ receiver is:

– 4568 and is typically -94 dBm for pulsed radar

• Mean noise power of ‘real’ receiver input, (9:;;< is:– 4568 1 =

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 16: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Low-IF to Direct-RF Receiver

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Direct RF conversion: From vision to reality, TI, 2005]

• "# = 2&'( (Nyquist)• Direct-RF sampling provides a higher level of integration

with fewer active chain components à lower power

Page 17: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Cascaded Noise Factor

Equivalent noise factor for IF-sampling and RF-sampling ADCs• Cascaded noise factor is:

– " = "$%& +()$*+,-$%&

+ (.*(+,-$%&/-)$*

+ ()01+,-$%&/-)$*/-.*(

• " of ADC is

– 10log ,888/9::;

</=>?+ 174 dBm − FGH)01 − 10log

(I;

Even with a higher conversion rate, lower FGH)01 and "Frequriements, an RF-sampling ADC vs IF-sampling ADC requires additional FE gain (in LNA) approximately equal to JKLM + JNKO + JPO" dB!

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 18: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Swept Threshold Principle

The input signal is compared with a threshold, and the resulting 1-bit quantized value is summed at each range bin to incrementally build the multi-bit frame.

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

ANDERSEN et al.: 118-mW PULSE-BASED RADAR SoC IN 55-nm CMOS FOR NON-CONTACT HUMAN VITAL SIGNS DETECTION 3423

Fig. 2. UWB radar waveform example, ZL = 100 !, VTX = 0.6 V, fc = 7.25 GHz, BW = 1.5 GHz, and PRF = 14 MHz. (a) Frequency-shifted Gaussianin time domain, both polarities. (b) Corresponding frequency spectrum after PRN pattern coding, with ETSI UWB regulatory mask, assuming 6-dBi antennagain.

Fig. 3. ST sampling principle.

reflectors close to the targets. The ST sampling introducesa tradeoff where the input range can be traded for sweeptimes and/or processing gain by adjusting the sweep limits.The sweep time is given by the total number of pulses npulsesand the PRF

tsweep = npulses

PRF. (3)

The SNR for an ideal pulse-based radar RX from a targetgiven its range R and radar cross section (RCS) σRCS is givenby the matched filter radar equation [26]

SNRideal = Pt · tp · npulses · G2 · σRCS · λ2

kB · T0 · F · (4π)3 · R4 (4)

where G is the antenna gain, λ is the wavelength, kB isBoltzmann’s constant, T0 is the temperature in Kelvin, F isthe RX noise factor, Pt is the transmitted pulse power, and tpis the pulse duration. The transmitted pulse is approximatedas a rectangular windowed pulse with length tp , such that theenergy of the pulse E p equals

E p = Pt · tp = V 2TX

2Z L· tp . (5)

In an ST-based pulse radar, (4) becomes

SNRST = Pt · tp · npulses · G2 · σRCS · λ2 · GST

kB · T0 · F · (4π)3 · R4 · n steps(6)

Page 19: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Direct-RF Wideband Receiver

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Andersen, JSSC, 2017]

• Differential RF-FE comprises HPF, LNA and 12x time-interleaved 1-bit quantization & sampling circuit

• DAC sets the quantization threshold

Page 20: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

FrequencyDC

FS (N)FS (N+1)FS

RF

IF

fIF

fIF FS/2

Sub-Sampling Receiver

• For !" ≥ 2%à down-convert RF to low-IF signal – '()**+ increasesby2' (' isthesub-samplingfactor)andphasenoiseincreasesby'C (outputofsampler)

• ⁄(2FGH+%) (' + 1) ≤ !" ≤ ⁄(2FGH−%) ',where' = 1,2,3, …

Vin Vout

FS ≥ 2B

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 21: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Receiver Overview

• One or more IF stages to relax the requirements of the ‘image’ rejection filter

• Image reject mixers with I&Q LO signals to eliminate band-pass filters (BPFs)

• Compromise à mixing with image filtering and image reject mixing

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 22: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Baseband to RF Wideband Transmitter

• Pulse generator (PG) generates a baseband pulse à up-converted “around” a carrier frequency with a local oscillator

• Pulse position modulation is applied to each pulse[Bagga, MTT, 2005]

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

PGZ0

Modulator

Page 23: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Digital RRC Pulse-to-RF Upconversion TX

• DAC derived RRC pulses are filtered w/ a 400 MHz 5th-order Gm-C filter• Passive mixer for upconversion and SE-DE class-A cascoded PA w/

resistive FB• Classical upconversion TX consumes 36.4 mW with swing of 0.72 Vpp

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Joo, ISSCC, 2010]

Page 24: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Direct-RF Transmitter

• Short time-duration and low peak power requirements of the waveform makes direct-RF a good candidate

• A time-domain, digital-intensive pulse generator is preferred à “digital-RF” for dynamic power

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Modulator PG PA

Page 25: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

All-Digital TX w/ Capacitively Coupled PAs

• 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers for dynamically switching signal up to 0.7 Vpp maximum drive strength

• 4-levels of pulse shaping for 15—20 dB of sidelobe rejection plus additional 12 dB of low frequency sidelobe rejection

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Mercier, RFIC 2008]

Page 26: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for InformatikkIN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• 7.29/8.748 GHz dual-band BPSK pseudo-differential DPG plus PA (switching)• Programmable PRI and 3 power levels with max. 6.4 dBm peak transmit

power

Direct-RF Synthesis Transmitter[Andersen, JSSC, 2017]

Page 27: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Impedance Matching

• LNA interacts with the antenna via a transmission line with a characteristic impedance, !"

• Maximum power absorption à antenna’s radiation resistance, #$ is matched to the !%& of the LNA

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Z0=(L/C)-1/2AntennaLNA

ZLNA=RS ZANT=RS

On/Off-Chip

Page 28: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Scattering Parameters

• Difficult to measure voltages/currents at RF àS-parameters w/ ‘power’ flow– "# = "%&,( − "*

• "%&,( = ,(-/801• Signal flow and Mason’s rule to calculate input

reflection, transducer gain of a two-port network

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

[Niknejad, EECS 242]

Page 29: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Return Loss and Mismatch Loss

• Absolute impedance !" + $"

• Reflection coefficient, Γ is ('()*),-.,

('-)*),-.,

– 01 is the source impedance

• Voltage standing wave ratio (VSWR) is 234254• Return loss (S11) is −20log(Γ)• Mismatch loss is −10(1 − Γ")

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 30: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Smith Chart − * is +11 !

Minimum requirement |+11| < -10 dB (90% power transfer) and preferably -20 dB (99% power transfer)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Constant resistance

Constant reactance

Page 31: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

L’s and C’s

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 32: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Amplifier Noise Factor

• Equivalent noise voltage, !"# = !% + '()%• For uncorrelated noise sources, !"#* = !%* + |'(|*)%*

• Noise factor, , = 1 + ./,12.3

= 1 + 4567

437

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

v2eq

Noiseless 2-portVs

Rs

Page 33: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Minimum Noise Factor –Noise Matching

• For the minimum noise factor, !"#$– ! = !"#$ + ()

*+|-. − -012| 3

• Source impedance, -. ≠ -012 à ! ↑ with 2 factors– Minimizing 6$ à ↓ noise match sensitivity

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 34: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Passive Input Termination

• Low-complexity and cheap• Neglecting the noise of the

transistor, the ! due to the input termination resistor, "# is:

– ! > 1 + ()*+(,+

– ! > 1 + -. ⁄01 23-. ⁄01 2,

= 1 + 2,23= 2

– ∵ "7≈ "#, i.e., 3 dB in 9!

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Rs

R1

RL

Page 35: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Active Input Termination

• Impedance seen at source of CG-stage is !

"#• Assume !

"# ≈ %&, thus,

• ( > 1 + ,-.,/.= 1 + 123456#

1237/=

1 + 89 ≈ 2

– ∵ for short channel device, 89 ≈ 2

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

RL

Rs

Page 36: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Noise Figure Common-Source Stage

• Noise at the output– "#$ = "&$ + "($ + (*+$ + *,$)./$

• Noise factor

– 0 = 1 + 234

254+ 6748694254+:4

= 1 + ;3;5+ ⁄= >;5+:

+ ?;5+:4 ;9

• If ./ ↑ gate resistance, A+ ↓– Two components à physical gate resistance (poly) and

induced channel resistance – Multi-finger layout à ↓ {A+ and junction capacitance}

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 37: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Intermodulation Distortion (IMD)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• Distortion à harmonic(s) generation • Blockers à intermodulation products (IMD) à ↓SNR

2 signals (!", !#) at input à !", !# + IMD products– Second order: !" − !#, !# − !", 2!", 2!#– Third order: 2!" − !#, 2!# − !", 3!", 3!#

Gf1

f2f1,f2+IMD

Page 38: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

IIP/OIP, IMD Products and P1dB

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• nth order intercept point, IP# = % + ∆()*+

– OIP3 = %/ + ((1*(234)6

– IIP3 = OIP3 − G– IIP3 = %9 + ((1*(234)

6• e.g., two 10 dBm tones à -20 dBm 3rd order IMD

products à IP3 = 10 + +<* *6<=*+ = 25 dBm

• 1 dB compression point (P1dB) is where the fundamental drops by 1 dB

Page 39: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

IP3 for Cascaded Stages

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• 3rd-order intercept point is:– "#$%& =

"()(*#$%*

+ "(,#$%)

+ "#$%,

– IIP3 = OIP3/(3"343&)• 2nd-order intercept point is:

– "#$%4 =

"()(*#$%*

+ "(,#$%)

+ "#$%,

– IIP2 = OIP2/(3"343&)

Page 40: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Spurious Free Dynamic Range (SFDR)

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• SFDR is difference in dB à power of the blocker (!") to sensitivity (!#$%#), when !" à IM3 = *+,--.– !#$%# = 0*123% + *+,--.

– IM3 = 3!" − 2IIP3 = *+,--.

• 09:1|<=>?@ABC=

D EEFGH=IJKKL

G

• SFDR =D EEFGH(HRST UVWXYZ[\]\RC^_`("))

G− 0*123%

Page 41: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Summary

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

• Receiver topologies and trade-offs• Impedance matching à reflection coefficient, !""• Interdependencies of noise figure, sensitivity

(minimum detectable signal), SNR and SFDR• Metrics P1dB, IIP2, IIP3 (TOI) to characterize

linearity

Page 42: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Key References

1. A. M. Niknejad, EECS 142 and 2422. A. Liscidini, “Fundamentals of Modern RF

Receivers,” ISSCC 20153. N. Andersen, “A 118-mW Pulse-Based Radar

SoC in 55-nm CMOS for Non-Contact Human Vital Signs Detection,” JSSC, 2017

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga

Page 43: IN5240 Fundamentals of RF Circuit Design Part 1 · All-Digital TX w/ Capacitively Coupled PAs • 3-stage DCO output is modulated via dual digital PAs comprising parallel drivers

Institutt for Informatikk

Homework L1. For each block in a receiver chain (i.e., RF filter,

LNA, mixer, channel select filter), find values for G, NF, and IIP3, such that the front-end realizes:– G > 90 dB, NF ≤ 3 dB, IIP3 > -15 dBm referred to 50 Ω– https://www.mathworks.com/help/rf/examples/finding-

cascaded-gain-noise-figure-and-ip3.html2. A pre-amplifier with an input impedance of 100 Ω is

placed after the 50 Ω input matched LNA. What is the noise figure of the pre-amplifier? Hint: calculate input referred noise power.

IN5240: Design of CMOS RF-Integrated Circuits, Dag T. Wisland and Sumit Bagga