L1 Board

CERN 3-June-2003

A. Bay UNI-Lausanne

RB1:10 MHz, VME I/F2 FADC channels

RB2:40 MHz, VME I/F4 FADC channels

RB3 (mother-board):40 MHz, LHCb DAQ I/F16 FADC channels

Final board:32 - 64 channels optical/analogue"Common L1" board CL1

~300CL1 boards needed

history RB

Motivations for CL1 Boundary conditions are in favour for a common L1: Data format after L0 similar for all sub-detectors. L1 functionalities similar for all sub-detectors.

Differences can be accommodated by specific FPGAs. 1.6 Gbits/s optical links to bring signal to barracks (except VeLo). TTC, ECS, DAQ interface in common. Interface to L1 interface not foreseen for all sub-detectors, but...

Pro: Minimize design effort.Maintenance and upgrade simplified.Cost decrease because more boards will be produced.

Con: Project needs the coordination of several groups.We might face scheduling problems. + Political, + cost, +...

a common scheme...input: optical or analogue

data/event synchronisation: external: GOL data valid,... internal: FEM

clock / L0 / L1: TTC

L1B: 58 kevents (52 ms)

enough calculation powerfor common mode correction,sparsification,...

New: L1 (DAQ) Interface will "pack" 16 (32) evts into "Super events" before sending to the ethernet switch.8 bits from TTC broadcast used to form IP address.

Across LHCb

subdetector N boards comments

VeLo 84 analogue input (64 channels/board) ST/TT 89 2x12 = 24 optical inputs/board OT 24 2x9 = 18 optical - high occupancy PileUp 4? RICH 18 PMTsCalo 22 (Cyril talk)? Calo trig. 5 Mu 7? Mu trig. 4 cost ?? L0 DU 1 custom input card? L1 DU 1 custom output

~260 + 15% spares = 290 CL1 boards

Development organization

Gigabit ethernet card (CERN)

Mother board (Lausanne), including generic programming (common VHDL framework including synchronisation, L1B, DAQ and L1 trigger interface, ...) generic mechanics, racks&crates, power,... VeLo specific (Lausanne,...) IT/ST specific (Lausanne, Zuerich,...) Veto (NIKEF) ....

ECS (credit-card PC, glue-card, C library) (CERN, Genova)

Optical receiver card (Heidelberg, ...)

Test tools, software and hardware, generic (CERN, Lausanne,...)

Documentation (Lausanne,...)

Production organization

Gigabit eth cards (CERN)

Mother boards (Lausanne) VeLo specific: analogue boards (Lausanne) IT/ST specific (Lausanne, Zuerich,...) Veto (NIKEF) ....

ECS, glue-cards (CERN, Genova)

Optical receiver cards (Heidelberg)

Testing procedure to be defined.Specific tests under responsibility of sub-detectors.

As a first approximation, from the previous slide we get:

Cost optimization might require to group orders, etc...