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Lecture 2 About Computers Dr. Dimitrios S. Nikolopoulos CSL/UIUC

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Lecture 2. About Computers Dr. Dimitrios S. Nikolopoulos CSL/UIUC. Lecture Outline. Anatomy of a computer system and a microprocessor Basic instruction processing x86 registers x86 memory basics Peripheral devices Introduction to x86 assembly. Memory. CPU. Expansion Bus. Control. - PowerPoint PPT Presentation

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Page 1: Lecture 2

Lecture 2

About Computers

Dr. Dimitrios S. Nikolopoulos

CSL/UIUC

Page 2: Lecture 2

Lecture Outline

• Anatomy of a computer system and a microprocessor• Basic instruction processing• x86 registers• x86 memory basics• Peripheral devices • Introduction to x86 assembly

Page 3: Lecture 2

Internal organization of a PC

CPU

Memory

ExpansionBus

Peripherals

Control

Data

Address

Page 4: Lecture 2

Organization of a microprocessor

ALUBIU

Control

Controlregisters

Generalpurposeregisters

StatusRegisters

Control

Data

Address

CPU

Page 5: Lecture 2

Microprocessors

• State machines that execute hardcoded instructions sequenced in assembly programs

• Processors perform very simple calculations– Arithmetic operations– Logical operations– Moving data to/from memory

• The output of your programs makes the microprocessor look smarter than it really is…

Page 6: Lecture 2

Processor Components (simplified)

• ALU– The heart of the CPU where calculations are performed

• Registers– On-chip storage locations made from flip-flops, very fast to access

– Valuable resource, not in large amounts, must be used wisely!

• Cache– On-chip storage made with SRAM

– Enables fast access to data

– Not as fast as registers but faster than external memory.

– Cache contents are managed by the hardware.

Page 7: Lecture 2

Processor Components (simplified)

• Bus Interface– Controls access to the buses whenever the

processor accesses memory, or exchanges data with peripherals

• Control and instruction unit– Fetch instructions from memory to feed the

processor– Decode instructions– Control the program flow

Page 8: Lecture 2

x86

• Intel/Microsoft’s monopoly: cost-effective microprocessors for the mass market

• x86 refers to an instruction set rather than a specific processor architecture

• The processor core that implements the x86 instruction set has gone through substantial modifications and improvements over the last 20 years

• x86 is a Complex Instruction Set Computer– 20,000+ instructions– This course is supposed to take you through most of them!

Page 9: Lecture 2

Basic Instruction Processing

• A simple 3-step procedure– Fetch instruction from memory– Decode the instruction to find out what to do– Execute the instruction

• Fetch operands from memory, if any

• Store results

• Instruction execution in the stone age of computing

Fetch1

Decode1

Execute1

Fetch2

Decode2

Execute2

…...

Busy Idle Busy …...Busy Idle Busy

Microprocessor

Bus

Page 10: Lecture 2

A bit more advanced instr. processing

• Microprocessors use sophisticated pipelines • Idea: Different stages of the execution of an

instruction occupy different components of the microprocessor

• Why not keeping all components busy by having them execute parts of different instructions at the same time!

• Pipelining allows the processor to overlap the execution of multiple instructions and be more productive

Page 11: Lecture 2

Pipelining

Bus Fetch1

Fetch2

Fetch3

Fetch4

Store1

Fetch5

…...Fetch6

Fetch7

Load2

Instruction Unit

Decode1

Decode2

Decode3

Decode4

Idle

Decode5

…...Decode6

Idle Decode7

Exec.1

Exec.2

Exec.3

Exec.4

Idle

Idle Exec.5

Exec.6

Exec.7

Idle ExecutionUnit

Memory request Memory request

Page 12: Lecture 2

State of the-art instruction processing

• Pipelining with feedback• Multiple instructions issued during the same cycle• Multiple instructions completed per cycle (IPC > 1)• Advanced instruction issue logic to feed the

microprocessor with as many instructions as possible in every cycle

Page 13: Lecture 2

Registers

• Registers are storage locations• The first-level of a computer’s memory hierarchy• The fastest to access storage in your system• Purposes

– Data used in arithmetic/logical operations– Pointers to memory locations containing data or instructions– Control information (e.g. outcome of arithmetic instructions,

outcome of instructions that change the control flow of a program)

Page 14: Lecture 2

x86 Registers at a Glance

Accumulator

EAX

AH AL

AX

Base

EBX

BH BL

BX

Count

ECX

CH CL

CX

Data

EDX

DH DL

DX

General Purpose

Instr Pointer

EIP

IP

Flags

EFLAG

FLAG

Special Registers

Stack Segment

Code SegmentCS

Data SegmentDS

Extra SegmentES

SS

FS

GS

Segment Registers

Stack Pointer

ESP

SP

Base Pointer

EBP

BP

Dest Index

EDI

DI

Source Index

ESI

SI

Index Registers

Page 15: Lecture 2

General Purpose Registers

• Accumulator (AH,AL,AX,EAX)– Accumulates results from mathematical calculations

• Base (BH,BL,BX,EBX)– Points to memory locations

• Count (CL,CH,CX,ECX)– Counter used typically for loops– Can be automatically incremented/decremented

• Data (DL,DH,DX,EDX)– Data used in calculations– Most significant bits of a 32-bit mul/div operation

Page 16: Lecture 2

A note on GP registers

• In 80386 and newer processors GP registers can be used with a great deal of flexibility…

• But you should remember that each GP register is meant to be used for specific purposes…

• Memorizing the names of the registers will help you understand how to use them

• Learning how to manage your registers will help you develop good programming practices for ECE291

Page 17: Lecture 2

Index Registers

• SP, ESP– Stack pointer (more on that in upcoming lectures…)

• BP, EBP– Address stack memory, used to access subroutine

arguments

• SI, ESI, DI, EDI– Source/Destination registers – Point to the starting address of a string/array– Used to manipulate strings and similar data types

Page 18: Lecture 2

Segment Registers

• CS– Points to the memory area where your program’s

instructions are stored

• DS– Points to the memory area where your program’s data is

stored

• SS– Points to the memory area where your stack is stored

• ES,FS,GS– They can be used to point to additional data segments, if

necessary

Page 19: Lecture 2

Special Registers

• IP, EIP– Instruction pointer, points always to the next instruction that

the processor is going to execute

• FLAG, EFLAG– Flags register, contains individual bits set by different

operations (e.g. carry, overflow, zero)– Used massively with branch instructions

Page 20: Lecture 2

Memory

• You can always view memory as a huge array of bytes…

• Real memory organization is different for efficiency

AB1 FF55 1214 3376 DE01 46F1 24E9 1190 87

3

5

7

9

B

D

F

0

2

4

6

8

A

C

E

Odd Bank Even Bank

Data Bus (15:8) Data Bus (7:0)

Page 21: Lecture 2

x86 memory addressing modes

• Width of the address bus determines the amount of addressable memory

• The amount of addressable memory is NOT the amount of physical memory available in your system

• Real mode addressing– A remainder of the age of 8086, 20-bit address bus, 16-bit data bus

– In real mode we can only address memory locations 0 through 0FFFFFh. Used only with 16-bit registers

• Protected mode addressing– 32-bit address bus, 32-bit data bus, 32-bit registers

– Up to 4 Gigabytes of addressable memory

– 80386 and higher operate in either real or protected mode

Page 22: Lecture 2

Real-mode addressing on the x86

• Memory address format Segment:Offset• Linear address obtained by:

– Shifting segment left by 4 bits– Adding offset

• Example: 2222:3333 Linear address: 25553• Example: 2000:5553 Linear address: 25553

Page 23: Lecture 2

Peripherals

• For the purposes of this class, peripherals are devices INSIDE the PC box– USB, serial ports– Timers– Programmable Interrupt Controllers– Network cards– Other helper devices

• We do not consider joysticks, printers, scanners,etc. as peripherals

Page 24: Lecture 2

Peripherals

• Peripherals communicate with the CPU via control, address and data buses, just like memory

• I/O address bus is 16-bit wide, therefore we are able to address up to 65,535 I/O ports

• I/O data bus is also 16-bit wide• Peripherals can be I/O mapped or memory-mapped

or both

Page 25: Lecture 2

Example

• My network card• I/O Address range 7400-

743F• Memory mapping range

C0200000-C0200FFF• Both memory-mapped and

I/O-mapped• We can access this device

using different types of instructions

• More on that in later lectures…

Page 26: Lecture 2

Why Assembly ?

• Assembly lets you write fast programs– You can write programs that execute calculations at the maximum

hardware speed…

– …assuming that you know what you’re doing…

• Class Quiz: Why not always use assembly ?• Assembly is necessary for writing system’s software

– Compilers

– Operating systems (your instructor’s favorite field…)

• Assembly is necessary while designing and evaluating new microprocessors

• Assembly is used to program embedded devices and DSPs

Page 27: Lecture 2

Assembly files

• Four simple things• Labels

– Variables are declared as labels pointing to specific memory locations

– Labels mark the start of subroutines or locations to jump to in your code

• Instructions/Directives• Comments• Data

Page 28: Lecture 2

Comments, comments, comments!

; Comments are denoted by semi-colons.

; Please comment your MP’s thoroughly.

; It helps us figure out what you were doing

; It also helps you figure out what you were

; doing when you look back at code you

; wrote more than two minutes ago.

Page 29: Lecture 2

Labels

; Labels can be global

MyGlobalLabel:

MyOtherGlobalLabel:

; They can be local too

.MyLocalLabel

; Local labels are always related to the previous un-dotted label

Page 30: Lecture 2

Local labels

MyBigGlobalLabel

.local_label1

.local_label2

MyNextBigGlobalLabel

.local_label1 ; these are distinct

.local_label2 ; to the ones above

Page 31: Lecture 2

Variables

; Let’s do something with labels now

VAR1 DB 255

VAR2 DB 0FFh

VAR3 DW 1234h

ARR1 DB 12, 34, 56, 78, 90

ARR2 DW 12, 34, 56, 78, 90

STR1 DB ‘291 is awesome!!!’, 0

BUF1 RESB 80

labels Directives(pseudoinstructions)

data

Page 32: Lecture 2

Directives

• EXTERN: allows you declare external procedures and use them in your program

• SEGMENT: declare a memory segment• EQU: define pre-processor constants

Page 33: Lecture 2

Example

; Let’s declare some external functions; Let’s declare some external functionsEXTERN kbdine, dspout, dspmsg, dosxitEXTERN kbdine, dspout, dspmsg, dosxit

; Let’s begin our code segment; Let’s begin our code segmentSEGMENT codeSEGMENT code

; I’d normally put my variables right here; I’d normally put my variables right here

..start..start ; This is a special label that; This is a special label that; denotes the execution starting; denotes the execution starting; point. The next instruction; point. The next instruction; after ..start will be the first; after ..start will be the first; to run when you execute your program; to run when you execute your program

Page 34: Lecture 2

Example with simple instructions

; Here are some simple instructions; Here are some simple instructions

mov ax, [VAR1] ; notice the bracketsmov ax, [VAR1] ; notice the brackets

mov dx, STR1 ; notice the not bracketsmov dx, STR1 ; notice the not brackets

call dspmsgcall dspmsg

jmp donejmp done

mov bx, [VAR2] ; this will never happenmov bx, [VAR2] ; this will never happen

donedone

Page 35: Lecture 2

Example with simple instructions

SEGMENT codeSEGMENT codevar1var1 dbdb 55h55h ; 55; 55var2var2 dbdb 0AAh0AAh ; AA; AAvar3var3 dbdb 12h12h ; 12; 12str1str1 dbdb "Hello", 0"Hello", 0 ; 48 65 6C 6C 6F ; 48 65 6C 6C 6F 0000

..start..startmovmov al,al, [var1][var1] ; A0 00 00; A0 00 00movmov bx,bx, var3var3 ; BB 02 00; BB 02 00incinc bxbx ; 43; 43movmov al,al, [bx][bx] ; 8A 07; 8A 07

Page 36: Lecture 2

Keep up the good work!HW0 due Monday!