light current electrical applications iii

Macmillan Technician Series

P. Astley, Engineering Drawing and Design II

P. J. Avard and J. Cross, Workshop Processes and Materials I

G. D. Bishop, Electronics II

G. D. Bishop, Electronics III

J. C. Cluley, Electrical Drawing I

H. G. Davies and G. A. Hicks, Mathematics II

J. Elliott, Building Science and Materials

John G. Ellis and Norman J. Riches, Safety and Laboratory Practice

D. E. Hewitt, Engineering Science II

P. R. Lancaster and D. Mitchell, Mechanical Science III

R. Lewis, Physical Science I

Noel M. Morris, Digital Techniques

Noel M. Morris, Electrical Principles II

Noel M. Morris, Electrical Principles III

Owen Perry and Joyce Perry, Mathematics I

LIGHT CURRENT ELECTRICAL

APPLICATIONS III

A. Simpson, C.Eng., M.I.E.R.E.

Department of Electrical and Electronic Engineering,

Worthing College if Technology

M

© A. Simpson 1981

All rights reserved. No part of this publication may be reproduced or transmitted, in any form or by any means, without permission.

First published I 981 by THE MACMILLAN PRESS LTD London and Basingstoke Associated companies in Delhi Dublin Hong Kong Johannesburg Lagos Melbourne New York Singapore and Tokyo

Typeset in 10/12 Times

This book is sold subject to the standard conditions of the Net Book Agreement.

The paperback edition of this book is sold subject to the condition that it shall not, by way of trade or otherwise, be lent, resold, hired out, or otherwise circulated without the publisher's prior consent in any form of binding or cover other than that in which it is published and without a similar condition including this condition being imposed on the subsequent purchaser.

ISBN 978-1-349-03752-0 ISBN 978-1-349-03750-6 (eBook) DOI 10.1007/978-1-349-03750-6

Contents

Foreword vii

Preface IX

1. Regulated Power Supplies 1

1.1 Shunt Regulators 2 1.2 Multi-stage Voltage Reference Sources 6 1.3 The Transistor as a Shunt Regulating Element 6 1.4 Simple Series Regulator Circuit 7 1.5 Series Regulators Incorporating Amplifiers 7 1.6 Protection Circuits for Series Regulated Supplies 9 1.7 Integrated-circuit Voltage Regulators II 1.8 Switched-mode Power Supplies 12 1.9 Specifications for Regulated Power Supplies 13

Problems 14

2. Transistor Amplifiers 16

2.1 The Common-emitter Amplifier 16 2.2 The Use of Negative Feedback to Stabilise

the Gain of an Amplifier 22 2.3 Effect of Feedback on the Bandwidth of an

Amplifier 24 2.4 Effect of Feedback on Noise and Distortion 25 2.5 Effect of Feedback on the Input and Output

Impedance of the Amplifier 25 2.6 Practical Feedback Amplifier Circuits 27 2.7 The Emitter Follower 28 2.8 Classes of Amplifier Operation 29 2.9 Power Amplifier Circuits 29 2.10 Linear Integrated Circuits 31

Problems 33

3. Sinewave Oscillators and Pulse Generators 35

3.1 Sinewave Oscillators 36 3.2 Relaxation Oscillators 41 3.3 Waveform Shaping 45

Problems 48

4. Digital Electronics

4.1 Logical Functions 4.2 Digital Devices 4.3 Logic Circuits 4.4 Examples of Simple Logic Applications 4.5 NAND and NOR Gates Only 4.6 NAND and NOR Gates Only Logic

Diagrams 4.7 Rules of Logic 4.8 Simple Memory Circuit 4.9 Digital Integrated Circuits

Problems

5. High-power Electronics

5.1 The Reverse-blocking Thyristor (Thyristor) 5.2 The Bidirectional Thyristor (Triac) 5.3 Protection of Thyristors and Triacs against

Excess Current and Voltage Problems

6. Monolithic Integrated Circuits

6.1 Production of the Silicon Slice 6.2 Planar Process 6.3 Integrated Circuits

50

51 53 54 55 56

58 62 63 64 67

72

72 81

82 83

85

85 86 88

Foreword This book is written for one of the many technician courses now being run at technical colleges in accordance with the requirements of the Technician Education Council (TEC). This Council was established in March 1973 as a result of the recommendation of the Government's Haslegrave Committee on Technical Courses and Examinations, which reported in 1969. TEC's functions were to rationalise existing technician courses, including the City and Guilds of London Institute (C.G.L.I.) Technician courses and the Ordinary and Higher National Certificate courses (O.N.C. and H.N.C.), and provide a system of technical education which satisfied the requirements of 'industry' and 'students' but that could be operated economically and efficiently.

Four qualifications are awarded by TEC, namely the Certificate, Higher Certificate, Diploma and Higher Diploma. The Certificate award is comparable with the O.N.C. or with the third year of the C.G.L.I. Technician course, whereas the Higher Certificate is comparable with the H.N.C. or the C.G.L.I. Part III Certificate. The Diploma is comparable with the O.N.D. in Engineering or Technology, the Higher Technician Diploma with the H.N.D. Students study on a part-time or block-release basis for the Certificate and Higher Certificate, whereas ·the Diploma courses are intended for full-time study. Evening study is possible but not recommended by TEC. The Certificate course consists of fifteen Units and is intended to be studied over a period of three years by students, mainly straight from school, who have three or more C.S.E. Grade III passes or equivalent in appropriate subjects such as mathematics, English and science. The Higher Certificate course consists of a further ten Units, for two years of part-time study, the total time allocation being 900 hours of study for the Certificate and 600 hours for the Higher Certificate. The Diploma requires about 2000 hours of study over two years, the Higher Diploma a further 1500 hours of study for a further two years.

Each student is entered on to a Programme of study on entry to the course; this programme leads to the award of a Technician Certificate, the title of which reflects the area of engineering or science chosen by the student, such as the Telecommunications Certificate or the Mechanical Engineering Certificate. TEC have created three main Sectors of responsibility

viii LIGHT CURRENT ELECTRICAL APPLICATIONS III

Sector A responsible for General, Electrical and Mechanical Engineering Sector B responsible for Building, Mining and Construction Engineering Sector C responsible for the Sciences, Agriculture, Catering, Graphics and Textiles.

Each Sector is divided into Programme committees, which are responsible for the specialist subjects or programmes, such as Al for General Engineering, A2 for Electronics and Telecommunications Engineering, A3 for Electrical Engineering, etc. Colleges have considerable control over the content of their intended programmes, since they can choose the Units for their programmes to suit the requirements of local industry, college resources or student needs. These Units can be written entirely by the college, thereafter called a college-devised Unit, or can be supplied as a Standard Unit by one of the Programme committees of TEC. Assessment of every Unit is carried out by the college and a pass in one Unit depends on the attainment gained by the student in his coursework, laboratory work and an end-of-Unit test. TEC moderate college assessment plans and their validation; external assessment by TEC will be introduced at a later stage.

The three-year Certificate course consist~ of fifteen Units at three Levels: I, II and III, with five Units normally studied per year. A typical programme might be as follows.

Year I Mathematics I Standard Unit Science I Standard Unit Workshop

Processes I Standard Unit Drawing I Standard Unit six Level General and I Units

Communi-cations I College Unit

Year II Engineering Systems I College Unit

Mathematics II Standard Uni'/ Science II Standard Unit Technology II Standard Unit

General and Communications II

Year III Industrial Studies II

Engineering

College Unit

College Unit

Systems II College Unit

III Standard Unit

six Level II Units

Science III Standard Unit three Level

Mathematics }

Technology III Units III College Unit

Entry to each Level I or Level II Unit will carry a prerequisite qualification such as C.S.E. Grade III for Level I or 0-level for Level II; certain Craft qualifications will allow students to enter Level II direct, one or two Level I Units being studied as 'trailing' Units in the first year. The study of five Units in one college year results in the allocation of about two hours per week per Unit, and since more subjects are often to be studied than for the comparable City and Guilds course, the treatment of many subjects is more general, ·with greater emphasis on an understanding of subject topics rather than their application. Every syllabus to every Unit is far more detailed than the comparable O.N.C. or C.G.L.I. syllabus, presentation in Leal'ning Objective form being requested by TEC. For this reason a syllabus, such as that followed by this book, might at first sight seem very long, but analysis of the syllabus will show that 'in-depth' treatment is not necessary-objectives such as ' ... states Ohm's law .. .' or ' ... lists the different types of telephone receiver .. .' clearly do not require an understanding of the derivation of the Ohm's law equation or the operation of several telephone receivers.

This book satisfies the learning objectives for one of the many TEC Standard Units, as adopted by many technical colleges for inclusion into their Technician programmes. The treatment of each topic is carried to the depth suggested by TEC and in a similar way the length of the Unit (sixty hours of study for a full Unit), prerequisite qualifications, credits for alternative qualifications and aims ofthe Unit have been taken into account by the author.

Preface This book has been written primarily for electrical technicians studying for awards with the Technician Education Council (TEC) and covers the syllabus for Light Current Electrical Applications, a subject at third-year level in the A3 Electrical Engineering Council programme.

The unit as originally conceived was considered by the Council to contain too much work for a 60 hour unit and colleges were free to select the areas they considered most suitable for their needs, eliminating some 20 per cent of the material. This book, however, covers the whole of the published unit in the five main sections: regulated power supplies, transistor amplifiers, sinewave oscillators and pulse generators, digital electronics, high power electronics. It includes worked examples in the sections together with exercises, with answers where applicable, at the end of each section. The book finishes with a short chapter about integrated circuit manufacture.

It would be appropriate at this time to record my thanks to my wife for her help in preparing the manuscript and for her encouragement throughout this time-consuming task.

A. SIMPSON

1. Regulated Power Supplies

Although the term 'regulated power supply' could cover a whole range of types of power supplies, in the context of that used to supply electronic equipment it is usually taken to mean those types supplied from the 240 V 50 Hz mains and providing a d.c. output. Furthermore, although two basic types exist, constant voltage and constant current, by far the most usual and hence the most important is that of the constant-voltage type, the basic purpose of which is that it should provide a constant output voltage irrespective of the input conditions to or the current being drawn from the unit.

Output voltage variations in non-regulated supplies are caused by

(1) change of input voltage (2) change of load current.

Change of input voltage (mains variation) results in a change of output voltage for the non-regulated supply which is greater or less than the supply voltage change depending on whether the required output voltage is obtained by using a step-up or step-down transformer. A change of load current results in a variation of output voltage because

(1) the potential difference across the effective resistance of the transformer, rectifier and filter elements changes

(2) the rate of discharge of the reservoir capacitor alters, thus changing the average output voltage level.

A regulated power supply should be able to allow for either of these conditions and maintain the output voltage constant within specified input voltage and load current variations. A specification for a regulated supply will include information about the stability and output resistance of the regulator as well as some information about the amount of ripple voltage which is superimposed on the d.c. output voltage (see section 1.9).

The stability of a regulated power supply, or stabilisation factor Sis given by

S = change of output voltage change in supply voltage

2 LIGHT CURRENT ELECTRICAL APPLICATIONS III

Typical values of S for regulators may vary from 0.005 for a simple regulator to 0.0001 for more complex circuits (5 mV per volt to 0.1 mV per volt).

The output resistance Ro is given by

R = _change of output voltage 0 change of output current

The minus sign is included because an increase of current causes a decrease in output voltage. An ideal regulator would have R0 equal to zero and although in practice this is never achieved, values of 0.01 n and lower are possible.

Two basic types of regulated· power supply exist-the shunt regulator and the series regulator.

In the shunt regulator a device is connected in parallel with the load and for good regulation a current is maintained in it at all times. From the block diagram of figure 1.1 it may be seen that the total current from the supply IT consists of I Land I R· If I L changes then I R needs (o readjust itself automatically to maintain IT at its original value, thus ensuring that the internal voltage drop of the complete power system remains constant. Similarly should the input voltage to the system change then I R needs to alter such that

n -

from rectified supply

v,

,... _.

/R

shunt reg.

Figure 1.1 Shunt regulator block diagram

h

I load I

the total internal voltage drop subtracted from the supply voltage maintains the output voltage constant at the required value.

In the series regulator the control element is in series with the load and will at all times have a potential difference across it which subtracts from the supply voltage to give the regulated output voltage as shown in the block diagram of figure 1.2. Thus if the input voltage to the regulator changes, the potential difference across the series element alters to re-establish the original output terminal voltage. Similarly if the load conditions alter, causing the terminal voltage to change, the potential difference across the series element changes to re-establish the original output voltage.

from rectified supply

v,

series control element

v.

Figure 1.2 Series regulator block diagram

1.1 SHUNT REGULATORS

load V0 = V,-v.

The simplest type of shunt regulator circuit is that shown in figure 1.3a which uses a Zener diode as the shunt element.

In this circuit the Zener voltage determines the stabilised output voltage and'the Zener operates on the steep slope of its characteristic as indicated in figure 1.3b. In effect, should the terminal

from rectified supply v,

(

A

operating point

v

~r load

0

(a)

0 ~------------------------~

B

(b)

Figure 1.3 Zener diode: (a) connected as shunt regulator, (b) characteristic

voltage alter for any reason, the operating point of the Zener changes, moving up or down between points A and B. For instance, if the load current I L falls causing the potential across R. to fall, V0

attempts to rise and this drives the operating point 0 towards B,

REGULATED POWER SUPPLIES 3

thus increasing the Zener current to maintain an almost constant p.d. across the series resistor R •. The design should arrange that the load current is not large enough at any time to reduce the Zener current to zero since this implies that the Zener works above the knee of the characteristic and under these conditions the output voltage is no longer stabilised.

In practice the slope or dynamic resistance of the Zener diode may be several ohms, but assuming an ideal case (AB vertical in figure 1.3b) then the slope resistance is zero and R 0 the output resistance of the regulator is zero. If V0 is the output voltage and Vz the Zener voltage then

The value of R. may be found from

I = _V-=-' _-_V-=-o R.

From which

R = _v_, -_v-'--0 • I

(1.1)

In calculating a value of R., V1 should be the minimum value likely to be obtained from the unstabilised supply in order to ensure that the maximum load current I may be delivered at all times.

The maximum Zener current is determined by the power rating P z of the device and its operating voltage Vz, thus

(1.2)

A good design should ensure that if the load becomes disconnected the Zener is able to operate satisfactorily within its power rating. Under these conditions


and from equations 1.1. and 1.2

or

P = _v_,_z(.:_V__.:I_-_v.:::..o> z R. (1.3)

It should be noted that in order to establish the maximum power dissipated by the Zener the value of v; to be used in equation 1.3 is the maximum value likely to be delivered by the unstabilised section of the power supply.

The maximum power dissipated in the series resistor R. during normal operation occurs at full load current and when the input voltage v; is at maximum.

Example 1.1

A Zener diode shunt regulator is to be used to supply a maximum load current of 0.24 A at 30 V from a d.c. supply which varies between 40 and 50 V. If the minimum Zener current is to be 10 rnA determine

(a) the value of a suitable series resistor R. to ensure that the maximum load current is delivered for all values of input voltage

(b) the power rating of a suitable Zener diode if the circuit is to operate satisfactorily with the load disconnected

(c) the maximum power dissipated in the series resistor during normal operation. Solution

(a) The total current I through the series resistor R. (figure 1.3a) is the sum of the maximum load current and the minimum Zener current, thus

I = 0.24 + 0.01 = 0.25 A

Using the minimum value of ~ in equation 1.1 to find R, gives

40-30 R.=~

=400

(b) Using the maximum value of V1 in equation 1.3 to find the power rating P z of the Zener diode gives

30(50 -30) Pz= 40

= 15W

(c) The current through R. at maximum load is 0.25 A and the maximum p.d. across it during normal operation is 20 V, thus the maximum power P, dissipated in the series resistor is

P, = 0.25 X 20 =5W

The ripple voltage appearing in the load will be that appearing across the Zener diode itself since this is in parallel with the load. This is lower than the ripple voltage appearing across the input terminals by a factor which is dependent on the respective values of R. and the slope resistance of the Zener r z• thus

r ripple voltage in load = input ripple voltage x ____!__R

'z + s

As an example consider a Zener diode with a slope resistance of 10 Q in series with a 90 Q resistor fed from a d.c. supply containing a ripple voltage of 20 m V peak to peak.

ripple voltage in load = 20 x w- 3 x 90 ~ 10

= 2 mV peak to peak

It should be noted that the above method of calculating the

ripple voltage in the load ignores the resistance of the load itself. However, this will usually be high compared with the slope resistance of the Zener and the method is sufficiently accurate for most practical purposes.

Similar circuits to those of Zener diodes may use cold-cathode gas-filled stabilising tubes as the shunt elements, as shown in figure 1.4a. The stabilising tube has some different properties from those

from rectified II, supply

stabilised voltage V0

(a)

1---------,

(b)

normal range of stabilisation

- striking potential

v

Figure 1.4 Gas-filled regulating tube: (a) connected as shunt regulator, (b) characteristic


of the Zener diode and these need to be considered in the design of a regulated supply using gas-filled tubes. The striking or ionising potential is higher than the rated stabilised voltage as shown in the characteristics of figure 1.4b and stabilisation will be effective between the limits of currents / 1 and / 2 • Above / 2 the dissipation of the device is exceeded and below / 1 regulation ceases. Thus the design of a circuit using a gas-filled tube as the regulator should ensure that the maximum load condition (minimum load resistance) allows the p.d. across the tube to exceed the striking potential of the device. In addition the tube current should not be allowed to fall below that necessary to maintain the discharge.

Example 1.2

A cold-cathode gas-filled stabilising tube is to be used to supply 75 V to a 5 k!l load from a 225 V d.c. supply. The tube has a striking voltage of 100 V and over the current range 5--40 rnA the tube voltage can be considered constant at 75 V. Calculate

(a) the value of the series resistance to limit the tube current to 40 rnA when the load is disconnected and

(b) the minimum value of load resistance that can be used which still ensures that the tube will strike when the supply is first switched on. Solution

(a) From figure 1.4a

R =Vi-Vo • I

225-75 40 X 10- 3

= 3750 n

(b) To ensure that the tube strikes, point A (figure 1.4a) must reach 100 V and thus the p.d. across R. will be 125 V hence

R. 125

RL 100


thus

R - R. X 100 L- 125

3750 X 100 = -----,--

125

= 3k0

1.2 MULTI-STAGE VOLTAGE REFERENCE SOURCES

Two or more Zener diodes may be used in cascade to produce a stability factor higher than for a single stage: a two-stage Zener circuit is shown in figure 1.5. The unstabilised input voltage needs to be much higher than the output but the design of each stage follows the general principles outlined in section 1.1. The stability factor of the circuit as a whole is the product of the individual stability factors of each section. Thus for a two-stage reference source with a stability factor for each section of 0.1 the overall stability factor is 0.01.

Similar circuits could be constructed using gas-filled stabiliser tubes but the stabilised voltage provided by such devices is higher in general than the Zener diode counterpart and difficulties arise

unstabiliaed d.c. supply

R, R,

Z2 ')~

Figure 1.5 Two-stage Zener stabilising circuit

stabiliaed output

because of the high supply voltages required for anything other than a two-stage circuit. The Zener diode, because of its lower regulating voltage, may be used with three or four sections cascaded to produce a very stable output voltage.

1.3 THE TRANSISTOR AS A SHUNT-REGULATING ELEMENT

Using the circuit of figure 1.6 the current-handling capacity of the stabiliser may be increased. In this circuit the Zener current I z is also the base current I 8 of the transistor and since the transistor emitter current is given by I 8 (1 + hFE) where hFE is the forward transfer characteristic (current gain) of the transistor, then the stabiliser is capable of handling a current equal to I z (1 + hFE>·

unstabiliaed d.c. supply

... 1

Figure 1.6 Transistor as a shunt-regulating element

staboltaect output voltage V0

As before, the Zener current is limited by the maximum dissipation of the Zener but in addition the maximum dissipation of the transistor must also be considered.

The stabilised output voltage V0 is given by

where Vz is the Zener voltage and VsE is the base-emitter voltage of

the transistor which, depending on the type, will normally be within the range 0.1 V to 0.8 V.

This type of circuit has the advantage that accidental short circuit of the output terminals will not damage the transistor since the voltage between collector and emitter is then reduced to zero. In general, however, a series-connected transistor regulator is preferred since, for a given load, it dissipates less power than the series resistor and shunt transistor combination.

1.4 SIMPLE SERIES REGULATOR CIRCUIT

A simple regulator using a transistor as the series element is shown in figure 1.7, the stabilised output voltage V0 being given by

unstabohsed d c supply v,

R,

Figure 1. 7 Transistor as a series-regulating element

stabohsed output voltage V0

The circuit consists of a shunt regulator Zener diode used as a voltage reference source to maintain the base voltage and hence the emitter voltage of the series transistor constant. Since the base is held constant any change of V0 alters the base--emitter voltage V8E

and this alters the resistance of the transistor. Thus if the output voltage V0 attempts to fall the base--emitter voltage of TR1 increases, resulting in increased base current and a fall in the


resistance of the transistor. The p.d. across TR1 is thus reduced and this tends to restore the original output voltage.

Some change of output voltage will occur with increase of load current for the following reasons.

(1) The increased load current h through the transistor implies that the base current I 8 increases in the proportion I LfhFE and this increased base current results in an increased potential across the base-emitter of the transistor. Thus since V0 = Vz- V8E

the output voltage falls. This fall is of the order 0.25 V for a change of load current of about 10 rnA to 1 A.

(2) Since the base current increases with increased load current this current has to be drawn from the Zener diode. Since the Zener has a finite slope resistance the decrease of current causes the Zener voltage to fall slightly and thus the output voltage falls. This fall is dependent on the current change and the slope resistance of the diode.

(3) The input voltage to the regulator section V; also decreases with increased load current, the amount being determined by the regulation of the rectifier and smoothing circuits. This results in a change of Zener current through R 1 with a consequent change of Zener voltage.

l.S SERIES REGULATORS INCORPORATING AMPLIFIERS

By amplifying the difference between Vz and V0 (figure 1.7) before applying it to the base of the series element, the stability of the regulator may be improved and its output resistance Ro reduced.

A block diagram of a typical arrangement is shown in figure 1.8 where the voltage reference could be a Zener diode or a gas-filled stabiliser tube, the purpose of which is to maintain one terminal of the amplifier at constant voltage. To the input terminal of the amplifier is fed a proportion fJ of the stabilised output voltage V0 •

The difference between the reference voltage and fJ V0 is thus amplified and used to control the effective resistance of the series element.

A typical circuit using a Zener diode as the voltage reference and


unstabilised d.c. supply

final control element

error voltage amplifier

voltage reference source

Figure 1.8 Block diagram of series regulator incorporating error amplifier

transistors as error amplifier and series element is shown in figure 1.9 although the same general arrangement is used when using gasfilled stabilisers and valves. If Vo increases either due to less load current or because of a change in supply voltage to the regulator, then P V0 increases by an amount which is dependent on the setting of VR 1 • Since Vz remains substantially constant the current in TRl increases and point A, which is also the base voltage of TR2, falls. The emitter-base potential of TR2 is thus reduced, effectively increasing its resistance, so tending to restore the output voltage V0

to its original value. Similarly a fall in the output voltage V0 causes the resistance of TR2 to be reduced.

Adjustment of VR 1 sets the output voltage Vo between limits determined by the Zener voltage at the lower end and an upper value which, because of the potential difference across TR2 must be lower than the supply voltage Vi. Resistor R 1 is used to maintain a

unstabilised d.c. supply

v,

R,

VR,

Figure 1.9 Circuit diagram of series regulator incorporating an error amplifier

suitable current in the Zener diode and R 2 is the load for the error amplifier.

For satisfactory operation the series-regulating transistor TR2 must satisfy certain conditions which are concerned with its power dissipation, breakdown voltage and maximum rated collector current.

The power ( P.) dissipated in the series regulator transistor is given by

where Vi and V0 are the input and output voltages respectively and I the current through the series element. In addition it should be noted that the transistor must be capable of dissipating this power under the conditions of maximum temperature attained within the stabiliser case.

For normal operation the maximum potential difference across the series element occurs under no-load conditions and when the supply voltage is a maximum.

The maximum rated collector current of the transistor for normal operation is determined by the full load current I L of the stabiliser although to this must be added some small current through R3 , VR 1 and R4 .

For overload or short-circuit output terminal conditions, the criteria outlined above will obviously be exceeded with the result that the series element in particular is likely to be damaged. To overcome this problem protection circuits are required for seriesregulated supplies.

1.6 PROTECTION CIRCUITS FOR SERIESREGULATED SUPPLIES

The most serious fault that can occur is that the regulator output terminals become short-circuited. The current taken will then be high, limited mainly by the internal resistance of the rectifying unit from which it is supplied. In addition the potential difference across the series element is the voltage being supplied by the unstabilised section, which, although lower than normal due to the heavy current, will still damage the series regulator if this has been chosen to withstand only the difference between maximum input and normal output voltages. This may be overcome by choosing a series element capable of withstanding the full unstabilised input voltage.

In general for stabilisers using valves as series elements the use of fuses for over-current protection is satisfactory since even if the excess current is caused by short-circuit output terminals, which thus applies excess voltage and current to the series element, a valve will normally withstand these overload conditions for the time required to blow the fuse. For transistor regulators this is not the case. The transistor is damaged almost instantly by over-voltage and due to its low thermal inertia will quickly be damaged by any over-dissipation. Thus the use of fuses or high-speed relays is not satisfactory for complete protection of these circuits, although they may be used as a back-up to over-voltage and over-current protection circuits which are able to operate within tens of microseconds of the application of a fault.

Over-current Protection

The characteristics shown in figure 1.10 indicate ideal curves for two different forms of over-current protection.

p.d. across series element


output mon voltage 1-----------...,.

Vo

max

0

characteristic B

c

characteristic A -

senes regulator current

full load

Figure 1.10 Ideal characteristics for over-current protection circuits

Characteristic A indicates the situation where at overload the current is restricted to the full-load value and the output voltage falls. The series element for this type of protection must be able to withstand the whole of the unstabilised input voltage and have a power dissipation which is the product of the full-load current and this input voltage.

Characteristic B, known as re-entrant protection, indicates a situation where immediately the overload occurs both the output current and the voltage are reduced. In this case the series element, although it must be capable of withstanding the unstabilised input voltage, does not need to withstand the same dissipation as for characteristic A. For the short-circuit condition indicated at point C in figure 1.10 the series element dissipation is now about onethird of that of characteristic A. However, it should be noted that point C of characteristic B does not necessarily represent maximum dissipation for the series element. At point D for instance, the voltage across the series element is greater than that for normal full-load operation and since almost full-load current is being taken this could represent the point of maximum dissipation in the series element. The maximum dissipation will need to be determined and a suitable transistor selected as the series element.

A circuit suitable for providing the constant current protection of characteristic A (figure 1.10) is shown in figure 1.11. In this circuit TRl, the constant current control transistor, has its emitter


constant current control

Figure 1.11 Constant current protection circuit

constant • .-........-- voltage

control

connected to a positive potential determined by the respective values of R1 and VR 2 while the base is connected to a positive potential determined by the load current through R3 . For normal values of load current the constant voltage circuit is in operation. At a value ofload current, determined by the setting of the variable resistor VR 2 , point A becomes sufficiently positive with respect to B that the current-limiting transistor conducts causing an increased voltage drop in R4 and reducing the base potential of the series element TR2. Thus the output voltage falls so that in effect the current limit overrides the constant voltage circuit and any tendency for the current to increase causes a further fall in output voltage resulting in almost constant current.

When the re-entrant protection of characteristic B (figure 1.10) is required, additional circuits to those of figure 1.11 are needed, the method of operation being that as the over-current circuit reduces the output voltage, the additional circuits operate to reduce it still further with the result that the current also falls.

Over-voltage Protection

For some applications it is essential that the output voltage of the regulated supply should not rise above a certain level, an example being that of supplies to integrated circuits. For this reason protection is needed against faults that might develop in the regulated supply such as a short-circuit of the series element. It is also possible for over-voltage to occur at the regulator output terminals due to external causes: a particular situation being that a short-circuit develops in equipment supplied from two or more independent regulated power units-the short-circuit effectively connecting two of the supplies in parallel.

A typical circuit for preventing over-voltage, and known as a crowbar circuit, is shown in figure 1.12. This circuit is connected directly across the output terminals of the regulated supply. The Zener diode and setting of VR 1 ensure that TR1 is just nonconducting with the result that there is no gate current in the thyristor. Any rise in the terminal voltage is passed directly to the base of TR 1 since the voltage across the Zener diode D 1 is constant. This causes collector current to flow in TR 1 and turns the thyristor on (see chapter 5). The current flowing in the thyristor is limited to a safe working value by means of resistor R4 , but even so

+~--~--------------~------------~--~

01

R,

Figure 1.12 Crowbar circuit for over-voltage protection

it is still sufficient to operate the over-current circuits, causing the output voltage to fall to a low level. Switching off the regulated supply, even momentarily, causes the thyristor to revert to its blocking state and the crowbar circuit is automatically reset to sense over-voltage when the regulated supply is again switched on. This type of circuit is capable of operating in a few microseconds but it should be backed up by a fuse in the d.c. line.

1.7 INTEGRATED-CIRCUIT VOLTAGE REGULATORS

The basic requirements of a regulated supply will be the same whatever the method of construction, but whereas one using discrete components will tend to use as few semiconductor devices as possible, since these are more expensive than capacitors or resistors, the integrated-circuit form of a particular stabiliser will use more semiconductors and as few resistors and capacitors as possible. This is because the cost of components in integratedcircuit form tends to be related to the space occupied on the chip by the component. In these terms a resistor takes up a considerable area while only small values of capacitance are possible (see chapter 6).

Integrated-circuit stabiliser modules are available in a range of stabilised voltages from 5 to about 30 V at currents up to about 1 A. The difference between unstabilised input and the stabilised output voltage needs to be kept as low as possible to minimise the dissipation of the series element and the whole module may be housed in an encapsulation suitable for mounting on a heatsinktwo popular types of encapsulation are shown in figure 1.13. The only external components necessary, apart from the unstabilised rectified supply, are the capacitors and in some cases one or two resistors which may be used to extend or decide the stabilised output voltage. As an example, figure 1.14 shows the external components required for a typical fixed voltage regulator module while figure 1.15 shows how the same regulator may be used to give a higher regulated output by connecting an additional resistor in the common line. In this circuit the output voltage V0 is given by

(1.4)

REGULATED POWER SUPPLIES II

iJp

\ o/p

common (a) (b)

Figure 1.13 Types of regulator encapsulation: (a) T03 metal package, (b) plastics package

v, - i/P

from mains

=~ 0.11'F

rectifier -unit

..... -

regulator module

ofp

common

=~

-regulated output

oloed t

0.471' F

,..

Figure 1.14 Basic connections for regulator module showing additional components required

where V R is the basic regulator voltage and R and I c the resistance and current in the common line respectively. The current Jc is dependent on the type of regulator module being used but is typically of the order of several milliamperes. As an example consider a stabiliser module with a normal output voltage of 5 V


regulator module

ojp t----4t--O

from mains rectifier -unit

R

regulated output

to load

0.47jtF

Figure 1.15 Connections required to provide higher output voltage than basic regulator voltage

which is required to provide a 6 V stabilised output. Assuming an /c of 5 rnA, then the value of R required is, from equation 1.4, 200Q.

In general the use of the circuit of figure 1.15 to give a higher output voltage than that provided by the basic circuit reduces the regulation of the module: a situation that gets worse as the output voltage is increased by increasing the value of R. For this reason the circuit is usually used when the voltage is only required to be raised by 1 or 2 V above the basic value.

1.8 SWITCHED-MODE POWER SUPPLIES

The disadvantage of the normal regulated supply is that the series element has to be capable of absorbing considerable power and this results in a loss of energy making the unit inefficient. The switched-mode power supply overcomes tiie problem by using a series element which is switched either fully on or off. When the device is fully on the difference between the input and output voltages of the series element is very small; hence, even though the current is high, there is very little power dissipated in the device and most of the energy is passed to the load. When the device is switched off there is no power dissipation in the series element and

no energy is passed to the load. Thus the series element is being used as a switch and the mean power taken by the load determines the ratio of the ON/OFF times of the switch. Obviously, since the load needs to be supplied continuously, some energy storage device must be used and although a simple capacitor store is possible it is not very efficient-normal practice is to use a capacitor-inductor combination.

The basic arrangement of a switched-mode power supply is shown in the block diagram of figure 1.16 where the d.c. obtained from the mains rectifier unit is chopped at high frequency-usually 20kHz or higher-by means of the series element controlled by the switching generator. This switching generator is a pulse circuit with a variable mark/space ratio (see section 3.2.2) which controls the ON/OFF time of the series element. The chopped signal obtained from this arrangement is then rectified and filtered to give the required d.c. output. Thus if the output voltage changes due to change ofload current or other causes, the control circuit alters the mark/space ratio of the switching generator and hence the ON/OFF time of the series element, resulting in more or less energy being passed to the store to compensate for the original change of voltage at the output terminals.

mains stabilised mains d.c. input I

rectifier I I energy I output unit I I store I I I

I I I I

~ t:: '"lliul L off

50 Hz d.c. 20kHz d.c

Figure 1.16 Block diagram illustrating operation of switchedmode power supply

1.9 SPECIFICATIONS FOR REGULATED POWER SUPPLIES

The following terms are those commonly encountered in manufacturers' literature specifying the performance of regulated power supplies. The relevant British Standard is BS 5148: 1975 Method for specifying the performance of stabilised power supply apparatus, in which mention is made of the fact that before any tests are carried out on the equipment it should be operated at full rated load for a period equal to the warm-up time indicated by the manufacturer or in the absence of such information for a period of 1 h.

Stabilisation Factor or Line Regulation

The stabilisation factor S is given by

S = change of output voltage change of input voltage

As an example, a figure for S of0.001 indicates that for a 1 V change at the input terminals the output voltage will vary by 1 m V.

In general, however, manufacturers specify the regulator in terms of its line regulation where this is expressed as a percentage change of the maximum output voltage for a 10 per cent change of the mains supply, a variation which adequately covers the U.K. mains requirement of within 6 per cent of .the nominal value. A typical specification for a regulator with a maximum output voltage of 50 V might be

Line regulation-less than 0.01% for 10% change of supply voltage

This specification represents a change of voltage at the output terminals of less than 5 m V for a 24 V change of a nominal 240 V supply.

The general test circuit of figure 1.17 may be used to check satisfactory stabilisation of the regulator. With the input to the

variable ratio transformer


240V~ SOH~

_,....---4 regulated 1--,...._ power supply

Figure 1.17 General test circuit for regulated supply

regulator adjusted to give the nominal value of 240 V and S1 closed, VR 1 is adjusted to give full-load current at maximum regulator output voltage. The input to the regulator is then altered by means of the variable-ratio transformer and the corresponding output voltage change noted, from which either the stabilisation factor or the line regulation may be obtained.

Output Resistance

This is the ratio of an incremental change of d.c. output voltage to an incremental change of d.c. output current. Thus the output resistance R 0 , sometimes referred to as the source resistance, is given by

R = _ch_a_n_::g_e_o_f_o_u-'tp=-u_t_v_o_lta_..:::.g_e o change of output current

The output resistance of the regulator establishes the extent to which loading the power supply will affect its output voltage and for this reason some manufacturers specify the load regulation of the regulator rather than the output resistance.

Load Regulation

This figure indicates the change in output voltage caused by a load current change from zero to full-load value. This change in output voltage is frequently expressed as a percentage of the maximum output voltage obtainable from the regulator thus


. voltage change x 100 Per cent load regulatiOn = 1 )

output vo tage (max

A typical specification for a regulator with an output voltage of SOV might be

Load regulation-less than 0.02% for 0--100% load current change

This specification represents a change of voltage at the output terminals of less than 10 m V for a current change from zero to fullload value. In addition, of course, since the full-load current will be known, the output resistance may be calculated. If, for instance, in the example given the full load current is 2 A then

10x10- 3

Ro= 2

=Smn

The general test circuit of figure 1.17 may be used to check the output resistance or load regulation of the regulator. The regulator is first adjusted to give maximum output voltage with S1 open. S1 is then closed and the change in output voltage observed when the unit is supplying full load current.

Ripple and Noise

This is usually specified as the maximum value of alternating signal voltage to be expected on the d.c. output and is normally quoted for full-load conditions. It is conveniently measured by using an oscilloscope connected across the output terminals, and since values of less than a few millivolts peak-to-peak are normal, an oscilloscope with a sensitive 'Y' amplifier is required. In addition the a.c. position of the a.c./d.c. input switch will need to be selected to prevent the signal being driven off the screen by the large d.c. level on which the ripple is superimposed.

PROBLEMS

1.1 Outline the basic requirements of a regulated power supply suitable for supplying electronic equipment.

l.l With the aid of simplified diagrams describe the essential differences between shunt and series regulators.

1.3 Draw the static characteristic of a Zener diode and explain by reference to this characteristic how the device may be used in a simple shunt regulator circuit.

1.4 Determine the maximum current that may be handled by a Zener diode with a rating of 5 V, 1 Wand explain, giving typical values of supply voltage, load current and series resistance, its operation as a simple shunt regulator.

1.5 A Zener diode is used in a simple shunt regulator circuit to supply a load at a constant voltage of 10 V from an unstabilised supply of 20 V plus or minus 10 per cent. If the maximum current in the load is 240 rnA and the minimum Zener current is 10 rnA, draw the circuit diagram and determine (a) the value of series resistor required if full-load current is to be delivered for all possible values of input voltage and (b) the maximum power that could be dissipated in the Zener diode if the load current is reduced to zero.

1.6 Draw a typical voltage/current characteristic of a neon tube voltage stabiliser and explain its operation. Explain why, when this type of device is used in conjunction with a series resistor as a shunt regulator, there is a minimum critical value· of load resistance below which the tube will not strike.

1.7 By means of a block diagram outline the method of operation of a series regulator which incorporates feedback in conjunction with an error amplifier. State the factors which influence the choice of a suitable series regulator for this type of circuit.

1.8 Draw the c:ircuit diagram of a series regulator incorporating

feedback in conjunction with an error amplifier. Explain how the stabilised output voltage may be varied in this type of regulator and state the factors which determine the maximum and minimum values of the output voltage.

1.9 (a) Explain why over-current and over-voltage protection circuits are required in series type regulators. (b) Outline the principles involved in (i) over-current protection and (ii) over-voltage protection.

1.10 Draw a diagram of a circuit suitable for protecting a series regulator against any over-voltage appearing at its output terminals and explain its operation.

1.11 A test on a regulated power supply rated at 15 V, 10 A gave the following results

At full-load current

Supply voltage Output voltage

240V 15 v

At nominal voltage of 240 V

Output current Output voltage

OA 15 v

216 v 14.9 v

lOA 14.94 v

Determine the stability factorS and the output resistance Roof the regulator.

1.12 With the aid of a block diagram explain the operation of a switched-mode power supply indicating the advantages of this type of unit compared with that of the conventional regulated supply.

Answers

1.4 200 mA 1.5 (a) 3Hl; (b) 3.75 W 1.11 S = 0.0042, R 0 = 6 mO


2. Transistor Amplifiers An electronic system requires amplifiers in order to produce, from low-level signals often of the order of microvolts, signals of sufficient level to drive an output amplifier stage; the output stage in turn produces signal power to drive a transducer of one sort or another. As an example, a television receiver amplifies the weak aerial signal of some 50 to 300 Jl. V and ultimately uses the result to provide sound and picture information. In one case the speaker system associated with the sound channel may require several watts of signal power to provide sufficient sound level and in the other case over 100 V of signal is needed to provide the picture information via the cathode-ray tube. Multiple-stage amplifiers with gains in excess of 105 are therefore normal and the problems associated with such amplifiers are the maintenance of stability and constant gain of the amplifier. In general in the explanations that follow concerning amplifiers npn transistors are considered but identical circuits may be used with pnp types the only difference being that the supply potentials are reversed from those of npn transistors.

2.1 THE COMMON-EMITTER AMPLIFIER

The simplest type of common-emitter connected amplifier is that shown in figure 2.la where RL is the load resistor for the amplifier and resistor R8 provides base current for the transistor. For the amplifier to operate correctly, that is, produce an amplified version of the input signal at the output terminals with as little distortion as possible, certain conditions must be fulfilled. These are known as quiescent or no-signal conditions and are concerned with setting the amplifier at the correct operating point.

If R 8 is disconnected in the circuit of figure 2.la then no current flows in the base circuit and the operating point of the input circuit is at zero as shown on the input characteristic of figure 2.lb. Under these conditions a signal applied at the input terminals can increase the base current but not decrease it below zero as the input signal drives negative. Thus the amplifier is only capable of reproducing the positive half-cycle of the input signal for these conditions (for a pnp transistor only the negative half-cycles are reproduced) which implies that the output is a very distorted version of the input.

If the operating point is shifted to Q (figure 2.1 b) by connecting a suitable value of resistor R8 in the circuit of figure 2.la, the amplifier will have a no-signal or quiescent value of base current which the input signal either increases or decreases. If this operating point is chosen so that it falls on the straight portion of the input characteristic and so that the signal voltage produces current variations which themselves still fall on the straight portion, then distortion in the amplifier due to input circuit conditions is kept to a minimum. However, it is also necessary to ensure that the output conditions of the amplifier do not produce distortion. The quiescent base current I 8 produces a quiescent

Vee

Ra RL L output

input

Vee

(a)

Ia (JJA)

60

20

TRANSISTOR AMPLIFIERS 17

operating point with R 8 connected

0.4

~ I operating point with R 8 disconnected

I I

V8e (volts)

(b)

Figure 2.1 Simple transistor amplifier: (a) circuit, (b) input characteristic showing operating points

collector current I c which is dependent on both I 8 and the current gain (hre) of the common-emitter amplifier. This quiescent value of Ic is flowing through the load resistor RL and produces a p.d. across it which subtracts from the supply voltage V cc to give the collector voltage V cE (see figure 2.la). If I cis zero then there is no p.d. across RL and point A is at the same potential as the supply rail. The other extreme is that I c is so large that nearly all the supply

voltage appears across RL in which case the voltage at point A is almost zero. For either of these conditions distortion will result, as is evident from the figures 2.2a and 2.2b which indicate the output obtained for zero and excessive collector current respectively. Thus it is an advantage if the value: of quiescent collector current and the choice ofload resistor are such that the quiescent collector voltage is approximately half the supply voltage. This is better seen from

18 LIGHT CURRENT ELECTRICAL APPLICATIONS Ill

0/'\ vv

0 /"\ V\J

(a)

(b)

Vee

Vee\JV

Vee

oJ\f\_

Figure 2.2 Diagrams indicating distortion that results from: (a) zero quiescent current, (b) excessive quiescent current

le

R

D

0 c Vee= Vee P Vee

Figure 2.3 Load line drawn on output characteristics

the output characteristics of figure 2.3 where point P corresponds to zero collector current Ic and shows that under these conditions VeE= Vee· Point R is the other extreme-all the supply voltage across RL and V cE at zero. The value of current for this condition is found from

Joining points P and R gives the load line representing the load RL chosen for the amplifier and the quiescent point Q will be set somewhere between the extremes of P and R. Thus if point Q is chosen as shown in figure 2.3, the intersection of the vertical from this point Q with OP at C gives the value of the collector voltage for the amplifier, while the intersection of the horizontal line from Q to OR at D gives the collector current associated with it. Thus OC represents the collector voltage V CE and CP represents the p.d.

across the load resistor RL under quiescent conditions; it is usually arranged, by the choice of load resistor and the collector current, that these two are approximately equal.

Example 2.1

Using the curves of figure 2.1 band assuming that the transistor has an hFE of 100 determine suitable values of RB and RL for the simple circuit of figure 2.1a assuming a supply voltage of 10 V. Solution To provide operation on the straight portion of the input characteristic, that is, at point A, requires a base current of 40 JlA and V BE is then 0.8 V, thus

R _ 10-0.8 B-40x10 6

= 230kn

Obviously a preferred value of 220 kn would be suitable and would produce a base current very close to the desired value of 40 JlA. For most practical purposes, since preferred values of resistors will be used, the small p.d. between base and emitter ( V BE)

may be ignored and the calculation of RB is then simply

RB = supply voltage required value of base current

10 40 x w- 6

= 250kn

Since the base current is 40 JlA and hFE is 100

/c = 40 X 10- 6 X 100 =4mA

For the quiescent collector voltage to be at, say, 5 V using a 10 V supply means that 5 V must be dropped across RL, thus


5 RL = 4 X 10 3

= 1.25 kn

A 1.2 kn preferred value of resistor could be used. In practice the simple circuit described is not suitable because of

the effects ofleakage currents and the variation that can exist in the parameters of the transistors themselves. Increase of temperature causes an increase ofleakage· current in the transistor and although with modern silicon-type transistors the effect is much less than with germanium types, at high working temperatures the leakage current may increase, causing the quiescent value of V cE to become lower and producing distortion of the output signal. In addition, for a circuit to be designed and built using mass-production techniques, all transistors must have current gain values that are similar if the quiescent condition for each amplifier is to be the same. Modern transistors may have current gain figures, which because of manufacturing tolerances, vary between 200and 800 for a particular transistor. Even for a circuit designed and built on a 'one-off' basis there is always the possibility that the transistor needs to be changed at a future date, resulting in considerable delay in establishing the current gain of the original and fitting one with similar characteristics as a replacement.

To overcome these problems the circuit of figure 2.4 is the most usual type of amplifier, although other circuits are possible. This circuit, known as a fully stabilised transistor amplifier, utilises a potential divider on the base in conjunction with an emitter resistor to stabilise the quiescent conditions. The divider chain of R1 and R 2 (figure 2.4) holds the quiescent base voltage VB at an almost constant value. The voltage at the emitter V E is produced by the emitter current /E flowing in RE. Thus

or

(2.1)


bleed 1 and base current

c,

bleed l current only

R,

Figure 2.4 Fully stabilised transistor amplifier

Vee

Any change in the emitter current IE causes a change in V BE and hence the base current / 8 which tends to restore the original value of IE. If for instance IE increases, then from equation 2.1 V BE must decrease, with the result that I 8 and hence I c decreases. But IE = I 8

+ I c so IE decreases. C 3 is a decoupling capacitor to ensure that the circuit is stabilised for d.c. conditions only. To d.c., C3 behaves as an open circuit path, to the signal its reactance is made low at the lowest operating frequency, thus effectively earthing the emitter to all signals. C 1 and C 2 are coupling capacitors, the purpose of which is to pass the signal to the following stage but to prevent any d.c. level from affecting other stages.

The determination of the values of components required for an amplifier stage similar to figure 2.4 may be obtained using simple methods.

Assuming that the supply is 10 V then a suitable value of emitter voltage will be 1 V, approximately one-tenth of the supply. This ensures adequate control (REacts as a control resistor) and at the

same time leaves 9 V of the supply for operation of the transistor. If the collector current for the stage is to be, say, 1 mA then the emitter current is approximately the same and the value of the emitter resistor RE is found from

which for the values considered above gives

1 RE= 1 x to- 3

= tkn

It is usual to make the reactance of C3 at least one-tenth of the resistance of RE at the lowest signal frequency to be amplified, hence

RE Xc=w

= toon

The capacitance of C3 is given by

which for the example considered, and assuming the lowest frequency to be amplified is 50 Hz, gives

C = l F 3 2 X 3.14 X 50 X 1()()

= 15.9 pF

This is the minimum value of capacitance to be used. Any larger value will provide better decoupling. The working voltage of the capacitor must be suitable for the maximum d.c. voltage across it

and because of the large capacitance an electrolytic type will be necessary. A typical value might be 25 ~tF 3 V working.

Since the supply is 10 V and there is 1 V across RE, 9 V appears across the transistor and the load RL· Under quiescent conditions about half this value should be across RL. Thus when the collector current is 1 rnA

4.5 RL = 1 X 10 3

= 4.5 k!l

A preferred value of 4. 7 k!l would be suitable. For a collector current of 1 rnA and assuming an hFE of 100 the

base current I 8 will be given by

Ic Is=~

hFE

1 X 10- 3

100

= 10 ~tA

To provide good stability of the base voltage V 8 , the divider chain of R 1 and R 2 should have values of resistance which together allow a high value of 'bleed current' compared with the base current. However, some limit must be placed on this because of supply current drain and reasonably good stability will be obtained if the 'bleed current' is about ten times the base current. Thus, for a base current of 10 ~tA the 'bleed current' I will be 100 ~tA and this flows in both R 1 and R 2• However, R 1 also carries the base current I 8 , so the total is I+ I 8 . Now the emitter voltage is 1 V and for correct operation of the transistor the base voltage V 8 will be slightly higher than this by an amount which depends on the type of transistor being used. Assuming a silicon-type transistor, then the difference between the base and emitter voltages will be about


0.5 V so that the p.d. across R2 is 1.5 V and that across R 1 is 8.5 V. Thus

8.5 R 1 = 110 X 10 6

= 77.3 kn

and

1.5 R2 = 100 X 10 6

= 15 k!l

Thus preferred values of 15 k!l and either 75 k!l or 82 k!l could be used.

The value of C 1 (and similarly C 2) is decided by the lowest frequency to be amplified and the input resistance of the stage to which it is coupled. In effect, assuming the input resistance of the circuit of figure 2.5 to be 1 k!l, the capacitor C 1 and this resistance form a potential divider circuit to the input signal, with any signal across C 1 not being amplified by the following stage, as shown in figure 2.5a. Thus if the reactance ofC1 at the lowest frequency to be amplified is the same as the input resistance of the stage, that is, 1 k!l, then 0.707 of the input signal appears across the amplifier terminals as indicated in the phasor diagram of figure 2.5b. As an example assume that the lowest frequency to be amplified is 50 Hz and that at this frequency the reactance of C 1 and the input resistance are to be equal and of value 1 k!l. Then

thus

1 Xc= 1k!l=--

2n/C1

1 c1 = 2 x 3.14 x 5o x 103 F

= 3 ~tF


input signal

(a)

signal to following amplifier

Vc (signal across C,) (b)

V (input signal)

Figure 2.5 RC coupling and its effect on the signal fed to the following stage: (a) circuit, (b) phasor diagram

Any larger value of capacitance provides better low-frequency response because the reactance is lower and less signal voltage is developed across the capacitor. Since an electrolytic type is usual because of the high capacitance, care must be taken in connecting it correctly. The collector connection is the more positive side (assuming npn type transistors) so the capacitor is connected as shown in figure 2.5a. A suitable working voltage is that of the supply since the collector of the previous stage may rise to the supply voltage while the base of the stage to which it is connected is around 1.5 V.

2.2 THE USE OF NEGATIVE FEEDBACK TO STABILISE THE GAIN OF AN AMPLIFIER

The circuit of the amplifier shown in figure 2.4 is known as an open-loop amplifier where, although the d.c. conditions have been stabilised, no attempt has been made to stabilise the gain of the stage against changes in circuit conditions.

The voltage gain, A.,. of a transistor stage is given by

output signal voltage Av = input signal voltage

The output signal voltage is determined by the product of the load resistance, RL, and the collector signal current lc. Similarly the input signal voltage is determined by the product of the transistor small-signal input resistance h1.and the signal base current /b thus

and since Ic/ I b = he •• the small-signal forward-current transfer ratio of the transistor, then

Thus the transistor parameters in conjunction with the load resistance determine the gain of the amplifier stage. However, similar types of transistor will not have identical values of current gain and input resistance and this presents difficulties when amplifiers are to be constructed using mass-production techniques. In addition, despite the fact that the amplifier may be stabilised against variations in supply voltages, small variations still occur and these could affect the values of he. and h1• as may be seen from the input and output characteristics of figure 2.6. Iff or instance the supply voltage falls, then I 8 falls with the result that the quiescent operating point Q of figure 2.6a moves down the characteristic and could move to the curved region with the result that the input resistance increases. Similarly the fall in supply voltage provides a reduced value of he. due to the 'fanning out' of the characteristics of figure 2.6b. Both effects are cumulative, resulting in a fall in the voltage gain Av. Similarly a rise in supply voltage produces a rise in gain.

To overcome these problems, control conditions are often applied to amplifiers such that they stabilise the gain of the stage against changes in supply voltages and/or differences in transistor parameters. In effect what determines the gain is not the transistor parameters but the values of the resistors used in the control circuits and these may be chosen within close limits and of high stability. Such control conditions are known as negative feedback and amplifiers so connected are known as closed-loop amplifiers.

a~ fall in 1 supply I voltage

I

~) (b)

Figure 2.6 Effect of supply voltage change on operating point: (a) input characteristic, (b) output characteristic

The block diagram of figure 2. 7 indicates one method of applying feedback and where the amplifier may be a single or multi-stage type, the condition for negative feedback being that the output signal must be anti-phase with respect to the input signal.

Amplifier (Gain A)

Figure 2. 7 Amplifier with negative feedback

In the diagram a fraction of the output voltage V0 is selected by the resistor network of R 1 and R 2 and fed back to the input terminals. This fraction, sometimes given as a percentage, is known as the feedback fraction and given the symbol fJ. Thus the signal voltage fed back to the input terminals is


the minus sign indicating phase reversal with respect to the input signal.

If, in figure 2.7, V, is the signal present at the input terminals and V1 that present immediately at the first stage of the amplifier, then the gain without feedback A is given by

and the gain with feedback A' is given by

A'= Vo v.

but V1 = V,- fJV0 , thus

from which

or

Vo = AV. -AfJVo AV.

1 + fJA

But Vo =A' the gain with feedback, hence v.

, A A = 1 +fJA


Example 2.2

Three amplifiers A, B and C are produced with open-loop gains of 103, 104 and 105 respectively. If each amplifier has 10 per cent negative feedback applied (/J = 0.01) determine the closed-loop gain for each. amplifier.

Solution Amplifier A

103 A'= = 90.9

1 +0.01 X 103

Amplifier B

104 A'= 4 = 99.0

1 +0.01 X 10

Amplifier C

10' A'= 5 = 99.9

1 +0.01 X 10

From the results it may be seen that the closed-loop gain is very much reduced from the value of the open-loop gain in each case. Of interest is the fact that the closed-loop gain approaches the reciprocal of the feedback fraction (1/0.01 = 100) as the open-loop gain increases. In fact for a high-gain amplifier, the gain with feedback is given approximately by the reciprocal of the feedback fraction and what determines the gain is the feedback components and not the device parameters or the d.c. supplies to the amplifier .. Although the overall gain has been reduced this may be overcome by using more stages each with its own feedback loop if necessary. This obviously makes the amplifier much more expensive, but as well as stabilising the amplifier gain against variation in supplies, device parameters and ageing of components, certain other benefits are obtained.

2.3 EFFECI' OF FEEDBACK ON THE BANDWIDTH OF AN AMPLIFIER

The way in which the gain of an amplifier varies with frequency is shown in figure 2.8, curve A showing the amplifier without feedback (open-loop gain) and curve B the same amplifier with feedback applied (closed-loop gain).

gain

bandwidth curve A ( f2 - f,)

maximum value curve A

0. 707 x max. value of curve A

maximum value curve 8

0.707 x max. value of curve B

f, t,

101 102 103 104

bandwidth curve B ( f2 • - f, ')

Figure 2.8 Frequency response curves for an amplifier

The fall off in gain at the low-frequency end is due to the effect of increased reactance of the coupling capacitors (see p. 22) while that at the high-frequency end is mainly due to the fact that the internal capacitance of the amplifying devices tends to provide a parallel path to earth for the signal and the reactance of this path

becomes less as the frequency is raised. Examination of both curves will show that although curve B indicates less gain it is 'flatter' than curve A (for reasons already discussed), an indication that its frequency response is better. The frequency response of an amplifier is conveniently measured by its bandwidth where the bandwidth of an amplifier is normally taken as the difference in frequency between the two points, either side of the maximum value, where the gain has fallen to 0. 707 of the maximum value. Thus in figure 2.8 the bandwidth for the amplifier without feedback is / 2 -/1 whereas for the same amplifier with feedback applied the bandwidth is wider, being given by f 2'- / 1'. Although the difference in bandwidth does not appear to be significant from an examination of figure 2.8, it should be observed that the frequency scale is plotted in a logarithmic form. In. practice, provided that the bandwidth is sufficiently large, the product of bandwidth and gain remains constant. Thus if the gain is reduced by a factor of ten then the bandwidth is increased by the same factor.

2.4 EFFECT OF FEEDBACK ON NOISE AND DISTORTION

Since the main effect of negative feedback is to reduce the gain of the amplifier, any noise or distortion produced within the amplifier and appearing at the output terminals will also be reduced when the feedback is applied. However, to maintain the same output signal voltage after the application of feedback requires that the input signal be increased. Provided that the noise or distortion in the increased input signal is no greater than that in the original lower level input signal, then the application of feedback to the amplifier has resulted in a reduction in the proportion of the noise or distortion appearing in the signal at the output terminals.

2.5 EFFECT OF FEEDBACK ON THE INPUT AND OUTPUT IMPEDANCE OF THE AMPLIFIER

Two main types of feedback circuit exist-voltage feedback and


current feedback-depending on the method of connection of the feedback network at the output terminals. Each of these may be further subdivided into either series or parallel to denote the way in which the signal being fed back is connected at the input tet1ninals.

Voltage Feedback

In this type of feedback, resistors are connected across the output terminals as shown in figures 2.9a and band the respective values of R1 and R 2 determine the feedback fraction. For both diagrams resistance has been connected in parallel with the output terminals of the amplifier so voltage feedback always reduces the output impedance of the amplifier. However for the series-voltage connection of figure 2.9a resistor R 2 is also in series with the input terminals of the amplifier, thus the input impedance is increased, whereas for the parallel-voltage connection of figure 2.9b the input impedance is reduced due to the shunting effect of resistor R 2•

Current Feedback

In this type of feedback, shown in figures 2.10a and b, the signal fed back to the input is due to the signal current flowing in a resistor in series with one of the output leads. Thus the output impedance of the amplifier is always increased for this type of connection due to the additional series resistor. However for the series-current connection of figure 2.1 Oa the resistor is also in series with the input terminals of the amplifier, thus increasing the input impedance; for the connection of figure 2.10b the resistor is in parallel with the input terminals and the input impedance of the amplifier is reduced.

To summarise

Feedback Output Input impedance impedance

series-voltage reduced increased parallel-voltage reduced reduced series-current increased increased parallel-current increased reduced


input signal

input signal

(a)

input signal

(b)

Figure 2.9 Negative feedback: (a) series-voltage, (b) parallel-voltage

(a)

output signal

input signal

(b)

Figure 2.10 Negative feedback: (a) series-current, (b) parallel-current

output signal

2.6 PRACfiCAL FEEDBACK AMPLIFIER CIRCUITS

An example of parallel-voltage negative feedback applied to an amplifier is shown in the circuit of figure 2.11 where the feedback is achieved by connecting R 1 and R 2 across the output terminals of the amplifier, their junction being connected to the base of the transistor. Because of the phase reversal that occurs in a commonemitter-connected amplifier between the input and output terminals, the proportion of the output signal fed back to the base via R 1 and R 2 is anti-phase to the input signal, that is, negative feedback. The fraction of the output signal voltage fed back is determined by the respective values of R 1 and R2 and the input resistance (h1e) of the transistor. Thus P the feedback fraction for the circuit is given by

R p = R+R 1

Vee

R,

jfkJ

Figure 2.11 Parallel-voltage negative feedback


where R is the resistance of the parallel combination of R2 and h1e.

It should be noted that the values of R 1 and R2 also determine the base bias for the circuit, the d.c. supply being the collector voltage of the transistor. Where this is not desirable or difficult to achieve, normal biasing methods may be used (see section 2.1) and a capacitor inserted between collector and R 1 to prevent the quiescent collector voltage from affecting the bias conditions.

Vee

i~

Figure 2.12 Series-current negative feedback

A circuit using series-current negative feedback is shown in figure 2.12, where it may be seen that this is a normal fully stabilised common-emitter amplifier with the decoupling capacitor across the emitter resistor omitted. Because of this the emitter of the transistor is not earthed to signal currents allowing a signal voltage to be developed across RE. The signal voltage amplified by the circuit is thus the difference between the input signal voltage and that developed across RE.

Since the signal being fed back in opposition to the input signal is that developed across the emitter resistor RE and the output


signal voltage is that developed across the load resistor R L> the feedback fraction {3 is given by

{3 = signal voltage across R E signal voltage across RL

However, since the signal currents m RE and RL are almost identical this simplifies to

2.7 THE EMITTER FOLLOWER

A circuit of particular interest is that shown in figure 2.13, where the output is taken from the emitter of the transistor, the emitter resistor REacting as the load resistor. As the input signal increases in, say, a positive direction so too does the output signal, that is, the

Vee

input

Figure 2.13 Emitter follower circuit

output 'follows' the input signal. For this reason the circuit is known as an emitter follower circuit. Since all the output signal opposes the input signal, there is 100 per cent negative feedback and the circuit must have a voltage gain which is less than unity-this may be seen by substituting {3 = 1 in the formula A' = A/(1 + {JA) to find the gain, when feedback is applied. Thus

A'=~ 1 +A

In practice the gain of the circuit may be made very close to unity. Since 100 per cent voltage negative feedback is present in this

type of circuit, the output impedance is reduced to a low value and because the feedback opposes the input signal voltage, the input irppedance increases to a very high value. Thus the properties of an emitter follower circuit may be summarised as follows.

( 1) the gain is approximately unity (2) there is no phase inversion between input and output

signals (3) the input impedance is high (4) the output impedance is low.

The emitter follower circuit is used mainly for matching purposes between high and low-impedance circuits, an example being that of an amplifier circuit which is required to feed its output signal to a remote point along a low-impedance cable as shown in the block diagram of figure 2.14.

high output high input impedance impedance

follower f \ low-imp low output edance

amplifier impedance \ J cable

Figure 2.14 Matching a high impedance to a low impedance using an emitter follower

2.8 CLASSES OF AMPLIFIER OPERATION

In general there are three main classes of amplifier operation: A, B and C, each of which is determined by the amount of bias applied to the amplifier, as indicated in figure 2.15. The use and limitations of each class are as follows.

~ c~--,

Figure 2.15 Classes of bias

Class A

The bias is arranged such that base current flows for the whole of the input signal and should ensure, as far as possible, that the signal


operates on the straight portion of the input characteristic, thus ensuring that distortion is kept to a minimum. All single-ended (one amplifying device) voltage amplifiers work in class A, the main disadvantage being that the quiescent levels of base and hence collector current have to be high relative to the signal currents in the amplifier.

Class B

The bias is arranged such that the transistor base current is very nearly at cut-off (see figure 2.15). Base current flows only during the positive excursion of the input signal (negative excursion for pnptype transistors). This type of bias cannot be used for single-ended signal voltage amplifier stages because of the severe distortion that results. Its main application, apart from switching circuits, is in class B push-putt amplifier stages (see section 2.9).

Class C

In this type the transistor is biased back beyond cut-off and base current flows in the transistor during the positive extremities of the input signal. The class C amplifier has the advantage of high efficiency since there is no quiescent current. It is commonly used in conjunction with a tuned circuit as a sinewave oscillator, since the small current pulses provided every cycle of the input waveform are sufficient to overcome the losses of the tuned circuit and thus maintain it in oscillation.

2.9 POWER AMPLIFIER CIRCUITS

The purpose of the power amplifier is to pass maximum signal power to the load with a minimum of distortion and as efficiently as possible, the efficiency of an output stage being a measure of the way in which the d.c. power supplied to the stage is converted into a.c. power (signal) in the load. Thus the efficiency 'I is given by

a.c. power in the load . 'I= . per umt

d.c. power supplied to stage


or

a.c. power in the load x 100 '1 = . per cent

· d.c. power supphed to stage

For a transistor power amplifier operating in class A the quiescent current must be high and ideally the power dissipated in the transistor equals the a.c. power in the load. Since the power dissipated in both transistor and load is supplied from the d.c. source, the theoretical maximum efficiency is 0.5 per unit or 50 per cent. In a class B stage, because the transistor is operated at or near to the cut-off point, the quiescent current is low and a theoretical efficiency of 78.5 per cent may be obtained. However, because of the distortion which is produced,· a single-ended class B stage cannot be used and a common arrangement, known as a push-pull amplifier and shown in figure 2.16, uses identical transistors as the

~1 T2

Figure 2.16 Push-pull output stage using transformers for phase splitting and matching

output pair, although in this particular circuit valves may also be used as the output devices.

In the circuit of figure 2.16, resistors R 1, R2 and RE may be chosen to provide class B bias for the amplifier. The driver transformer T1 has its centre tap secondary earthed to a.c. and thus anti-phase signals are applied to the bases of the output transistors allowing alternate half-cycles of the input signal to be amplified by each transistor. The separate half-cycles from each transistor are then added by means of transformer T2 to give an amplified version of the input signal at the load.

In practice some small forward bias is preferred on each transistor to reduce the distortion due to the curvature of the input characteristic, and the amplifier works between class A and class B in a form of bias known as class AB.

The disadvantage of this particular circuit is the use of the two transformers, T1 being required as a phase-splitter and T2 for matching purposes between the output devices and the load. However, one of the advantages that transistors have as power amplifiers compared with valves is that they are low-output impedance devices (high current, low voltage) and this enables them to be matched directly to the usual low-impedance loads leading to the arrangements shown in figures 2.17 and 2.18 which are suitable for transistor output pairs only.

In the circuit of figure 2.17, sometimes known as an asymmetric class B power amplifier, the two similar transistors are in series across the d.c. supply and under quiescent conditions point A is at a potential which is half the supply voltage. Separate secondary windings are required on the phase-splitting transformer T1 because the bases of the transistors are at different potentials. When a signal is applied at the input terminals the phase-splitting transformer provides signals which cause one transistor to increase and the other to decrease its current, that is, the resistance of one transistor is decreased and the other increased. Since both transistors are in series across the d.c. supply, point A swings up and down following the signal input and this is delivered to the load via the low reactance of the large value of capacitance.

In the circuit of figure 2.18 no transformers are required and it is usually known as a complementary push-pull amplifier. The two transistors connected across the d.c. supply are selected to have

+

TR1

T1

load

Figure 2.17 Asymmetric class B power amplifier

characteristics which are similar in shape, although one is an npn and the other a pnp-type transistor. Using this arrangement no phase-splitter is required because the same signal applied to both transistors simultaneously causes one to increase and the other to decrease current. In other respects the circuit operation is similar to that of figure 2.17. The network of R1 and R2, which together form the collector load for the driver transistor TRl, is necessary because of the differences required for the base potentials of TR2 and TR3. For a small amount of forward bias on each output transistor the base potential of the npn must be slightly more positive than its emitter whereas for the pnp it must be negative with respect to its emitter; typical voltages are indicated on the circuit of figure 2.18.


+10V

R,

5.2V

R,

4.8V

load

-ve

Figure 2.18 Complementary symmetry push-pull amplifier

2.10 LINEAR INTEGRATED CIRCUITS

The linear integrated circuit contains a large number of circuit elements, fabricated and interconnected on a chip of silicon, to provide a complex electronic circuit capable of producing at its


output some linear function of a signal applied at the input terminals. Thus complex electronic circuits can be reduced to small encapsulated units which are so versatile that it is often more convenient and economical to design particular circuits around a basic integrated circuit. This avoids the detailed design necessary when using discrete components and in addition has the advantage of ease of assembly, more compact layout and increased reliability.

invert 2

input

non-invert

offset no connection

invert input +Vee

non-invert input output

-Vee offset

Figure 2.19 Connections and encapsulation for a 741 operational amplifier

Nor is it necessary to know the circuit details of the encapsulat~d unit-merely to understand its specification.

Among the most versatile oflinear integrated circuit amplifiers is that of the operational amplifier. This is a high-gain d.c.-coupled amplifier, suitable for stable operation over a range of frequencies including zero (direct current), which may be used to realise many circuit functions by the use of suitable feedback networks connected between input and output terminals.

A popular type of operational amplifier in integrated-circuit form is the 741 which is usually housed in an eight-Pin dual in-line encapsulation similar to that shown in figure 2.19, which also shows the connections and supplies to the amplifier itself.

The general power requirements of the 741 operational amplifier are stabilised supplies of + 15 V and - 15 Vat a maximum current around 30 rnA. Positive and negative input terminals are provided which enable the output signal to be either a non-inverted or an inverted version of the input signal.

Because of the way in which amplification is carried out within the 741, it is possible for a small d.c. output to be present with no input signal. In some applications it is necessary to correct this and the two terminals marked 'offset' are used for this purpose; a typical correcting network is shown in figure 2.19.

Ideally the operational amplifier should have infinite open-loop gain, extremely high input resistance and zero output resistance. In

d.c.

output

input

v,

Figure 2.20 Inverting amplifier using 741

practice the 741 has an input resistance of about 2 MQ, an output resistance of around 75 Q and an open-loop gain of the order 200 000. This high value of gain ensures that when used with negative feedback networks the gain of the amplifier in the closedloop mode is determined almost exactly by the values of the feedback components; figure 2.20 shows how the 741 may be connected as an inverting amplifier while figure 2.21 shows the connections necessary to ensure that the amplified output is in phase with the input.

on put v, R,

Figure 2.21 Non-inverting amplifier using 741

PROBLEMS

output

2.1 The transistor shown in figure 2.22 has an hFE of 100 and provides a quiescent collector-emitter voltage of 5 V. Determine (a) a suitable value for the resistor R1 and (b) the new value of collector-emitter voltage if the transistor is replaced by a similar type with an hFE of 120, assuming that the base current is unchanged.

2.2 Draw the circuit of a fully stabilised transistor amplifier and,


10V

R,

Figure 2.22

comparing it with the unstabilised circuit of figure 2.22, state the purpose of each additional component.

2.3 (a) If the gain of an amplifier stage without feedback is A, derive an expression for the gain A' when a fraction of the output voltage is fed back in opposition to the input. (b) An amplifier with an open-loop gain of 1000 has 10 per cent negative feedback applied. Determine the value of gain with feedback.

2.4 State what is meant by (a) an open-loop amplifier and (b) a closed-loop amplifier and discuss the relative advantages of each type in terms of (i) gain, (ii) frequency response and bandwidth and (iii) noise and distortion.

2.5 (a) A multi-stage amplifier employing overall negative feedback from output to input terminals has an open-loop gain of 20 x 103• Determine the feedback fraction required to reduce the overall gain to 1000. (b) If the amplifier uses voltage negative feedback in series with the


input, state how this affects (i) the input resistance and (ii) the output resistance of the amplifier.

2.6 (a) Sketch separate connection diagrams to show how current and voltage feedback may be obtained in a transistor amplifier. For each diagram indicate how the feedback fraction is determined. (b) State two advantages of using negative feedback in an amplifier.

2. 7 What are the special properties of an emitter follower? Give a circuit diagram and suggest one application.

2.8 (a) By means of a sketch of the input characteristics of a transistor, indicate and explain what is meant by class A, B and C operation. (b) Which of the three types of operation given in (a) above may be used for (i) small-signal amplifiers and (ii) power amplifiers?

2.9 Explain with the aid of diagrams the operation of a push-pull amplifier which uses identical transistors as the output pair. List the possible reasons for using this type of amplifier in preference to a single-ended stage.

2.10 Draw the circuit diagram, including the driver stage, of a push-pull amplifier incorporating a complementary pair of transistors as the output stage. Include on the diagram a suitable value of supply voltage and typical base and emitter voltages for the output pair. Briefly explain the operation of the circuit and state the maximum efficiency to be expected from such an output stage.

2.11 State what is meant by the term linear integrated circuit and list the advantages that this type of circuit has compared with a similar circuit using discrete components.

2.12 (a) Give approximate values of input impedance, output impedance and open-loop gain of a 741-type operational amplifier. (b) Draw the circuit to indicate the connections and component values required to provide a closed-loop gain of 10 using a 741-type operational amplifier.

Answers

2.1 (a) 200 Hl; (b) 4 V 2.3 (b) 9.9 2.5 (a) 0.95 x 10- 3 ; (b) (i) increases input resistance, (ii) reduces output resistance

3. Sinewave Oscillators and Pulse Generators

The previous chapters have indicated how electronic circuits may be used to amplify and provide signal power to a load. However, a complete electronic system invariably requires some sort of waveform to be generated as part of its function; examples of such waveforms are shown in figure 3.1. All these waveforms are capable of being produced by electronic circuits known as oscillator circuits

sinewave

square wave

pulse wave

triangular

Figure 3.1 Types of waveform


and since the waveform is generated completely within the circuit itself this implies that the circuit supplies its own input.

There are two main types of oscillator-the sinewave oscillator and the relaxation oscillator. A sinewave oscillator will consist of one or more amplifying devices with some frequency-determining network introducing positive feedback at a particular frequency so that oscillation is sustained at that frequency. In the relaxation oscillator the frequency is determined by the charge and discharge of resistor-capacitor (RC) networks used in conjunction with amplifiers or similar devices. In general the relaxation oscillator provides the square, pulse or triangular waveforms of figure 3.1.

3.1 SINEW AVE OSCILLATORS

The block diagram of figure 3.2 shows an amplifier with positive feedback applied from output to input terminals. The magnitude of the voltage fed back is given by p V0 where P is the feedback fraction and Vo the signal output voltage. From the figure the output voltage V0 without feedback is given by

V0 = AV1

from which

A= Vo v;

- -o ....., Amplifier v, gain A v 0 - -o .....,

I f3Vo I Figure 3.2 Block diagram of amplifier with positive feedback

When feedback is applied the output voltage V0 is given by

or

from which

Vo =-A __ V1 1-PA (3.1)

If in equation 3.1 PAis equal to 1, then the input signal V1 is zero and the gain of the system with positive feedback is infinite, that is, the circuit supplies its own input. In addition, since the signal fed back is in phase with the signal at the input terminals, the two conditions for oscillation to be sustained may be stated as

(l) the phase shift around the loop must be zero (360 degrees) (2) the loop gain must be unity or greater.

For high-frequency oscillation a tuned circuit is usually used as the frequency-determining network. At lower frequencies in the range 15Hz to 100kHz, the use of phase-shift oscillators is preferred in order to keep the physical size of components as small as possible.

3.1.1 Tuned Oscillators

An inductor and capacitor connected in parallel as shown in figure 3.3a form a naturally resonant circuit. If the capacitor is charged by switching it across the battery supply, energy is stored in the form of an electric field between the capacitor plates. If the capacitor is now switched across the coil the charge leaks away through the inductor L producing a magnetic field around the coil. When C is fully discharged all the energy is stored in the form of a magnetic field around L, which as it collapses, produces a current charging C in the opposite direction. Thus energy is transferred from the

1 c L

(a)

Figure 3.3 Natural resonance: (a) parallel tuned circuit. (b) damped oscillation

capacitor to the inductor and back again, causing the voltage across the parallel combination to vary sinusoidally as the energy transfer takes place. However, because resistance is always present in the circuit, these oscillations will quickly die away producing the damped oscillation of figure 3.3b. By using the tuned circuit in conjunction with an amplifier, the energy losses in the tuned circuit may be overcome and oscillation sustained. If the resistance R of the tuned circuit is small, as is usual in practice, the frequency of oscillation is given by

1 f= 2n.j(LC)

SINEW AVE OSCILLATORS AND PULSE GENERATORS 37

where f is the frequency in hertz, L the inductance in henrys and C the capacitance in farads.

Various circuits using an amplifier in conjuction with the tuned circuit are possible: that of a tuned collector oscillator is shown in figure 3.4. In this circuit the necessary positive feedback is achieved because a signal component at the frequency of oscillation receives 180 degrees of phase shift through the amplifier in addition to a further 180 degrees introduced by suitable connection of the transformer secondary winding, points of similar instantaneous polarity being indicacted by the dot notation on the windings.

Vee

Figure 3.4 Tuned collector oscillator

In general the capacitor used in the tuned circuit will be a highgrade type, such as silver mica, to ensure frequency stability. Assuming a capacitance of 1000 pF then the value of inductance


required to produce oscillation at, say, 1 MHz is found from

1 f = 2n ~(LC)

Rearranging and substituting values gives

1012 L = 4 X 3.142 X 1012 X 103 H

= 25.3 JlH

Thus both the components required to produce oscillation at this frequency are of small physical size. However, this type of oscillator would not be suitable for use in the audio-frequency range particularly where variable frequency over the range is required. For this application a capacitor of the moving-plate type is required and this will have a maximum capacitance usually not in excess of 1000 pF requiring an inductance of 2536 H to produce a frequency as low as 100Hz. For this reason oscillators known as phase-shift oscillators are preferred in the audio range.

3.1.2 Phase-shift Oscillators

The 180 degrees of phase shift provided by the transformer of the circuit of figure 3.4 may be produced by the use of RC networks similar to that of figure 3.5 where the first RC section may be followed by further similar sections, the whole being known as a ladder network. For the first section of the network of figure 3.5 the output current I o leads the input current I i by a phase angle which is dependent on the frequency of the supply and the component values, but which for this single section, must be less than 90 degrees. By using three identical sections connected as a ladder network, the output current will lead the input current by 180 degrees at one particular frequency, each section providing approximately 60 degrees of phase shift. A three-section network used in conjunction with an amplifier to give the circuit of figure 3.6 then provides the necessary conditions for oscillation to occur. The output of the amplifier provides the input to the network and

1st section

Figure 3.5 RC ladder network

R,

Figure 3.6 Phase-shift oscillator

2nd section I -I to next

section

Vee

initially this will be noise consisting of a range of frequencies. The network selects the frequency which, together with the inversion present in the amplifier, provides the necessary zero phase change around the loop. Oscillations will be sustained at this frequency

provided that the gain of the amplifier is 29 or more, this minimum figure being required to overcome the attenuation provided by the RC networks. If the three resistors R are identical in value, and so too the three capacitors C, then the frequency of oscillation f is given by

1 f = 2rr:RC .j6 (3.2)

The advantage of this type of circuit is that moderately small components may be used to provide low-frequency oscillation, 100Hz being possible using values for R of about 6.8 kQ in conjunction with values for C of 0.1 J..~F. However, since the frequency is influenced by the values of R 1 and R2 and the input impedance of the transistor, the actual frequency of oscillation tends to be slightly higher than that calculated using equation 3.2.

o---"·Q c,

v,

Figure 3.7 RC network providing V; and Vo in phase at one particular frequency

Another type of phase-shift oscillator is that known as a Wien bridge oscillator. This uses the network of resistors and capacitors of figure 3. 7 where at a frequency f given by


the input signal to and the output signal from the network will be in phase. This leads to an arrangement where, by connecting the network between input and output terminals of a pair of amplifiers which themselves provide 360 degrees (zero) phase shift, the conditions for oscillation are met-the frequency of oscillation is determined by the network of capacitors and resistors.

Figure 3.8 Wien bridge oscillator

The circuit of a Wien bridge oscillator is shown in figure 3.8. A practical circuit will have both resistors R of similar value as well as both capacitors C; then the frequency of oscillation is given by

1 f= 2rr:RC


For oscillations to be sustained the amplifiers must have an overall gain of 3 or greater, which is easily achieved from the amplifier pair. In practice the amplifiers will incorporate considerable negative feedback and a temperature-dependent resistor connected as part of the feedback network is usual to stabilise the gain: one method of connection for such a resistor is shown by the dashed lines of figure 3.8. As the amplitude of the output increases so the current in the temperature-dependent resistor increases and this results in a rise of temperature of the component, causing its resistance to decrease. Thus the feedback is increased and the overall gain of the amplifier decreased, tending to maintain the output amplitude at a constant level.

This circuit is often used with modifications for variablefrequency laboratory supplies, in which case several frequency ranges may be selected by switching in different values of capacitance C, variation of frequency within the selected range being obtained by using two variable resistors R operated from a single spindle to provide variation of the resistor values simultaneously. In this application values for C of 1 JlF with the resistors R variable from about 5000 Q down to 500 Q provide a frequency range of approximately 30 to 300 Hz. If both capacitor values are changed to 0.01 JlF by means of a switch the range selected is now approximately 300 to 3000 Hz.

3.1.3 Production of a Square Waveform by Clipping a Sinewave

An approximation to a square wave may be obtained by clipping the top and bottom of a sinewave, one possible method of doing this being to apply a large-amplitude sinewave to an ·amplifier causing the amplifier to be overdriven and resulting in the clipped waveform of figure 3.9. The same result may be obtained using the circuit of figure 3.10 where the amplitude of the output is determined by the turn-on voltage of the diodes, a peak-to-peak value of about 1.0 to 1.4 V being obtained using silicon diodes.

The disadvantage of both methods is that there is pronounced slope on leading and trailing edges of the output waveform, since this is the slope of the sinewave as it crosses the horizontal axis. The square wave may be improved by using a system of successive

Figure 3.9 Clipping of a sinewave to produce a square wave

L..J

Figure 3.10 Simple circuit for clipping a sinewave

amplification and clipping as shown in figure 3.11. By this method the rise time of the square wave may be made quite fast; rise time is a measure of the quality of the waveform and is defined as the time taken for the leading edge of the signal to rise from 10 to 90 per cent of its amplitude.


~amp li tl amp li tl amp II il amp II I: Fl=J

Figure 3.11 Successive amplification and clipping to produce a square wave

Using any of the methods outlined above, the frequency of the square wave will be the same as that of the sinewave from which it was derived. For most purposes a relaxation oscillator such as the astable multivibrator is preferred.since this is capable of generating good-quality square or pulse waveforms at any desired frequency.

3.2 RELAXATION OSCILLATORS

The relaxation oscillator contains an RC network or networks in which the charge and/or discharge of the capacitor produces or initiates the waveform.

The circuit of figure 3.12a shows a capacitor being charged from a d.c. supply through a resistor, figure 3.12b indicating how the p.d.

d.c. supply v

R

r _ _J __ ,

I discharge I output waveform cJ I device I L_,. _ _j

0---------------~~------------~•._--------o

(a)

across the capacitor plates increases exponentially until the supply voltage is reached, at which time no further current ftows. A simple form of relaxation oscillator may be produced by connecting a suitable discharge device across the capacitor C as shown by the dashed lines in figure 3.12a. Discharge of the capacitor then occurs when the breakover voltage of the device is reached, at which time the capacitor is discharged very quickly until the low voltage across the capacitor and discharge device causes the breakover action to cease and the capacitor again charges towards the supply. Alternatively the charge building up across the capacitor and the exponential rise of voltage that results may be used to switch an amplifier from the non-conducting to the conducting state producing the pulse or square waveforms of figure 3.1.

I and V supply voltage V ----- --~:::=-=-----

' ' ................................. /' -~----------------------~==u--------4-time

(b)

Figure 3.12 Charge of a capacitor through a resistance: (a) circuit, (b) variation of I and Vc with time


3.2.1 Uni-junction Oscillator

The uni-junction transistor (UJT) consists of a bar of n or p-type material to the ends of which ohmic connections are made known as base one (Bl) and base two (B2). The construction diagram and circuit symbol of figure 3.13 show the more usual type of UJT which consists of an n-type bar of several thousand ohms' resistance. At some point along the bar a pn junction is formed, the connection to the p region being known as the emitter (E). When a supply is provided betweeen the two base contacts the voltage distribution along the bar is linear and if the emitter is located, say, halfway along the bar, then the p.d. between it and Bl is 0.5 times the supply voltage. The ratio of the p.d. existing between emitter and B1 is a constant for a particular UJT and is given the name intrinsic stand-off ratio symbol 'I· In practice figures for 'I between 0.4 and 0.8 are usual. If a supply V 88 is provided between B1 and B2, with B2 the more positive pole, then the voltage existing in the bar in the vicinity of the emitter will be 'IV 88. A positive potential applied to the emitter with respect to Bl which is less than 'I V88

will not change the voltage distribution in the bar since the pn junction is reverse biased. However, if VE (figure 3.13b) is increased such that it is sufficient to forward bias the junction, current carriers are injected into the bar causing high current (J E) to flow

E ---fp

Figure 3.13

B2 B2

E

n

B1

(a) (b)

Uni-junction transistor: (a) construction, (b) circuit symbol

between E and Bl. Typical characteristics for a UJT are shown in figure 3.14 from which it may be seen that the emitter-base potential VE may be increased to a maximum value just before the device turns on, this maximum value being known as the peakpoint voltage Vp of the UJT, where Vp is equal to 'I V88 plus the small potential required across the forward-biased junction. Thus the value of Vp is very nearly proportional to the supply voltage VBB·

16 Vp

emitter voltage VE

(V) 14

12

10

8

6

4

2 V88 =20V

emitter current /E(mA)

Figure 3.14 Characteristics of a uni-junction transistor

The triggering action of the UJT may be used in conjunction with an RC network to provide oscillation, a typical circuit being shown in figure 3.15. When the supply is first switched on, the capacitor C starts to charge exponentially through the resistor R and the potential between the emitter E and earth rises towards the supply voltage. At some point in this charge cycle the peak-point


Vee

R

IVVl 0------

Figure 3.15 Uni-junction oscillator

voltage Vp of the UJT is reached and the device is triggered into conduction. The current that results discharges the capacitor very quickly, causing its terminal voltage to fall to a very low value, at which time the UJT reverts to its blocking state and the charge cycle of the circuit recommences. A sawtooth waveform is thus generated across the capacitor terminals as indicated in figure 3.15 while across the base resistor R 2 a pulse waveform appears, due to the discharge current of the capacitor.

The frequency of oscillation of this type of circuit, since the time of discharge of the capacitor is relatively short, depends almost entirely on the values ofC and R, the peak-point voltage Vpand the supply voltage Vee and may be found using the exponential relationship for the charge of a capacitor through a resistance. Thus

After a time interval r, the periodic time of the generated waveform, Vp = '7 V88, then

'7Vse = Vee(l-e-r/CR)

from which the periodic time is given by

r = RCln(-1 ) 1-'7

Thus for a UJT with a value oft7 equal to 0.65 the periodic time of the waveform is given approximately by RC where R is in ohms and C in farads. As an example, if the UJT in the circuit shown has '7 equal to 0.65 and is used with a resistor R equal to 100 kQ and a capacitor C of 0.1 JlF, the periodic time r will be 10 ms giving a frequency of 100Hz. Variation of frequency may be achieved by altering the values of R and C.


3.2.2 Astable Multivibrator

A common type of relaxation oscillator is that of the astable or free-running multivibrator which is capable of producing pulse or square waveforms. The name is derived from the fact that pulse or square waveforms contain a large number of sinusoidal components covering a wide frequency range, hence multivibrations.

Several forms of the astable multivibrator are possible but one common circuit using transistors is shown in figure 3.16a. The astable circuit has two partially stable states and switching between states proceeds continuously. In one of the states TRl is conducting heavily (saturated) and TR2 is cut off, whereas for the other state the transistors switch over, TRl being cut off and TR2 saturated. The operation of the circuit may be more clearly understood using the ideal waveforms of figure 3.16b which are those obtained from various parts of the circuit. When the circuit is first switched on, since the two transistors and associated components cannot be identical, one transistor will pass more current than the other causing this transistor to saturate and switching the other off.

As!!uming that TRl is cut off and TR2 is conducting heavily, the collector ofTRl will be at the supply voltage and the base ofTR2 will be slightly above zero, keeping TR2 base circuit forward biased. Thus C 1 is charged and the potential across its plates is almost that of the supply. C2 previously charged, and holding TRl at cut-off, is discharging through R2 towards the supply voltage. After a period of time determined by the values of R 2 and C2 , C2 is completely discharged (base of TRl at zero) and now starts to charge towards the supply voltage driving TRl base positive and causing it to conduct. Transistor TRl now saturates and its collector voltage falls to zero driving the base of TR2 to - V cc because of the charge held on the plates of capacitor C 1• Capacitor C1 now discharges through R 1 towards the supply voltage Vee· After a period of time determined by the values of R 1 and C 1 , the charge on C 1 is such that TR2 is brought into the conducting state, which immediately switches offTRl and the cycle is repeated. Thus C 1R 1 determines the time for which TR2 is in its non-conducting state and C2 R 2 determines the time for which TRl is nonconducting.

TR1

TR1 collector 0

0 TR2 base_ II.

ee

TR2 collector

TR1 base

0

0

(a)

c, discharging

-Vee C 2 discharging

(b)

Figure 3.16 A stable multivibrator: waveforms

Vee

(a) circuit, (b) ideal

When the switch-over action occurs the potential across either R 1 or R 2 is2Vcc.sinceoneendisat- Vee and the other at+ Vee· The period of time that the circuit remains switched in either state may be determined by the time T taken for the voltage at the base of the non-conducting transistor to change from - V cc to zero and this may be found from

Vee= 2Vcce-T/RC

giving T the time in seconds as

T= 0.693RCs

Thus transistor TR1 is on for approximately 0.7 R2 C2 seconds and off for approximately 0. 7 R 1 C 1 seconds, the periodic time T of the waveform being given by

For a mark/space ratio of 1 : 1 (on and off times equal) both capacitors will be of equal value, as will both resistors, when

T = 1.4RCs

As an example, consider an astable multivibrator similar to that of figure 3.13 with C1 and C2 equal to 0.1 p.F, R1 a fixed resistor of 10 kO and R 2 variable from 10 kO to 100 kO. For R 2 set at the minimum value the periodic time T is given by

T =1.4RCs = 1.4 X 104 X OJ X 10- 6

= 1.4 ms

Thus the frequency f is given by

103

f=-1.4

=714Hz


The mark/space ratio of this waveform will be 1 : 1. When R 2 is set at the maximum value of 100 kO, the periodic

time T is given by

T = 0.7(104 X 10- 7 + 105 X 10- 7) S

= 0.7(1 + 10) ms = 7.7 ms

Thus the frequency f is given by

103

f=-7.7 =130Hz

If the output waveform is taken from the collector of TRl the mark/space ratio of this waveform will be 10: 1 whereas that taken from TR2 collector will be 1:10.

3.3 WAVEFORM SHAPING

If a capacitor is charged from a d.c. source through a resistor as shown in the circuit of figure 3.12, the p.d. across the capacitor plates Vc rises exponentially following the law

Vc = V(l-e-r/CR) (3.3)

where t is the time in seconds after the circuit is switched on, R the value of the resistance in ohms, C the capacitance in farads and V the supply voltage.

If t equals CR s, then

Vc= V(l-e- 1)

= 0.632 v

The product of C and R in seconds is used to define. the time constant of the network and is the time taken for the p.d. across the capacitor plates to reach 63.2 per cent of the voltage applied to the network.


If the capacitor is discharged then the time constant of the circuit is the time taken for the p.d. across the capacitor plates to decay to 36.8 per cent of its original value.

Theoretically Vc would reach the supply voltage V in infinite time but in practice the capacitor may be considered fully charged or discharged in a period of time equal to SCR seconds. This may be seen by substituting SCR for t in equation 3.3 when

Vc= V(1-e- 5 )

= 0.9933 v

Thus in a time interval five times longer than the time constant of the network, the p.d. across the capacitor plates will be 99.33 per cent of the applied voltage.

The square waveform of figure 3.16b, produced by a multivibrator, may be considered as a source of supply being switched alternately on and off. If a similar waveform is applied to an RC network, the capacitor charges during the ON period and is discharged during the time for which the waveform is. at zero or OFF. If the ON and OFF time intervals are greater than SCR s, where CR sis the time constant of the network to which the square waveform is applied, then the capacitor charges and discharges fully during the ON and OFF periods respectively. If the ON and OFF time intervals are shorter than SCR s then the capacitor is not able to charge or discharge fully. Thus the shape of the output waveform, from an RC network to which a square or pulse waveform is applied, depends on the time constant of the network and the periodic time of the input waveform. In particular if the CR time constant of a network is one-tenth or less than the periodic time of a square waveform applied at its input terminals, it may be considered to have a short time constant, whereas if the time constant is ten times longer than the periodic time it may be considered to be a long time constant.

3.3.1 Short Time Constant

Consider a circuit similar to that of figure 3.17a where the network time constant is short compared with the periodic time of a square waveform applied at its input terminals. At the instant the

,_Vc o----.~~1~--~--.-----o

input waveform

10V

input

0

10V

0

-10V

10V

0

(a)

(b)

output VR

Figure 3.17 Waveforms derived from a network with a short time constant: (a) network, (b) waveforms

waveform is first applied to the network, its leading edge causes the left-hand plate of the capacitor to rise to 10 V and, since the capacitor cannot charge immediately, the right-hand plate, which is also the output terminal of the network, rises to 10 Vas shown by the waveform diagrams of figure 3.17b. During the period that the input remains at 10 V the capacitor Cis able to charge through the resistor R, allowing the right-hand plate and hence the output voltage VR to fall to zero, at which time the capacitor is fully charged. When the input falls to zero, taking the left-hand plate of

the capacitor with it, the capacitor is unable to discharge immediately. The result is that both plates falllO V causing the lefthand plate to return to zero and driving the right-hand plate down to -10 V. During the time that the input remains constant at zero, the capacitor is able to discharge, allowing the right-hand plate to become zero, at which time the capacitor is fully discharged. Thus the output waveform ( VR) is a series of positive and negative 'spikes' often referred to as a differentiated waveform since it indicates approximately the slope of the input waveform.

It may be seen from the waveform diagrams of figure 3.17b that the average level of 5 V present in the input waveform is not contained in the output, since this is symmetrical about the horizontal axis. Instead it appears as the average level of voltage across the capacitor plates.

3.3.2 Long Time Constant

A similar charge and discharge of the capacitor occurs when a square waveform is applied to an RC network (figure 3.18a) in which the time constant is long compared with the periodic time of the input waveform. However, in this case, the capacitor is not able to charge and discharge fully during the ON and OFF periods and after a relatively short interval of time an equilibrium situation is reached where charge and discharge are equal; the waveforms then appearing across the resistor and capacitor are shown in figure 3.18b.

The triangular waveform present across the capacitor C is caused by the charge and discharge of the capacitor, the average level of 5 V on which it is superimposed being acquired as the charge on the capacitor builds up until charge and discharge are equal. The waveform across the resistor R, although similar to the input waveform, is symmetrical about the horizontal axis indicating that it has lost the average level of 5 V present in the input waveform. In addition there is a 'tilt' on the top and bottom ofthe waveform, the amount being dependent on the time constant of the network in relation to the periodic time of the input waveform, the longer the time constant the less 'tilt'. Either waveform may be used as the output but the network is widely used as the coupling


input waveform

mput

Vc 5V

(a)

(b)

output

VR

average level

Figure 3.18 Waveforms derived from a network with a long time constant: (a) network, (b) waveforms

CJJ

stage II ri stage

1 R 2 amplifier amplifier

'I

Figure 3.19 RC network used as coupling between amplifier stages


between amplifier stages, as shown in figure 3.19, where the input to stage 2 is the waveform appearing across the resistor R. In this application, not only does it prevent any d.c. level at the output of stage 1 from affecting the bias conditions of stage 2, but it also preserves the shape of the waveform, provided the network has a long time constant in relation to the periodic time of the input waveform.

PROBLEMS

3.1 What are the two essential requirements for the production of steady oscillations in an oscillator circuit?

3.2 An oscillatory circuit having an inductance of 1 mH is tuned to resonate with a capacitor which can be varied from 100 to 500 pF. Determine the upper and lower frequencies of oscillation.

3.3 (a) Draw the circuit diagram of a tuned collector oscillator, explain its principle of operation and indicate two methods of obtaining the output from the circuit. How could the feedback fraction be altered in an oscillator of this type? (b) Explain why it is not essential to use class A operation with this type of oscillator. (c) If a tuned collector oscillator is required to operate at 10kHz determine the value of the inductance required in the tuned circuit if the capacitor value is 0.01 JtF.

3.4 (a) A three-section phase-shift oscillator, similar to that of figure 3.6, is required to operate at 1000 Hz. If the three sections are to be identical and the capacitors Care each of0.01 JtF, determine the value of resistance R required for each section. (b) State the minimum gain required from the amplifier section of such an oscillator for oscillations to be sustained and explain the effect on the output waveform if the open-loop gain of the amplifier is appreciably greater than this minimum value.

3.5 (a) Draw the circuit of either a single-stage or a two-stage transistor phase-shift oscillator and state how the frequency of

oscillation may be determined from the circuit components. (b) Why are phase-shift oscillators used in preference to LC tuned circuit oscillators for the generation of audio-frequency test signals. (c) Explain how the two conditions for oscillation to be sustained are satisfied in the circuit given for (a) above.

3.6 Sketch a diagram of a Wien bridge oscillator and explain the operation of the circuit.

State the formula for the frequency of oscillation in terms of the circuit components and indicate how frequency control may be obtained. Give reasons for differences between the theoretical and actual frequency of oscillation.

3. 7 Sketch a diagram to show how a square wave may be obtained by clipping a sinewave and list the disadvantages of this method compared with that of using an astable multivibrator to generate the waveform.

3.8 Sketch typical static characteristics for a uni-junction transistor and explain its principle of operation.

State what is meant by the term intrinsic stand-off ratio and give a typical value.

3.9 A uni-junction transistor oscillator similar to that of figure 3.15 is required to operate at 500Hz. If '1 = 0.6 and C = 0.2 JtF determine an approximate value for R.

3.10 (a) Explain, with the aid of a circuit diagram and waveforms, the action of a transistorised astable multivibrator. (b) Derive a general expression for the cut-off period of one of the transistors. (c) Using the general expression obtained in (b) above indicate how (i) the frequency of oscillation and (ii) the mark/space ratio of the waveform may be determined.

3.11 An astable multivibrator similar to that of figure 3.16 is supplied from a 15 V source and has the following component values: R1 and R2 = 47 kn, C1 = 0.1 JtF, C2 = 0.5 JtF. If the

output is taken from the collector ofTR2 determine (a) the mark/ space ratio (b) the frequency and (c) the approximate peak-topeak value of the output waveform.

3.12 (a) Explain what is meant by the 'time constant' of an RC circuit. (b) A capacitor of value O.olttF is charged from a d.c. supply of 200 V through a resistance of 100 kO. Determine (i) the time constant of the network in seconds and (ii) the time taken for the p.d. across the capacitor plates to rise to 150 V. (c) If the RC network in (b) above is to be used to provide a differentiated waveform from a square wave input, determine a suitable input frequency.

Answers

3.2 503kHz, 225kHz 3.3 25.33 mH 3.4 6.5 kO 3.9 10.9 kO 3.11 (a) 1:5; (b) 51 Hz; (c) 15 V 3.12 (b) (i) 1 ms; (ii) 1.4 ms; (c) 100Hz or less


4. Digital Electronics Most problems are not capable of simple solution in the sense that a yes/no decision cannot be made until several factors are considered. In arriving at a solution to a problem the process is one of a series of yes/no decisions taken in sequence to arrive at an overall result. Electronic circuits may be used to form a 'model' of a particular problem and by the use of simple ON/OFF circuits simulating the alternatives, the solutions to complex problems may be obtained.

This yes/no (ON/OFF) type of circuit repeated many times and capable of being connected in various combinations is the basis of digital electronics, 'digital' in the sense that a definite level of voltage exists for a particular state. Circuits of this type are known as logic circuits.

The pocket calculator is an example of digital electronics where both the input and the displayed result need to be in the usual decimal format whereas the actual arithmetic may be performed in any suitable system. It would be possible to have ten discrete steps or levels of voltage to represent the digits 0 to 9 and to count and display using decimal throughout. However, this presents difficulties in establishing and maintaining levels, so the arithmetic is done using the binary system where the radix of the system is two (the radix of the decimal system is ten).

In general to state a number in binary form requires two to three times as many digits as expressing the same number in decimal. In addition some conversion from decimal to binary is required to interface between input keys and arithmetic unit, followed by conversion from binary to decimal after computation so that the result may be displayed in decimal form. Despite these disadvantages, binary arithmetic is preferred because of its convenience and speed of operation. In binary counting the only two digits to appear are 1 and 0 and these may be represented by the ON/OFF conditions of a switch. Thus 1 could indicate a voltage present and 0 pot present.

Logical electronic circuits have definite bands of voltage allocated to them to indicate the levels 0 and 1. Thus 1 may be indicated by any level between, say, 3 and 5 V while 0 is represented by any level between 0 and 0.5 V. This type of logic is known as positive logic. Sometimes a negative logic system is used where the level between 3 and 5 V represents logical 0 and that between 0 and 0.5 V

positive logic negative logic

5V --- -r-~r------,---- -.-------.

3V 0

j __ _ 0

Figure 4.1 Illustrating the difference between positive and negative logic

represents logical 1. The two systems are indicated diagrammatically in figure 4.1 where it may be seen that if 1 is more positive than 0 positive logic is in use. If 1 is more negative than 0 the logic system is negative. Both types of logic may be used in a particular sysfem in order to simplify the overall design.

4.1 LOGICAL FUNCTIONS

The three basic logic functions are those of the AND, OR and NOT logical functions the symbols for which are shown in figure 4.2.

(a) (b) (c)

Figure 4.2 Symbols for the three basic gates: (a) two-input AND gate, (b) two-input OR gate, (c) NOT gate

AND Gate

The output of an AND gate is logicall if all inputs are at logicall. Thus in figure 4.3a which shows a three-input AND gate, inputs A,

DIGITAL ELECTRONICS 51

~~· 8.C A 8 c F

0 0 0 0 0 0 1 0 0 1 0 0

(a) 0 1 1 0 1 0 0 0 1 0 1 0

A 8 C 1 1 0 0

~ .------/ .______/' ~t 1 1 1 1

(b) (c)

Figure 4.3 Three-input AND gate: (a) symbol, (b) equivalent circuit, (c) truth table

Band C must be at logical 1 for there to be logical 1 at the output terminal F. AND gates may have any number of input terminals but it is still the case that all inputs must be logicall for there to be logical1 at the output. Basically the AND gate behaves in a similar way to switches in series as indicated in figure 4.3b, that is, there is no output if any one of the switches is not made. Also shown in figure 4.3c is the truth table for a three-input AND gate which shows all possible input combinations and the output that results for each. This may also be expressed in the notation of Boolean algebra as

F = A.B.C

the 'dot' indicating the AND function and being read as 'F equals A and Band C'.

OR Gate

The output of an OR gate is logical 1 if any one or more of its inputs is at logicall. OR gates behave in a similar way to switches in parallel as shown in figure 4.4, which also gives the circuit symbol and truth table for a three-input OR gate. In Boolean algebra form the function of an OR gate may be expressed as

F = A+B+C


=~A+B+C A 8 c F

(a) 0 0 0 0 0 0 1 1 0 1 0 1

~:f' 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1

(b) (c)

Figure 4.4 Three-input OR gate: (a) symbol, (b) equivalent circuit, (c) truth table

the'+' sign indicating the OR function and being read as 'F equals A orB or C'.

NOT Gate

The NOT gate behaves as an inverter, that is, if logical 1 is presented at its input terminal, 0 results at the output; if the input is logical 0 the output will be logicall. Figure 4.5 indicates the circuit symbol and truth table for the NOT gate, inversion or negation being shown by placing a 'bar' over the function. Thus expressing the function of a NOT gate in Boolean algebra form gives

to be read as 'F equals not A'.

(a)

A

0 1

(b)

F

1 0

Figure 4.5 NOT gate: (a) symbol, (b) truth table

NAND and NOR Gates

By combining a NOT and an AND gate the NOT -AND or NAND function is generated and similarly the combination of NOT -OR gives the NOR function. The symbols and truth tables for threeinput NAND and NOR gates are shown in figures 4.6 and 4.7 respectively.

A

8

c A 8 c F

AND NOT =NAND 0 0 0 1 (a) 0 0 1 1

0 1 0 1 0 1 1 1 1 0 0 1 ECYo- 1 0 1 1 A.8.C 1 1 0 1 1 1 1 0

(b) (c)

Figure 4.6 Three-input NAND gate: (a) separate gates, (b) symbol, (c) truth table

A

8

c A 8 c F

OR NOT =NOR 0 0 0 1 (a) 0 0 1 0 0 1 0 0 0 1 1 0

A 1 0 0 0 1 0 1 0

8 1 1 0 0 c 1 1 1 0

(b) (c)

Figure 4.7 Three-input NOR gate: (a) separate gates, (b) symbol, (c) truth table

4.2 DIGITAL DEVICES

Perhaps the most common type of digital device is that of the ON/OFF switch. This is a relatively slow device, manually operated, in which contacts are made to move. A more sophisticated device is the electromagnetic relay which can carry several independent contacts and is operated by passing current through a coil. Again the electromagnetic relay is slow in operation because of the moving parts associated with the device.

Speed of operation of the ON/OFF device chosen for logic circuits is important since the circuits may be repeated hundreds of times and the sequence of yes/no decisions to arrive at an overall result may then be time-consuming. To speed up the process use is made of semiconductor devices in which there are no moving parts.

4.2.1 The Semiconductor Diode as a Switch

The characteristic curve of a semiconductor diode together with its circuit symbol is shown in figure 4.8. A device with this type of characteristic is suitable as a switch since a supply voltage in excess of the turn-on voltage of the diode applied in the forward direction

anode IIJII cathode

reverse bias -off

leakage current

Figure 4.8 Diode characteristic and symbol

turn-on voltage

slope resistance


(anode positive with respect to cathode) causes current to ftow, whereas if the supply to the diode is reversed no current apart from leakage is present. The silicon diode is ideal for switching purposes since its leakage current is very low, of the order a few nanoamperes, and its forward slope resistance is also low. How quickly the diode may be switched from the ON or conducting direction to the OFF or non-conducting condition is known as the recovery time of the diode. For switching diodes this will not exceed a few nanoseconds.

4.2.2 The Transistor as a Switch

The simple circuit of figure 4.9a shows how a transistor may be used as a switch. If the input of the transistor is connected to 0 then there is no collector current and, since there is no p.d. across R L• the output will be at the supply voltage, that is, logical 1. When the input is connected to 1, base current, and hence collector current ftows in the transistor and a suitable choice of resistor values will cause the output to be very nearly zero, that is, the logical 0 condition. Notice for this connection that the transistor behaves as an inverter where F = A. If non-inversion is required then the emitter follower connection of figure 4.9b may be used where F =A.

F=A

F=A

(a) (b)

Figure 4.9 Transistor as a switch: (a) inversion, (b) noninversion


4.3 LOGIC CIRCUITS

Several logic circuit types are available some of which together with their usual abbreviations are listed below.

DRL DTL TTL ECL CMOS

Diode-resistor logic Diode-transistor logic Transistor-transistor logic Emitter-coupled logic Complementary metal-oxide semiconductor

Each type of logic indicates the components used in its construction, the choice of type to use for a particular application being dependent on several factors such as speed of operation and immunity from noise-this being the degree to which the logic circuit can withstand variations of logic levels at its input without altering the logic level at the output. In the circuits that follow, only DRL and DTL types will be considered but the principles are similar for all logic families.

4.3.1 AND/OR Logic Circuits

The circuits of figures 4.10a and b show AND/OR gates using DRL and DTL logic respectively. Assuming for both circuits that + 5 V equals logicall, that is, positive logic, then with both inputs A and B at logical 0 the output line F will be at logical 0 since both diodes conduct and the forward resistance of the diodes is low compared with the resistance of R. Notice that the only time logical 1 appears at the output terminals is when both inputs are at logical 1. Thus for positive logic both circuits behave as AND gates.

If now it is assumed that + 5 V equals logical 0 and 0 V equals logicall, that is, negative logic, then + 5 Vat input terminals A and B results in + 5 V at the output, that is, logical 0. If one or both of the inputs is logicall, that is, 0 V, then the output will be 0 V which is logical!. This is the OR function. Hence both circuits behave as AND gates for positive logic and OR gates for negative logic.

By reversing the diodes and connecting the circuits as shown in figures 4.1la and b the OR function for positive logic is obtained and the same circuits behave as AND gates for negative logic.

+5V +5V

R

;;J;o (a) (b)

Figure 4.10 Two-input AND/OR gates: (a) diode-resistor logic, (b) diode-transistor logic

+5V

(a) (b)

Figure 4.11 Two-input OR/AND gates: (a) diode-resistor logic (b) diode transistor logic

4.3.2 NAND/NOR Logic Circuits

The normal amplifier connection, similar to that of figure 4.9a, for the transistor in place of the emitter follower connection shown in figures 4.10b and 4.11b gives the inverted function, that is, NAND/NOR and NOR/NAND respectively.

4.4 EXAMPLES OF SIMPLE LOGIC APPLICATIONS

Consider the following statement: 'If both Ron and Eric are going to the meeting John will go with them'

This implies that there are conditions to be met before John attends the meeting. Let

A be Ron attending the meeting B be Eric attending the meeting and F be John attending the meeting

Then in Boolean algebra form

F=A.B

If the condition of John attending the meeting had been either Ron or Eric attending then this would be written

F=A+B

In a similar way consider a simple monitoring circuit where an indicator light is required to come on if several conditions are met at the same time. Such a condition could occur in air-cooled rackmounted electronic equipment where all units must be correctly positioned and the blower motor operative before power can be switched to the electronic units; the satisfactory condition is indicated by a 'start' light. Such a system could use AND gates, one of the inputs being controlled from the pressure-operated switch associated with the air blower system, all other inputs being made by means of inter-locks as the individual units are correctly positioned in the rack. The system is made a little more sophisti-


cated if the AND gate, instead of operating a start light, actually allows power to be switched to the units and a NOT gate is used to indicate a fault condition by means of a light. A simple logic diagram for such a system is shown in figure 4.12 where, although only three inputs are shown to the AND gate, logic circuits capable of handling more than three inputs could be used although it should be noted that any unused inputs must be permanently connected to logical 1.

mput from pressure SWitCh log1cal 1 output

allows power to be SWitched to un1ts

Figure 4.12 Logic diagram for simple control and warning system

An alternative method of increasing (expanding) the number of inputs if only three-input AND gates are available, is to use the arrangement shown in the logic diagram of figure 4.13 which provides for up to nine inputs using four three-input AND gates.

As another example of using NOT gates in control systems consider a situation where of three inputs A, Band C a circuit is to be made when A and Bare present but not C. In Boolean algebra form this is

F = A.B.C

The logic diagram for this function, together with its truth table, is shown in figure 4.14. Such a situation could occur as part of the logic circuitry of traffic lights where an output at F may be


&

Figure 4.13 Nine-input AND gate using four three-input AND gates

Au---------,

controlling the switching of the green light and the input for C is derived from the condition of the red light. This ensures that at no time can the red and green lights be on together.

4.5 NAND AND NOR GATES ONLY

If a one-input NAND gate has its input at logical 0 the output will be logical 1 and similarly when the input is 1 the output will be 0. This is the NOT function. The same result may be achieved using a NAND gate with any number of inputs, since by connecting all inputs but one to logical 1 the gate now behaves as an inverter. Figure 4.15 shows the arrangement using a three-input NAND gate.

A 8 c c F

& F=A.8.C 0 0 0 1 0 8~----------------~ 0 0 1 0 0

0 1 0 1 0 0 1 1 0 0 1 0 0 1 0

CO--~ 1 0 1 0 0 1 1 0 1 1 1 1 1 0 0

Figure 4.14 Logic diagram and truth table for F =A. B .C

A

1 0

8 c F

0 1

Figure 4.15 Logic diagram and truth table for three-input NAND gate connected as a NOT gate

Figure 4.16 shows a three-input NAND gate followed by a oneinput NAND gate, togeth~r with the truth table for the combination. It can be seen by examination of the final column that the overall result is similar to a three-input AND gate where F = A.B.C.

Using NAND gates only, the OR and NOR functions may be generated as indicated by the logic diagrams and truth tables of figure 4.17. Inspection of the last two columns of the truth table in conjunction with the inputs A, B and C shows that


A.B.C A 8 c A.B.C A.B.C A

B.C 0 0 0 1 0 8 0 0 1 1 0 c 0 1 0 1 0

0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1

Figure-4.16 Three-input AND gate using NAND gates

A.B. C =A +8 +C A.B.C=A+B+C

OR function NOR function

A 8 c A 8 c A.'B.c A".s.c 0 0 0 1 1 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 0 1 1 1 0 0 1 0 1 0 0 0 1 1 1 0 1 0 1 0 1 0 1 0 1 1 0 0 0 1 1 0 1 1 1 0 0 0 1 0

Figure 4.17 Logic diagram and truth table for OR and NOR functions using NAND gates only


A A +8 +C =A +8 +C

A 8 c A +8+C A +8+C

8 0 0 0 1 0

I c 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1

OR function 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 0 1

Figure 4.18 Logic diagram and truth table for OR function using NOR gates only

A.B.C = A+B+C the OR function

and

A.B.C = A+B+C the NOR function

The multi-input NOR gate may also be used as a NOT gate by supplying only one of its inputs and leaving all others at logical 0. In a similar way to NAND gates, combinations of NOR gates may be used to provide all other functions: figure 4.18 shows the logic diagram and truth table which provides the OR function, while figure 4.19 gives the logic diagram and truth table for producing both AND and NAND functions. Inspection of the last two columns of the truth table of figure 4.19 in conjunction with the inputs A, B and C shows that

A+B+C = A.B.C the AND function

and

A+B+C = A.B.C the NAND function

Thus it is possible to use NAND or NOR gates to produce any desired function and this is sometimes useful in allowing only one type of gate to be used.

Of particular interest from the above results are

A.B.C = A+B+C

A+B+C = A.B.C

the OR function using NAND gates only

the AND function using NOR gates only

These show that when individual inputs are negated and the whole then inverted, the result may be obtained by removing all negation signs and changing the signs between the terms, that is '.' to '+ '. and '+'to '. '. This is a form of De Morgan's theorem-useful in simplifying logical expressions.

4.6 NAND AND NOR GATES ONLY LOGIC DIAGRAMS

Consider the example used previously of F = A.B. C, the logic diagram for which was shown in figure 4.14. Replacing the AND and NOT gates with NAND equivalents gives the logic diagram and truth table of figure 4.20. In a similar way the same logic function may be produced using NOR gates only, as shown in figure 4.2la. However, examination of this logic diagram indicates that two of the gates are redundant and they may be replaced by a single wire giving the simplified logic diagram of figure 4.21 b. That this is so may be seen using Boolean algebra, since C = C. Thus

A+B+C = A+B+C = A.B.C

> --A o-----f

c

A 8 c A

0 0 0 0 0 1 0 0 0 1 1

0 0 0 0 1 0

0 0 0

I AND gate

8 c

1 1 0 0 1 0 0 1 1 1 0 0 1 0 0

A+8+C

0 0 0 0 0 0 0

A+8+C

1 0


Figure 4.19 Logic diagram and truth table for AND and NAND functions using NOR gates only

AO------.....,

8

c

~---=-=-----1 A 8

0 0 0 0 0 1 0 1

0 0

c

0 1 0 1 0 1 0

c

0

0 1 0 1 0

A.8.C

1 0

Figure 4.20 Logic diagram and truth table for F = A . B. E using NAND gates only

A.8.C

0 0 0 0 0 0 1 0


(a)

A 8 c 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A 8

1 1 1 1 1 0 1 0 0 1 0 1 0 0 0 0

c 1 0 1 0 1 0 1 0

(c)

c

A+B+C=A.B.C

0 0 0 0 0 0 1 0

(b)

Figure 4.21 Logic diagrams and truth tables for F = A.B. C using NOR gates only: (a) full diagram, (b) simplified diagram, (c) truth table

Example 4.1

The permissible states in a safety system are expressed by the logic function

F = A.B+C

Draw logic diagrams to show how this may be achieved using (a) AND, OR and NOT gates (b) NAND gates only and (c) NOR

gates only. Solution The logic diagram using AND, OR and NOT gates is shown in figure 4.22a from which it is seen that the function may be realised using four gates. Figure 4.22b shows the logic diagram using NAND gates only, where after simplification it is seen that five gates are required. Of interest is figure 4.22c which indicates that after eliminating redundant gates only three NOR elements are required to realise the function.

8

c

NOT

A

8

NOT

c

NOT

NOT

NOT

(a)

(b)

--------, I I ·A~~ I I ~s~

c

A.B+C


redundant gates

eliminated

eliminated

Figure 4.22 Logic diagrams for F = A.B+C using: (a) AND, OR and NOT gates, (b) NAND gates only, (c) NOR gates only


4.7 RULES OF LOGIC

A logical equation is not simply the equivalent of an algebraic equation, since the symbols used may only represent 0 or 1. Because of this, laws and theorems exist which are useful in simplifying logical equations and some of these are given below.

Commutative Law

A.B =B. A A+B = B+A

These follow the rules for normal algebraic equations indicating that the terms may be put in any order.

Associative Law

A.B.C = A.(B.C) = (A.C).B A+B+C = A+(B+C) = (A+B)+C

These are similar to normal algebraic equations.

Distributive Law

A.(B+C) = A.B+A.C A+B.C = (A+B)(A+C)

The first of these is similar to normal algebraic equations but the second is not and is proved by the use of truth tables later in this section.

De Morgan's Theorem

A.B =A+B A+B = A.B

This was mentioned in section 4.5 but is shown here in its usual form.

Useful Identities

O.A =0 l.A=A

0=1 O+A=A 1+A = 1

A.A=A A+A=A A.A =0

A=A A+A=1

All the above may be seen to be true by reasoning or by the use of truth tables. As an example of proof using truth tables consider the Boolean equation A+ B. C = (A+ B). (A+ C) which is a form of the distributive law and is set out in table 4.1. Notice that columns are included for all terms in the equation and that, for instance, the fourth column headed B. C has logical1 entered when Band Care both logical 1 but 0 for all other conditions. The last two columns are identical indicating that A +B. C is equal to (A+ B) . (A +C).

Table 4.1

A B c B.C A +B A +C A+B.C (A +B). (A +C)

0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 1 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 1 1 0 1 0 1 1 1 1 0 0 1 1 1 1 1 1 1 1

The use of the above laws and identities in simplifying Boolean equations may be seen using table 4.1 where a logieal1 appearing in the final column must have been produced by the state of the three input lines A, Band C in the same row as the logical1 output. Thus in the fourth row where logical1 appears in the final column the input lines are A . B. C. Repeating this for every logical 1

appearing in the final column gives the total function F as

Using the commutative and distributive laws this simplifies to

F = A.C. (B+B)+A.C. (B+B)+A.B.C = A. C. 1 +A. C. 1 +A.B. C since B + B = 1 = A. C +A. C +A.B. C since A. 1 = A = A. (C +C)+ A.B. C distributive law = A. 1 +A.B. C since C + C = 1 = (A+ A) . (A+ B) . (A+ C) distributive law = 1. (A+ B) . (A +C) since A +A = 1 = (A +B) . (A+ C)

4.8 SIMPLE MEMORY CIRCUIT

In digital systems it is often necessary to store the logic states 0 or 1 existing at a particular instant so that they may be used some time later. The basic one 'bit' store is the bistable or flip-flop circuit which can be set in one of two stable states 0 or 1 in response to a given set of input conditions which are themselves in the form of 'bits' 0 and 1. Such a circuit is said to have a memory, since once triggered into one of its stable states it is able to hold this indefinitely provided the power is maintained to the bistable.

A simple memory circuit known as an R-S (reset-set) bistable is obtained by using NOR or NAND gates connected as shown in figures 4.23a and b respectively, both logic circuits producing the same function. The circuit symbol of an R-S bistable, together with its truth table, is shown in figure 4.24 from which it 'should be noted that for normal operation output Q is always the logical complement of Q.

The operation of the bistable is .as follows. Assume that the bistable is in one of its stable states with Q at logical 0 and Q at logical 1. A logical! to the S terminal causes Q to become logical 0 and this in turn, because of the cross-coupling between the gates, produces a 1 output at Q. The signal needs to be applied only momentarily to programme the bistable into its alternative state,


(a) (b)

Figure 4.23 R-S bistable usmg: (a) NOR gates, (b) NAND gates

although it should be noted that the signal must be fed to the correct terminal for the change of state to occur, since a logicall to the S terminal when output Q is already at logicall will not change the state of the bistable. Logical! inputs to both Sand R terminals simultaneously will cause both output terminals to become logical 0. If the input pulses are removed simultaneously one output terminal remains at logical 0 and the other is triggered to the logical 1 condition, the decision as to which terminal remains at 0 being decided by the circuit constants, since these will not be identical. In practice this indeterminate situation is avoided and in the case of sequential pulses being fed to the bistable, when for instance it is used as part of a counter chain, the inclusion of steering diodes at the input of the bistable enables the two trigger input lines RandS to be replaced by a single line. The diodes then steer or route the input pulses from the single line to the correct gate terminal in order that each successive pulse changes the state of the bistable.

A system of four bistables connected as a simple binary counter is shown in the block diagram of figure 4.25 where each of the blocks A, B, C and D consists of a bistable incorporating steering diodes, the output from each bistable feeding the input terminal of the next. Using this system a binary count up to 1111 (15 in


s R Q l5 Remarks s Q ,... ,... ,.,.. ,.,.. 0 0 1 ~}

Depends on

0 0 0 circuit constants or previous inputs

~----

R 0 1 0 1 ~ } Normal 0 1 0 operation ,... ,... ,.,.. - Not used

(a) (b)

Figure 4.24 R-S bistable: (a) symbol, (b) truth table

in put QA Oa -oc ,.....- Oo

A B c D QA ~ De Oo _;.;. - --r--- T~

set re

To read-out circuitry

Figure 4.25 Block diagram of R-S bistables connected as a ripple-through counter

decimal) is possible; this type of counter is known as an asynchronous or ripple-through counter.

4.9 DIGITAL INTEGRATED CIRCUITS

Because of the ease with which transistors can be fabricated in integrated-circuit form compared with resistors (see chapter 6), certain types of logic have tended to be more popular than others with integrated circuit manufacturers. A prime example of this is the 7400 series of TTL (transistor-transistor logic) digital in-

tegrated circuits housed in a dual in-line plastics encapsulation with 14- or 16-pin outlet; some typical examples are shown in figure 4.26.

The circuit diagram of an integrated circuit, positive logic TTL three-input NAND gate is shown in figure 4.27, where it is seen that the number of resistors has been kept to a minimum and further that they are of low value. The input transistor TR1 has a single base and collector but three emitters, these representing the three inputs A, Band C. When all three inputs are at logical1 the collector ofTR1 is also at logical1 and this stage thus functions as an AND gate, the rest of the circuit providing inversion to give the overall NAND function.

In general TTL integrated-devices are specified to operate from a nominal5 V supply and the maximum supply value is around 7 to 8 V. Damage will result if the supply rises above this limit even momentarily. In the same way, since the logical 1 input is the application of the 5 V supply, any input greater than about 6 or 7 V from a low-impedance source is likely to damage the device because of excess current in the input circuits. Care should also be exercised when probing during fault-finding or routine setting-up procedures, since an accidental short-circuit of a 'low' (logical 0, positive logic) output line to the supply rail could cause an overload condition resulting in damage to the output transistor associated with the integrated circuit.

Another popular type of logic is that known as complementary metal-oxide semiconductor logic (CMOS). This type is based on

Vee

GRND (a) 7402

GRND (b) 7410

Figure 4.26 TTL integrated circuit logic devices: (a) quadruple two-input NOR gate, (b) triple three-input NAND gate

A 8 c


Vee ~-----------.------------~

1 k!l

Figure 4.27 Positive logic TTL three-input NAND gate

metal-oxide semiconductor field-effect transistors where a substrate of say p-type silicon has diffused into it two n-type regions as shown in figure 4.28. A layer of silicon oxide on the surface acts as an insulator and above this is a metallic layer known as the gate terminal. If the two n regions-source and drain-are connected to a d.c. supply, no conduction takes place between them in the absence of a gate voltage. However, if the gate is made positive with respect to the substrate, electrons are drawn up in a layer below the insulator, producing an n channel between the two diffused n regions and allowing electrons to flow between the regions when the drain is made positive with respect to the source. A p channel device starts with a substrate of n-type material and has two p regions diffused. In this case a negative potential with respect to the substrate must be applied to the gate to produce a p channel and the drain will need to be operated with a potential negative with


gate

msulator source drain

p-type substrate

Figure 4.28 Construction of n channel MOS transistor

respect to the source for 'hole' current to flow in the channel. The circuit symbols for both n and p channel type MOS devices, together with their normally required operating potentials, are shown in figure 4.29.

Initially, MOS integrated logic circuits were based on p channel type devices, MOS integration having the advantage over con-

dram ( +) drain (-)

substrate substrate

gate ( +) gate (-)

(a) source (zero) (b) source (zero)

Figure 4.29 Symbols for MOS transistors: (a) n channel, (b) p channel

ventional transistor integration of higher packing density on a given size chip, because there is no need for isolation between devices, nor are buried or epitaxial layers required (see chapter 6). The introduction of n channel devices in integrated-circuit form allowed switching speeds approximately twice as fast as that achieved with p channel types and this was followed by CMOS where both p and n channel devices are produced on the same substrate. This reduces the packing density on the chip because of the need for isolation between devices but it enables higher switching speeds to be achieved.

A simplified circuit of a CMOS inverter or NOT gate working in positive logic is shown in figure 4.30, where the p channel device acts as the load for the n channel type. When logical 0 is applied to

v ( +)

5._-..,

G

p channel

D A

D

n channel

Figure 4.30 CMOS inverter or NOT gate

the input terminals the biasing arrangement is such that the p channel transistor is switched on and the n channel type off. Logical 1 at the input brings on the n channel device and switches off the p type. This arrangement provides the fastest possible transition between ON and OFF states and, since one device is always off and therefore of high resistance, means that the stage consumes very little power. Despite the improvement in switching speed provided by CMOS integrated circuits, this type of logic is still not as fast as TTL logic. Nevertheless it is still suitable for many applications, and apart from consuming very little power is able to operate over a wide range of supply voltages-typically 3 to 15 V-and has the added advantage of being compatible with other types of logic such as TTL.

PROBLEMS

4.1 List four common digital devices and comment on their suitability as logic elements.

4.2 By means of a circuit diagram and characteristic curves explain how a transistor may be used as a digital device.

4.3 Draw up truth tables for the AND and OR functions with two input lines. Express these functions in Boolean algebra and draw their circuit symbols.

4.4 By means of a suitably labelled pulse waveform illustrate and explain the difference between positive and negative logic.

4.5 Draw the circuit diagram of a DTL two-input AND/OR gate and state the conditions for its use as (a) an AND gate and (b) an OR gate.

4.6 Draw up a truth table and logical circuit diagram to represent the function F = A . B +C.

4.7 Use a truth table to verify the Boolean expression A. B +A =A.


4.8 Write out the truth table representing the Boolean expression F = A. B and draw a logical circuit to represent the function.

4.9 Sketch suitable logic diagrams to show how (a) a two-input AND gate can be made up from three NOR elements and (b) a two-input OR gate can be made up from three NAND elements.

4.10 Draw a logical circuit to represent the function F = A. B +A. Busing (a) AND, OR and NOT gates (b) NAND gates only and (c) NOR gates only.

4.11 Use truth tables to verify the following Boolean expressions (a) A+ B = A. B, (b) A. (A+ B) = A. B, (c) A. B +A. C =

A. (B+C).

4.12 The truth table shown below represents the operation of a logic circuit. Write down the Boolean expression which represents the function and draw a logic diagram using AND, OR and NOT gates.

A

0 0 1 1

B

0 1 0 1

F

1 0 1 1

4.13 Draw logic diagrams to show how an R-S bistable may be obtained using (a) NOR gates only and (b) NAND gates only. Give the circuit symbol for the R-S bistable and with the aid of a truth table explain its operation.

4.14 A machine is to be protected against incorrect operation by the use oflogic circuits. The requirements are that the machine may only be ON when inputs A and B are ON and input C is OFF. Express this in Boolean algebra form and draw suitable logic circuits using (a) NAND gates only and (b) NOR gates only.


4.15 Two lights P and Q are governed by four switches A, B, C and D. The sequence of operations is (a) light Pis ON when switch A is OFF and B is ON or when C is ON, (b) light Q is ON when switches A and Bare ON and C and Dare OFF. Write down logical expressions representing conditions (a) and (b) and draw a logical circuit to represent the functions.

Answers

4.6 The required truth table and logic diagram are shown in figure 4.31.

4.7

A B A.B A.B +A

0 0 0 0 0 l 0 0 l 0 0 l 1 1 l l

First and fourth columns are identical showing that A . B + A = A.

4.8 The required truth table and logic diagram are shown in figure 4.32.

4.9 The required logic diagrams are shown in figure 4.33.

4.10 The required logic diagrams are shown in figure 4.34.

4.11

0 0 1 1 1 0 l l 0 l 1 1 0 0 1 1 1 1 1 0 0 0 0

(a)

ABC A.B A.C B+C

0 0 0 0 0 0 l 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 l 0 l 1 0 1 l l l 1

0 0 0 0 0 l 0 l

0 l l 1 0 1 1 l

A B A A+B A.(A+B) A.B

0 0 1 0 l 1 1 0 0 0 1 l 0

A.B+A.C

(c)

0 0 0 0 0 1 1 l

(b)

0 0 0 l

0 0 0 1

A.(B+C)

0 0 0 0 0 1 1 l

4.12 F = A. B + B; logic diagram shown in figure 4.35.

4.14 F = A.B. C; logic diagrams shown in figure 4.36.

4.15 P = A.B+C and Q = A.B.C.D; logic diagram shown in figure 4.37.


A A 8 c A.8 F=A.8 +C

0 0 0 0 0 8 0 0 1 0 1

0 1 0 0 0 0 1 1 0 1 1 0 0 0 0 1 0 1 0 1 c 1 1 0 1 1 1 1 1 1 1

Figure 4.31

A A 8 8 F=A.B

0 0 1 0 0 1 0 0 1 0 1 1

8 1 1 0 0

Figure 4.32

A

:;:::1

(a)

Figure 4.33 (a) Two-input AND gate, (b) two-input OR gate


A.B

BD-----41~

(a) (b)

Figure 4.34 (c)

A

A.B+B

8 o---4.---i

Figt]re 4.35

Ao-------1

Bo-------t

c

Figure 4.36

A.B.C

(a)

A~-------~~

8~------~~----~

~1 A

co-------'

C~-r--------~~-----------------'

D O=A.B.C.D

D

Figure 4.37


5. High-power Electronics Although the semiconductor device is generally thought of as a low-power component, some semiconductor devices are used at very high power, examples being the reverse-blocking thyristor (usually referred to as the thyristor) and the bidirectional thyristor (usually referred to as the triac). Both these devices are widely used in industrial applications where they may be used, for example, to control the speed of rotating machinery or to determine the amount of current supplied to an electric furnace in order to control the furnace temperature. At the other end of the scale they are used in the domestic field in such items as washing machines to control motor speed and in television sets where they may be used to stabilise d.c. supplies against mains variation or changes in load current.

Thyristors and triacs have the advantage that they are able to control the flow of current fed through them quite smoothly, yet at the same time consume very little power compared with the power they are able to control.

5.1 THE REVERSE-BLOCKING THYRISTOR (THYRISTOR)

The thyristor is essentially a power diode whose conduction periods may be controlled by means of an external signal. In this sense input power of the order of milliwatts is able to switch power of the order of kilowatts, resulting in power gain for the device of the order of 106 or more. fhe two main electrodes are the anode and cathode and the electrode controlling the conduction period is known as the gate. Figure 5.1 shows three typical types of encapsulation, A is similar to that of a transistor and suitable for very low power, while B is a plastics-encapsulated type suitable for domestic applications. The larger power types will use the encapsulation shown at C and are suitable for bolting directly to a heatsink in order to dissipate any heat generated within the device.

Figure 5.2a gives the circuit symbol of the thyristor while 5.2b shows a simplified construction of this type of device. It consists of four layers of semiconductor material arranged as shown and may

' thus be considered as two transistors interconnected as indicated in figure 5.2c. Although the thyristor may be made to conduct in

A B c

Figure 5.1 Types of thyristor encapsulation

anode

J1

gate J2

J3

cathode

(a) (b) (c)

Figure 5.2 Thyristor: (a) symbol, (b) simplified construction. (c) transistor analogy

either direction, if excessive voltages are applied between anode and cathode its normal operation is that the anode is made positive with respect to the cathode and the gate is used to produce forward conduction. Once conduction is initiated the gate voltage has no further control and conduction will continue so long as the anode current is above a minimum value known as the holding current (I H), indicated in the characteristic curves of figure 5.3.

C ---reverse blocking

reverse breakdown

HIGH-POWER ELECTRONICS 73

forward conduction

/FG = 12 rnA

/FG = 8 rnA /FG = 4 rnA

forward blocking

/FG = 0

Vao

Figure 5.3 Anode current-voltage characteristics of a thyristor

If a positive voltage is applied to the cathode with respect to anode, two of the junctions J1 and J3 (figure 5.2b) are reverse biased while junction J2 is forward biased. A signal applied to the gate under these conditions has no effect on thyristor operation since, from the transistor analogy of figure 5.2c, the polarities of the supplies are incorrect. However, if the anode voltage is increased, a point is reached where reverse breakdown occurs-a situation which will destroy the thyristor unless a resistor is included to limit the current.

When the anode is made positive with respect to cathode and held below the breakover voltage V80 (figure 5.3) a positive on the gate with respect to cathode causes charge carriers to be injected into the base of TR2 in the equivalent two-transistor circuit of figure 5.2c and the collector current that results provides base drive for transistor TRl. The collector current of TRl in turn provides the base drive of TR2 and thus a signal applied even momentarily to the gate produces a cumulative action, triggering the thyristor into conduction and causing its resistance to become very low. In


this mode the voltage across the device, known as the on-state voltage V T• remains substantially constant at a value of around 1 to 2 V irrespective of the current through the device, since it is the sum of the saturated collector-emitter and base-emitter voltages of the two transistors in the equivalent circuit. In general the thyristor is capable of being triggered from the OFF to the ON state in about 2 to 3 J.lS and may be switched off in about 10 to 12 J.lS. It thus behaves as a fast-acting uni-directional switch.

The characteristic curves of figure 5.3 show how the breakover voltage V 80 decreases with increase of forward gate current I FG• the breakover voltage with zero gate current being dependent on the type and method of construction of the device. For use with a mains supply of 240 V, V80 at zero gate current will need to be at least the peak of the supply, a suitable value being about 400 V.

5.1.1 Simple Phase-shift Control

The usual method of control of the firing point within the anod~athode supply cycle of a thyristor is to provide suitably delayed voltage pulses of sufficient amplitude between gate and cathode to ensure that the necessary value of forward gate current is provided for all possible values of anod~thode voltage. Figure 5.4a shows a simple circuit of a thyristor feeding a resistive load and where the control circuits provide pulses which may be varied in phase relationship with the main waveform applied between anode and cathode as shown in figure 5.4b. Control of firing of the thyristor is possible over nearly the whole of the 180 degree range using this method and the average current through the load may be varied from a maximum value when the triggering action is initiated at almost zero phase angle to a minimum when the firing pulse is delayed by 180 degrees. Care must be exercised in the design of the triggering circuits to ensure that the pulses to the gate are of sufficient amplitude to provide a value of forward gate current which will allow the thyristor to fire even when the anod~thode voltage is at a low value. As an example, the thyristor indicated by the characteristic curves of figure 5.3 would require a forward gate current of at least 12 rnA to ensure this condition.

50 Hz ~-~--_J supply L.:=::...r-------'

(a)

0 30 60

1- phase angle

90

(b)

load

120 150 180

I conducting I . . -angle

-----+-+--variable pulse delay

Figure 5.4 A.C./D.C. converter usmg phase control of firing pulse

The circuit of figure 5.4a may be modified to provide higher average current by using the full-wave rectifier circuit arrangement of figure 5.5 where two thyristors fed from a centre-tapped transformer supply the same load. The thyristors are triggered one on each alternate half-cycle by the same control pulses (whichever thyristor is forward biased when the gate pulse arrives being the one that is triggered into conduction). They remain conducting until the anode--cathode voltage falls to a value at which it is no longer able to provide the minimum holding current.

TH1

Figure 5.5 Full-wave a.c.jd.c. converter

Half-controlled Bridge

An alternative arrangement used widely as an a.c.jd.c. converter for both single and three-phase supplies is the half-controlled bridge circuit of figure 5.6-half-controlled in that half the bridge is diodes and the other half thyristors (controlled diodes). When A is positive with respect to B in this circuit the load current flows through the diode Dl and thyristor THl. On the other half-cycle when B is positive with respect to A, diode 02 and thyristor TH2 are the conducting elements. Notice that for this particular arrangement the thyristor anodes are commoned, allowing them to be bolted to the same heatsink.

A

a.c. supply

B

TH2

01 02

TH1

HIGH·POWER ELECTRONICS 75

I 0 a d

Figure 5.6 Half-controlled bridge

The circuit of figure 5.4a may also be modified so that a controlled alternating supply-a.c.ja.c. converter-is provided to the resistive load by using two thyristors connected in the inverse parallel arrangement of figure 5.7 where the output that results for a control phase angle of approximately 120 degrees is also shown.

TH1

supply I 0 a d

Figure 5. 7 Simple a.c.ja.c. converter


TH1 TH2

supply 02 01

Figure 5.8 Bridge-type a.c.ja.c. converter

An alternative circuit which uses only one control unit when gating pulses are to be applied to each thyristor with the same amount of phase delay (a usual requirement), is that of figure 5.8. In this circuit thyristor TH 1 and diode D 1 form the conducting path through the load for the current during one half-cycle of the input, whereas during the other half-cycle TH2 and 02 provide forward conduction. Whichever thyristor is forward biased when the gate pulse arrives is the one that is triggered to the ON state.

5.1.2 Control of an Inductive Load by means of Thyristors

So far thyristor control has been considered in relation to purely resistive loads in which the load current is in phase with the load voltage as indicated' by the waveform diagrams of figure 5.9. However, loads supplied by means of thyristor control will invariably contain some inductance and this is particularly true when the load is an electric motor or similar machine. Under these conditions the load voltage and load current waveforms will

be modified as indicated in the ideal waveforms of figure 5.10; it may be seen that this results in the supply voltage and load current being out of phase. It is thus possible for a holding current to be maintained in the thyristor during the time that it should be switched off and it may be necessary to modify the circuit to ensure that the conducting thyristor commutates (switches off) at the end of the half-cycle in which it is forward biased.

So far as a.c.ja.c. conversion is concerned, equal phase angles for both thyristors are desirable to prevent saturation of an inductive load and provided that this is done, such a load usually presents no problem because the conducting thyristor has a full half-cycle period in which to turn off.

When an inductive load is used in conjunction with an a.c./d.c. converter it is desirable that the thyristors be commutated at the end of each half-cycle, but in practice this is not always the case. Consider the circuit of figure 5.11 which shows a half-controlled bridge a.c.jd.c. converter supplying an inductive load. Assume that D 1 and TH 1 are conducting. At the end of the half-cycle, current is

supply voltage

voltage across thyristor

voltage across load

load current

I

I I

I ~ I

Figure 5.9 Voltage and current waveforms supplied from a.c./a.c. converter

I I I I I I

~ I

resistive load

maintained by the load inductance and TH1 although current is transferred from D 1 to 02. This provides a circulating current around some of the bridge components and the load. Some time in the next half-cycle TH2 is triggered into conduction and when this happens TH 1 is reverse biased and switches off. At the end of this half-cycle a circulating current is maintained through TH2 and 01 until TH1 is again triggered into conduction and the sequence is repeated. Although the circulating current modifies the total load current, control is still possible by modifying the firing angles of the thyristors and in most respects the circuit operates satisfactorily. However, if the trigger pulses are removed to reduce the load

supply voltage

voltage across thyristor

voltage across load

load current


Figure 5.10 Voltage and current waveforms for inductive load supplied from a.c./a.c. converter

,-01 02 I / r -,

I' I I

i I I I I I I load

: t I I I I I I

I I I' L... J

' Figure 5.11 Half-controlled bridge incorporating flywheel diode


current to zero, the conducting thyristor continues for the remainder of the half-cycle and because of the inductive load, continues after the supply half-cycle has finished. The other thyristor does not fire since the trigger pulses have been removed and if the time constant of the circuit is long the conducting thyristor may continue for the whole of its normally nonconducting half-cycle and then on into its forward-biased halfcycle. Thus current is fed to the load continuously by one thyristor, there is no control and the load current can only be stopped by interrupting the supply. The usual method of preventing this situation is to connect a diode across the load as shown by the dashed lines of figure 5.11. This is known as a flywheel diode and allows the back e.m.f. produced by the inductive load to circulate a current through the diode, bypassing the bridge components and allowing the thyristors to be commutated at the end of each halfcycle of supply.

A typical application of the above circuit used in three-phase supply systems is shown in figure 5.12 where the load may be the field windings of a d.c. generator, and where control of the firing angles of the thyristors controls the d.c. output of the machine. The gating pulses to the thyristors must be phase displaced by 120 degrees from each other and synchronised to the three-phase

to control c~rcuots

r I

Three I I generator phase

flywheel I 1 foeld

supply doode I I wondongs

I I _I

Figure 5.12 Three-phase a.c./d.c. controller incorporating flywheel diode

supply. In addition, to enable the full range of control to take place, all trigger pulses must be operated from the same control and capable of a total phase shift of 180 degrees with respect to the voltage waveform applied to each thyristor anode.

Fully-controlled Bridge

The circuit of figure 5.13 shows a single-phase fully controlled bridge in which all devices are thyristors. In this circuit TH 1 and TH2 are triggered simultaneously on one half-cycle of the supply as are TH3 and TH4 on the other half-cycle, each pair providing current from the source through the load. At the end of the halfcycle when for instance TH1 and TH2 are conducting, the only path for recirculating currents is through TH2, the source impedance and THl. This current is forced by the reversed supply at this time to decay more rapidly than in the half-controlled bridge, and the flywheel diode is not required.

Figure 5.13 Fully controlled bridge

5.1.3 Applications of Controllers Supplied from A.C.

Since the introduction of silicon switching devices there has been increased use of this type of power device in electrical power and

industrial electronics resulting in some older techniques being replaced by systems incorporating thyristors. Among the most usual applications when the supply is from an a.c. source are regulated power supplies, industrial furnace control, lighting control and speed control of d.c. motors.

supply

flywheel diode

motor field

Figure 5.14 Control of d.c. motor using diode bridge and thyristor

voltage proportional

to required speed

comparator

error voltage

control and gating unit

HIGH·POWER ELECTRONICS 79

The speed of a d.c. motor may be controlled through the armature or through the field and the decision as to whether openloop control is satisfactory or whether closed-loop control is necessary depends on the application. A circuit suitable for openloop speed control of a shunt-wound d.c. motor supplied from an a.c. source is shown in figure 5.14, where the bridge supplies unidirectional current to both the field and armature of the motor. A normal half-controlled bridge similar to that of figure 5.11 could have been used to supply the armature but would have necessitated the field being supplied from separate rectifying elements. Control of the armature current and hence the speed is obtained by adjusting the triggering angle of the thyristor.

The block diagram of figure 5.15 indicates how closed-loop control could be applied to the system. A tachogenerator provides a voltage to the comparator dependent on the shaft speed of the motor and this is compared with a voltage related to the required motor speed. Any difference between the two produces an error voltage which is used ultimately to alter the phase angle of the thyristor to increase or decrease the armature current as required. An alternative and more sophisticated system could use the induced armature e.m.f. instead of the tachogenerator to provide the feedback voltage since the magnitude of the induced e.m.f. is proportional to armature speed.

con troll thyristor

load

voltage proportional r------, to motor speed tache-

generator

Figure 5.15 Closed-loop speed control of d.c. motor


5.1.4 Applications of Controllers Supplied from D.C.

The use of thyristors as switching elements in conjunction with d.c. supplies allows smooth control of a load since the ratio of the ON/OFF times of the thyristor elements determines the average current supplied to the load. The system is suitable for such applications as speed control of d.c. motors operating from fixed d.c. supplies, regulated power supplies and in lighting and temperature control operating from d.c. systems. In addition thyristors are suitable for use in inverter circuits-d.c. to a.c.where they have applications in the control of the speed of induction motors not easily controlled by other means.

A disadvantage of operating a thyristor from a d.c. supply is that some method is required to switch the thyristor off at the desired instant since the supply remains at constant voltage-unlike that of an a.c. supply where the thyristor extinguishes automatically as the supply voltage falls to zero.

A system could be used connecting a device in parallel with the ~hyristor to divert the current when switch-off is required, but this 1~ ~nsatisfactory for thyristors with high-current handling capacities and the most usual method is that shown in figure 5.16 known as capacitor commutation. In this arrangement the main current is carried by thyristor TH2 and when this is conducting

+o------------------1~----------~

d.c. supply (V)

R c

Figure 5.16 Capacitor commutation of thyristors operated from a d.c. supply

point B is almost zero, capacitor C then being charged through the resistor R to virtually the supply voltage V. Thyristor TH2 continues to conduct until a trigger pulse is applied to the gate of TH1 to turn it on. At this time point A falls almost to zero taking point B down to - V volts, reverse biasing TH2 and turning it off. Thus as TH 1 turns on, TH2 turns off and the capacitor is now charged with reverse polarity to that shown in figure 5.16 and is available to switch off TH1 when TH2 is gated into conduction.

A circuit of particular interest using thyristors is that of the inverter, a simplified circuit of which is shown in figure 5.17, where capacitor C provides commutation of the thyristors. The output frequency across the secondary of the transformer is determined by the frequency of the triggering pulses supplied to the gates from the control circuits. One important application of this type of

Figure 5.17 Inverter d.c. to a.c.

circuit is for the speed control of induction motors which are essentially constant-speed devices when supplied from a fixedfrequency source.

The block diagram of figure 5.18 shows a simplified arrangement of the closed-loop speed control of a three-phase induction motor

voltage proportional to set speed

error voltage

oscillator and gating circuits

d.c. power

voltage proportional to speed

Figure 5.18 Induction motor speed control using inverters

using inverters. In this system the tachogenerator, coupled to the shaft of the motor, provides a voltage proportional to the motor speed and this is compared with a voltage related to the required motor speed. Any difference produces an error voltage at the output of the comparator and this is used to adjust the frequency of the oscillator controlling the gating units and hence the motor speed by means of the inverters.

5.2 THE BIDIRECTIONAL THYRISTOR (TRIAC)

This is an extremely versatile device which is able to perform the same function as a pair of thyristors connected in the inverse parallel arrangement (see figure 5.7) but has the advantage of a common gate which simplifies the associated control circuits.

G

T2

T1


three-phase induction

tacho-

/H

quadrant 3 reverse

conduction

-I

quadrant 1 forward conduction

Vao

The circuit symbol for the device together with its current -voltage characteristic is shown in figure 5.19 and, as might be Figure 5.19 Triac symbol and static characteristic


expected, the characteristic is similar to that of a thyristor although the device conducts in both the first and third quadrants of the coordinate axes. When terminal T2 is made positive with respect to Tl but held below the forward breakover voltage V 80, conduction can be made to occur in the first quadrant by the application of a gate signal which is either positive or negative with respect to Tl. In a similar way gating signals of either polarity cause conduction in the third quadrant when T1 is held positive with respect to T2 at a value below the reverse bfeakover voltage V 80.

As with the thyristor, once conduction occurs the gate voltage has no further control and conduction continues until the current flowing between the main terminals Tl and T2 has fallen below the holding current I H·

The disadvantage of the triac is that its applications are limited to fully controlled a.c. controllers and it cannot be used for d.c. output. In addition, whereas an inverse parallel arrangement of thyristors allows each thyristor a whole half-cycle in which to switch off, the triac must turn off as the load current is passing through zero. For resistive loads supplied from the 50 Hz mains this usually presents no problem, but at higher frequency or with inductive loads the use of separate thyristors may be considered an advantage. Despite these disadvantages and the fact that in general the specifications of triacs are not as extensive as those of thyristors, the simplicity of the associated control circuits makes them an attractive proposition for some applications. Figure 5.20 shows the triac equivalent of the thyristor circuit of figure 5.7.

supply

Figure 5.20 Triac a.c./a.c. converter

Another simple application of the triac is its use as a high-current a.c. power ON/OFF switch-figure 5.21 shows a triac used for such an application. The switch contact current, which controls the main current, is limited to tens of milliamperes by the value chosen for resistor R.

a.c. supply

R

Figure 5.21 Triac used as a switch

off

on

5.3 PROTECTION OF THYRISTORS AND TRIACS AGAINST EXCESS CURRENT AND VOLTAGE

For reliable operation of thyristors and triacs it is essential that some form of protection be included in the circuits to protect the devices against current surges and voltage transients.

Current Surges

The current rating of thyristors and triacs is dependent on the power dissipation at the junctions and in general the overload capacity is low. Thus protection against suddenly applied overloads has to be achieved by the use of specially designed fast-acting fuses capable of clearing in a few milliseconds. In addition however, there is the problem that when a thyristor or triac starts to conduct, current flow occurs in a small localised area of the junction and then spreads to the whole of its cross-section. If the

initial rate of rise of current is excessive-a factor largely dependent on the nature of the load-localised heating can occur within the semiconductor junctions leading to premature failure of the device. Recent developments in device-manufacturing technology, allowing very high rates of rise of current to be applied without device failure, have helped to alleviate the problem, but a satisfactory method of protection against this type of failure is to include small-value inductors in series with the device. These have the effect of slowing down the rate of rise of current.

Voltage Transients

A transient which causes the forward breakover voltage to be exceeded will not damage the device since it then conducts and for any excess current the device is protected by the fuse. However, if the peak reverse voltage of a thyristor is exceeded, the device is likely to be permanently damaged and some protection is required.

Transients on the supply may be damped by the use of RC filters connected to the input lines, although long-duration 'spikes' are best absorbed by non-linear resistors. Transients generated by the devices themselves may be damped by connecting RC networks across each of the devices.

PROBLEMS

5.1 Describe using appropriate diagrams the operation of a thyristor. Give the circuit symbol and sketch the anode characteristics of the device, labelling the axes.

5.2 By means of a fully labelled sketch of the anode characteristics of a thyristor indicate and explain what is meant by (a) the breakover voltage, (b) holding current and (c) peak reverse voltage.

5.3 Discuss the methods of initiating and terminating conduction in a thyristor and give reasons why pulse firing of the device is often preferred to other methods.


5.4 Sketch waveforms illustrating supply voltage and load current when an inductive load is supplied and controlled by means of an inverse parallel connected pair of thyristors and describe the difficulties involved in controlling such a load.

5.5 Explain, using appropriate diagrams, the function of a flywheel diode and state the conditions under which it is required.

5.6 (a) Draw the circuit of a half-controlled thyristor bridge circuit suitable for supplying a resistive load. (b) Indicate the modifications required to the circuit if it is to be used to supply an inductive load and explain why this component is necessary.

5. 7 (a) With the aid of a circuit diagram explain the operation of a single-phase fully controlled thyristor bridge circuit. (b) Sketch the circuit diagram of a thyristor controller suitable for supplying a load from a three-phase supply.

5.8 (a) By means of a circuit diagram indicate and explain how open-loop speed control of a small shunt-wound d.c. motor may be obtained using thyristors. (b) Explain briefly two methods of providing closed-loop speed control of the motor in (a) above.

5.9 State the problems involved in operating thyristors from d.c. supplies, and with the aid of a diagram explain the operation of the capacitor commutation method of switching a thyristor.

5.10 (a) Draw the circuit diagram of an inverter using thyristors, and briefly explain its operation. (b) Describe briefly how speed control of an induction motor may be achieved using inverters.

5.11 Sketch a set of current-voltage characteristics for a triac, label the axes and indicate (a) breakover voltage and (b) holding current.

5.12 Explain with the aid of a current diagram and suitable


waveforms how a triac can be used to control the flow of current through a load.

5.13 List and compare the advantages and disadvantages of using thyristors and triacs for controlling the flow of current through a load.

5.14 Give reasons why thyristors and triacs need to be protected against excess voltage and current, indicating where applicable how this may be achieved.

6. Monolithic Integrated Circuits

The natural outcome of the quest for smaller components since the introduction of the transistor in 1948 is the monolithic integrated circuit, the word 'monolithic' implying that the circuit is produced within a single crystal of semiconductor material.

Into a single chip of silicon, typically 0.2 mm thick and 2 mm square, enough suitably connected components are formed to provide an electronic sub-unit such as an amplifier or set of logic gates. Mass-production techniques are inherent in the manufacture of integrated circuits since several hundred chips, each representing an electronic sub-unit, are produced at the same time on a single slice or wafer of silicon approximately 30 mm in diameter-a hundred or so wafers are loaded into containers for processing at the same time.

The use of silicon as the substrate, on to which all components are formed, is preferred to germanium because of its more stable properties and because the essential technique of deposition, known as the planar process, requires a chemically stable oxide layer to be formed over the surface between each stage of manufacture. This stable oxide layer is achieved more readily with silicon than with germanium.

6.1 PRODUCTION OF THE SILICON SLICE

Silicon has to be purified so that the number of impurity atoms is less than 1 in 1010, the order required for the successful manufacture of silicon semiconductor devices. One method of purification, known as zone refining, is to pass a bar of the impure silicon held within a graphite crucible, through high-frequency heating coils which heat up short lengths of the bar (zones) to above the melting point of the element ( 1420 oq. The crucible containing the silicon bar passes slowly through the coils, causing the molten zones and the impurities to move to one end. To obtain the desired purity of crystal several passes through the coils will be necessary, the end containing the impurities being removed at the end of the process.

The pure silicon that results from zone refining is still not suitable for semiconductor manufacture but needs to have its crystal structure arranged in a regular pattern to ensure constant resistivity throughout the material. To do this the pure silicon is


heated in a suitable container in an oven filled with an inert gas and to the melt are added minute quantities of n or p-type impurities. A very small piece of silicon, known as the 'seed', is lowered into the molten silicon and then withdrawn slowly over a period of several hours, the seed being rotated very slowly as the withdrawal process continues. The result is a bar of either n or p-type silicon about 300 mm long and between 30 mm and 70 mm in diameter.

The bar is then cut into discs each of thickness about 500 Jlm by cutting with a diamond saw and then lapping and polishing removes surface abrasions to reduce the wafer thickness to about 200 Jlm. This wafer forms the substrate or base of several hundred integrated circuits, each of which may contain hundreds of components formed into the wafer surface using a technique known as the planar process.

6.2 PLANAR PROCESS

In this process silicon surfaces are oxidised and the resulting silicon oxide used as a mask. By the use of photolithographic techniques similar to those used in printed-circuit manufacture, accurately defined areas known as windows may be etched. Through these windows p or n-type impurities are diffused to produce pn junctions as shown in figure 6.1. The method was originally developed for the manufacture of diodes and transistors, several

junction formed under oxide and thus protected

pn junction

silicon wafer (substrate)

silicon oxide layer

Figure 6.1 Planar process for producing pn junctions

thousand such devices being produced at the same time on a single slice of silicon some 30 mm in diameter-individual items are separated only at the end of the process. The method, essentially a mass-production technique, has further advantages in that between each stage of manufacture the surface of the silicon slice is covered with a protective layer of silicon oxide which prevents surface contamination. In addition, very precise control is possible over masking and etching techniques resulting in reduced spread of device characteristics and improved reliability.

To further improve the characteristics, most modern transistors produced by the planar process have an extra layer of n-type silicon grown on to an n or p-type substrate (the epitaxial layer). Into this layer are formed the pn junctions and the technique has the effect of overcoming two conflicting requirements of planar transistorshigh breakdown voltage and low saturation voltage. High breakdown voltage may be obtained using high collector resistance, low saturation voltage by low collector resistance. The epitaxial layer provides a compromise by using a high-resistivity material which is very thin but of sufficient mechanical strength since it is supported by the lower resistivity, but thicker substrate. This lower-resistivity substrate helps in reducing saturation voltage by shunting the lateral resistance of the epitaxial layer and for this reason the substrate is usually designated as either n + or p + type silicon to indicate that the impurity concentration in this layer is high and therefore its resistance low. A brief outline of the steps involved in the production of silicon planar epitaxial npn transistors is as follows.

The lapped and polished wafer of n + type silicon has an epitaxial layer of about 10 Jlm thickness grown on its surface, as indicated in figure 6.2a (not drawn to scale). This epitaxial layer will have a resistivity of about 5 n mm compared with the value of about 0.01 n mm of the n + substrate.

The surface of the slice is now thoroughly cleaned and washed and placed in a furnace at a temperature of about 1000 oc in an atmosphere containing water vapour, to produce the silicon oxide insulated layer. Windows are cut in the oxide, ·one for each transistor on the wafer, using photographic negatives known as photo-masks and etching techniques. The slice is heated in another furnace to a temperature of about 1100 oc in an atmosphere

n+

n +-type silicon (substrate)

n +-type silicon (emitter)

(a)

(c)

MONOLITHIC INTEGRATED CIRCUITS 87

p-type silicon (base)

silic~·~~~~~~--------_1----------~~~~~~ oxide layer

collector

n+

contact n +

aluminium film

~~----------------------------------------~

(b)

(d)

Figure 6.2 Stages in manufacture of a silicon planar epitaxial transistor

contammg p-type impunties which diffuse into the exposed window areas as shown in figure 6.2b. After removal from this furnace any remaining oxides are removed by a further etching process. The slice is then placed in another furnace containing water vapour where the p-type impurities are diffused further into the silicon to form a pn junction at the correct depth by heating to 1200 oc. This process also re-oxidises the wafer surface so that it is ready for the next masking process in which the emitter regions are defined.

The emitter diffusion of figure 6.2c takes place in a furnace at a temperature of about 1050 oc in an atmosphere containing n-type impurities. Control of the diffusion time determines the base width

between collector and emitter regions. The slice is now given a final oxidisation process and another

photoresist sequence enabling windows to be etched in the oxide over the base and emitter regions. Aluminium is evaporated over the whole surface in a vacuum chamber and another photoresist sequence and masking process enables the aluminium to be removed except where it is required for the emitter and base contacts, as indicated in figure 6.2d.

The individual transistors are now separated using a diamond cutting tool, each transistor is mounted on a collector contact, base and emitter leads added and the device encapsulated to complete the individual transistors.


6.3 INTEGRATED CIRCUITS

In general the methods used to manufacture integrated circuits are similar to those outlined for the planar process, all components being fabricated into the surface of the silicon wafer. However, in this case, isolation between components is necessary with the final process of depositing and etching the aluminium layer being used to interconnect the various components. For this reason the epitaxial n layer is grown on a substrate of p-type silicon and isolation of components achieved by the vertical columns of p-type silicon diffused early in the process (see figure 6.3). These vertical p-

epitaxial resistor transistor layer

Vee

v,

common

Figure 6.3 Section of integrated circuit and equivalent circuit

type columns in conjunction with the epitaxial n layer are reverse biased during normal operation of the integrated circuit to provide the required isolation. To reduce the saturation voltage of transistors it is usual to provide within the surface of the p-type substrate a buried n + layer and this process is carried out before the epitaxial layer is grown.

A diffused resistor may be produced at the same time that the base areas of transistors are being diffused' as indicated in figure 6.3, the value of the resistor being determined by the width, length and depth of the diffusion and by the amount of impurity content being diffused at this time. Using this technique resistors up to about 1 k!l may be obtained in a stripe about 2 mm long and 25 Jlm wide. Any larger values will need to use the zigzag arrangement of figure 6.4 which, since it is uneconomic in terms of space, results in an upper limit for resistance of about 20 k!l.

Figure 6.4 Method of producing larger values of resistance on integrated circuits

Capacitors may be provided on the chip up to a maximum value of about 100 pF using either a reverse-biased pn junction (although the capacitance is then dependent to some extent on the supply voltage) or by using the oxide layer in conjunction with a diffused region and aluminium top plate. In general the design of circuits to be implemented using integrated circuits tries to arrange that only

small values of capacitance are required and in this respect d.c. coupling between amplifier stages eliminates the need for coupling capacitors.

Inductors are not easy to produce on the wafer and these, if required, will usually be added externally as discrete components, as will large values of capacitance and resistance.

Once the process is completed and individual chips separated, they are mounted on headers and electrical contacts made using gold wire and pressure-welding techniques. Encapsulation follows, the most common method being the dual in-line package of figure 6.5 which may be either 16, 14 or 8-pin.

Figure 6.5 Dual in-line 14-pin encapsulation for integrated circuit

MONOLITHIC INTEGRATED CIRCUITS 89

light current electrical applications iii

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