mice cm15 june 2006jean-sébastien graulichslide 1 daq for btf o btf overview o hardware overview o...
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MICE CM15 June 2006
Jean-Sébastien Graulich Slide 1
DAQ for BTFDAQ for BTF
o BTF Overview
o Hardware Overview
o DAQ Software Description
o What’s next
o Summary
Jean-Sebastien Graulich, Geneva
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 2
BTF OverviewBTF Overview
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 3
Hardware OverviewHardware Overview TOFTOF
Detector: A couple of slabs, mounted with R4998 Pmts
FEE Configurations MICE baseline
Constant Fraction Discriminator (either VME or NIM)CAEN TDC V1290 (32 ch, 25 ps LSB)
Comparison basisActive Splitter (recuperated from HARP)Constant Fraction Discriminator (either VME or NIM)CAEN TDC V1290 (32 ch, 25 ps LSB)CAEN QDC V792 (32 ch, 100 fC LSB)
FEE testSIS 3320 200 MHz Flash ADCTime over Threshold Discriminator (NINO)
EmCalEmCal Detector: A couple of modules, mounted with R1355
Pmts FEE Configuration
Same as for TOF
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 4
Hardware OverviewHardware Overview
DAQDAQ 1 VME Crate, brought from Geneva Stand alone PC, brought from Geneva VME/PCI Interface
CAEN V2718 with optical link to the PC
TriggerTrigger 1 NIM crate for trigger logic, available on site
Very simple logic, standard NIM modules
T1R
T1L
CFD
CFD
ADC gate
V2718 O5 (DAQ Ready)
FIFO
TDC1 Ch 1
TDC1 Ch 2
BTF test beam electronics Logic Scheme
T1R
T1L
CFD
CFD TDC1 Ch 1
TDC1 Ch 2
EC1R
EC1L
EC2L
DISC
DISC
DISC
SPLIT
SPLIT
SPLIT
EC2R DISC SPLIT
TDC1 Ch 5
TDC1 Ch 6
TDC1 Ch 7
TDC1 Ch 8
NIM-ECL
NIM-ECL
NIM-ECL
NIM-ECL
TIMER 50 ns
TIMER 50 ns
FIFO
TDC1 Ch 0
TDC Trigger
TIMER 120 ns
TIMER
Start
Stop
Veto
Delay 30 s
V2718 I0 (DAQ Trigger)
Trigger Request
Particle Trigger
TIMER
Start
Stop
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 6
DAQ Software DAQ Software description description
Software choiceSoftware choice DATE (ALICE DAQ) not available in time UNIDAQ was an option but
No know-how in Geneva and no real interest in getting this know-how…
Dedicated home made software Provides good training Limited to single VME-crate/single PC DAQ
ArchitectureArchitectureRun Control
GUI
Readout
Local Disk
Monitor
MonitorGUI
Vme Modules
Readout
InitializationWrite
Binary file
Read binary file Write
Root file
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 7
Run Control GUIRun Control GUI
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 8
Readout ProcessReadout Process
Input Level is Set
Reset Output Level (not Ready)
Readout Modules and Write on Disk
Arm Modules
Max N_events reachOr Stop Request
N_events ++
Set Output Level (Ready)
yes
yes
no
no
Disarm Modules
Reset Output Level (not Ready)
Stop
Polling loop on V2718 InputPolling loop on V2718 Input
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 9
Readout ProcessReadout Process
Read out TDC and ADC works in Single- an/or Read out TDC and ADC works in Single- an/or Multi-Event ModeMulti-Event Mode
Readout of V1X90: up to ~20 MB/s, much less if the number of hits is small
Readout of 32 hits takes about 40 s
Readout of V792: limited to ~0.5 MB/s (Block Transfer is not working), good enough for BTF
Readout of 32 hits takes about 600 s
Readout loop is artificially slowed down to Readout loop is artificially slowed down to leave some CPU time for the monitoringleave some CPU time for the monitoring
-> Limited to 50 Hz
Should this limit be removed, the readout process can cope with up to 10 kHz (in Multi-Event Mode).
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 10
Readout ProcessReadout Process OO structure:OO structure:
MDbtfAcq
•_moduleList<MDvirtualModule*>
StartRun()
OpenDataFile()
ArmDaq()
AcqLoop()
StopRun()
MDvirtualModule
•_moduleType
•_name
•_vmeInterface*
Readout()
Arm()
Initialize() MDvmeModule
•_baseAddress
•_dataBuffer
ReadDataBuffer()
SetRegister()
GetRegister()
MDv1290
•_controlRegister
•…
ReadDataBuffer()
MDvmeInterface
•_type
ReadCycle()
WriteCycle()
ReadBLT()
WriteBLT()
->Adding/removing modules from the acquisition is very easy (providing the readout software for the module)
MDv792
•_controlRegister
•…
ReadDataBuffer()
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 11
Monitor ProcessMonitor Process
Read data on local disk, as soon as Read data on local disk, as soon as they are writtenthey are written
Decode the dataDecode the data Fill histogramsFill histograms Fill ROOT TTreeFill ROOT TTree Broadcast histograms on a Socket Broadcast histograms on a Socket
every few eventsevery few events The Monitor GUI is actually a ROOT The Monitor GUI is actually a ROOT
macro, spying on the socket.macro, spying on the socket.
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 12
Monitor GUIMonitor GUI
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 13
Monitor GUIMonitor GUI
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 14
What’s nextWhat’s next Check portability of the softwareCheck portability of the software
Already installed in Milano. Tests are under way. Test of FEE optionsTest of FEE options
Struck SIS3320 200 MHz Flash ADCReadout OKShaper under designStudying the ultimate time resolution we can obtain
Time over threshold DiscriminatorNot started yetPlan: - First design and produce the transformer Coax-
>Differential - Connect to V1190 (100 ps LSB) with Leading and
Trailing Edge measurements
Clarify needs for CalibrationClarify needs for Calibration Add TDC V775 (?)Add TDC V775 (?)
To be discussed with Ludovico and Maurizio
MICE CM15 June 2006
Jean-Sébastien Graulich Slide 15
SummarySummary
BTF will use an homemade DAQ BTF will use an homemade DAQ softwaresoftware
DAQ software for BTF is readyDAQ software for BTF is ready Dedicated stand alone PC (single processor) Running Stable at 50 Hz
FEE electronics tests are under wayFEE electronics tests are under way There is hope to be ready with the Flash ADC Time over Threshold will not be ready
(Test can be done later without beam)