MURITotal Ionizing Dose Effects in

Silicon Technologies and Devices

Hugh Barnaby, Philippe Adell*, Jie Chen, Michael Mclain, Ivan Sanchez, Harshit Shah

Arizona State University*Jet Propulsion Laboratory

Topics

Modeling total ionizing dose effects in deep submicron bulk CMOS technologies - Hugh Barnaby, ASU

Band-to-band tunneling (BBT) induced leakage current enhancement in irradiated fully depleted SOI devices - Philippe Adell, JPL

Mechanisms of enhanced radiation-induced degradation due to excess molecular hydrogen in bipolar oxides

- Jie Chen, ASU

MURIModeling Total Ionizing Dose

Effects in Deep Submicron Bulk CMOS technologies

Hugh Barnaby, Michael Mclain, Ivan Sanchez, Harshit Shah

Department of Electrical EngineeringIra A. Fulton School of Engineering

Arizona State University

ASU task

• Characterize and model TID effects in bulk deep submicron CMOS devices

• Design and build radiation-enabled compact models

• Technologies: deep sub-micron bulk CMOS, silicon on insulator, device isolation structures (STI, BOX)

Reliability threats

• Traditional:

Hot-Carrier-Injection (HCI)

• Nanoscale roadblock:

Negative-bias-temperature-instability (NBTI)

• Other issues:

TDDB, etc.

after N. Kimizuka et al., VLSI Tech. 1999

Hot Carrier Limit Region

ITRS Roadmap

250nm

180nm

130nm

NBTI Limit Region

2 3 4 5

Oxide Thickness (nm)

1

2

3

Su

pp

ly V

olt

age

(V)

Radiation threats in bulk CMOS

Radiation damage in shallow trench oxides increases leakage

NMOS 0.16/0.121.0E-12

1.0E-11

1.0E-10

1.0E-09

1.0E-08

1.0E-07

1.0E-06

1.0E-05

1.0E-04

1.0E-03

-0.2 0.3 0.8 1.3

Gate Voltage (V)

Dra

in C

urr

en

t (A

)

Increased total dose

Aluminum line Polygate

Polygate

n+ n+n+n+

Aluminum gate

+++ + + + + + + + + + + + +

++

n+ n+ n+n+

Aluminum line Polygate

Polygate

n+ n+n+n+

Aluminum gate

+++ + + + + + + + + + + + +

++

n+ n+ n+n+

Leakage path

VDD0V

1.E-13

1.E-12

1.E-11

1.E-10

1.E-09

1.E-08

1.E-07

1.E-06

1.E-05

1.E-04

1.E-03

1.E-02

1.E-01

-10 -2 7 16 24 33 41 50 58 67 75 84 92

FOX Gate Voltage (V)

FO

X D

rain

Cu

rren

t (A

)

Increased total dose

after Faccio et al., TNS 2005

Intra-device leakage Inter-device leakage

TID Defects

Defects

• Not - oxide trapped charge (E’ )• Nit – interface traps (Pb)

Both Nit and Not are related to holesgenerated and/or hydrogen present inoxide

Not, Nit tox

first orderassumption

STI

Gate oxide

halo implants

n+ source n+ drain

p-body

STI

> 300 nm < 3 nm

Trapped charge buildup in STI

Research Goal

To develop a compact modeling approach that cansimulate and predict the effects of stress and radiationdamage of semiconductor devices and circuits?

Research Goal

To develop a compact modeling approach that cansimulate and predict the effects of stress and radiationdamage of semiconductor devices and circuits?

This capability, known as Predictive TechnologyModeling (PTM), has been demonstrated formodeling negative bias temperature instability.

Predictive technologymodeling (PTM)

The goal of PTM is to develop compactmodeling approaches that are:

• Scalable with technology and design parameters• Capable of both short-term and long-term predictions• Compatible with standard circuit simulator• Extendable to emerging reliability and radiation

effects concerns

PTM Approach (for NBTI)

Stress Model

DNit = Ktn + d

Stress ParametersA, E0, EA

Technology Parameters

- material (eX)

- device (fms, tox, Nx)

- other structural features (e.g. trench aspect ratio)

External Conditions

- Bias

- Temperature

- Time Device Layout

- gate geometry (W, L)

Defect Densities

NitCompact Model

Device I-V sim

static, dynamic

Devicecomparison

Experimental DataTransistors

VLSI Circuit Simulation

10 10

Modeling inputs

Model validation path

Circuit simulationwith ageing effects

Model validation

Model verified with published silicon data

Excellent scalability over process and design conditions

0.1 1 100.1

1

DVth (

mV

)

Time (s)

, , ,Eox=9.1, 8.0, 6.9, 5.7MV/cm

Model

102 103 104

10

DVth

(m

V)

Time (s)

Tox=2nm

Tox=3nm

Tox=4nm

Model

180nm, VLSI, 1999

Tox=2.6nm, T=125oCVgs=2.9V, T=100oC

130nm, IRPS, 2003

n=0.25

After Vattikonda et al. DAC 2006.

Research Goal

To develop a compact modeling approach that cansimulate and predict the effects of stress and radiationdamage of semiconductor devices and circuits?

This capability, known as Predictive TechnologyModeling (PTM) has already been demonstrated formodeling negative bias temperature instability at ASU.

Our goal is to extend PTM for reliability to captureradiation effects

PTM Approach (for TID)

Radiation Model

DNot = Dkgfyfottox

DNit = DkgfyfDHfittox - x

Radiation Dose Model Parameters

kg, fDH, fit, fy, fot

Technology Parameters

- material (eX)

- device (fms, tox, Nx)

- other structural features (e.g. trench aspect ratio)

Radiation SourceInput Parameters

- Dose (D), Dose rate (D’)

- Radiation source (e.g Co60)

External Conditions

- Bias

- Temperature

- Packaging

Device Layout

- gate geometry (W, L)

- RHBD design

- Antenna effects

Defect Densities

Not, Nit

Compact Model

- BSIM3/4 - industry standard thru 2006

- Vth modeling approach

- PSP - new industry standard beyond 2006

- surface potential modeling approach

Key Compact Model Parameters

Weff (STI), toxeff (STI), CIT, Vth0 (BSIM), fs (PSP)

Device I-V sim

static, dynamic

Structurecomparison

Experimental DataSpecialized Structures

Technology ComputerAided Design

Devicecomparison

Experimental DataTransistors

VLSI Circuit Simulation

10 10

Modelinginputs

Radiation-enabledcircuit simulation

Radiation-enabled PTM(Physical Module)

Radiation Model

DNot = Dkgfyfottox

DNit = DkgfyfDHfittox - x

Radiation Dose Model Parameters

kg, fDH, fit, fy, fot

Technology Parameters

- material (eX)

- device (fms, tox, Nx)

- other structural features (e.g. trench aspect ratio)

Radiation SourceInput Parameters

- Dose (D), Dose rate (D’)

- Radiation source (e.g Co60)

External Conditions

- Bias

- Temperature

- Packaging

Device Layout

- gate geometry (W, L)

- RHBD design

- Antenna effects

Defect Densities

Not, Nit

Structurecomparison

Experimental DataSpecialized Structures

Technology ComputerAided Design

Model validation

Inputs PhysicalModule

Output(defects)

Closed form model for TID

See Barnaby, MURI presentation 2006

Oxide trapped charge dependence on dose, oxide field and thickness.

Interface trap dependence on dose, oxide field and thickness.

xtεfεfDkxΔN oxotygot

oxitDHygit tffεfDkΔN

Model Parameters

D - total dose [rad]

kg - 8.1 x 1012 [ehp/radcm3]

fy - field dependent hole yield [hole/ehp]

fot - trapping efficiency [trapped hole/hole]

fDH - hole, D’H reaction efficiency [H+/hole]

fit - H+, SiH de-passivation efficiency [interface trap/H+]

tox - oxide thickness [cm]

Models based onassumptions of steady state, uni-directional flux, andno saturation orannealing

Simple Model – Not(x)

STI

++

t ox(i)

NA(i)

x

x(i)

x(i+1)

eox(i)

Vb

Vg

The simple model requires:

1. Doping distribution along sidewall togenerate NA(i) and fMS(i)arrays

2. Field line estimates to generatetox(i) and eox(i) arrays

3. Vgb bias condition

ox

iot

ox

smsgbox

xqN

it

iiVi

fe

Surface potentialE-field a functionof Not (iterative)

… to compute the e-field.

Non-uniform doping

Sidewalldoping

In deep submicron CMOS,the doping along thesidewall is highly non-uniform

TCAD Modeling

1 krad 10 krad 100 krad

TCAD modeling with the Silvaco REM simulator can generate volumetricdistributions of trapped charge in the STI (for model validation).

Not estimates

1 krad

10 krad

100 krad

Vgb = 0V

10krad dose

Vgb = 0V

Vgb = 1V

Simulator predicts dose and bias dependence (as well as temperature,dose rate, etc.).

Radiation-enabled PTM(Compact modeling)

Technology Parameters

- material (eX)

- device (fms, tox, Nx)

- other structural features (e.g. trench aspect ratio)

External Conditions

- Bias

- Temperature

- Time

Device Layout

- gate geometry (W, L)

Compact ModelDevice I-V sim

static, dynamic

Devicecomparison

Experimental DataTransistors

Nit, Notfrom phys.mod.

to phys. mod.

Model validation

to circuit sim.

- RHBD- Packaging

Compact Modeling for TID(surface potential)

Nit, Notfrom phys.mod.

t

s yVyx

A

itsss

ox

scharged

it

ox

otFBsFB

sssFBGs

exN

nyxxyxxQ

xC

yxxqN

xC

xqNxVyxxV

yxxQyxxVVyx

f

f

,

2

2

0

,,,

,,,,

,,,,,

s(x,y)

Surface potential information is used in the PSP compact model being developed and refined at ASU.

Compact Modeling for TID(drain-source leakage)

dxyxdQL

I

dxdyxQL

I

d si

siD

d s

sD

x LxQ

xQ ieff

diff

s

x Lx

x ieff

drift

,

,

0

,

0,,

0

,

0,,

N+ drain

N+ sourcePoly Gate

Poly Gate

Depthof halo

~25 um (MR1)

Depthof D/S diff

~50 um (MR2)

STI

++

+

STI

++

+

MA.D. MR1

MR2

MR2

MR1

Effect of charge buildup along STI sidewall degrades can be modeled as two parasitic nMOSFETs (MR1 and MR2) operating in parallel with as drawn device, MA.D.

D-S leakage model usingBSIM4 compact model

1.E-10

1.E-09

1.E-08

1.E-07

1.E-06

1.E-05

1.E-04

1.E-03

-0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9

MA.D.

MR1

MR2

MA.D. MR1 MR2

Parameters in modified BSIM4 model enablesparasitic devices to be modeled

model nfetMR1_10MRAD bsim4 type=n (W=50.1nm L=120nm)+ tnom = 27 toxe = 12.46e-009 toxp = 1.1e-9+ rnoia = 0.577 rnoib = 0.37 vth0 = 0.20439+ cdsc = 0 cdscb = 0 cdscd = 0 cit = -0.00161+ + u0 = 0.026 ua = 1e-10 ub = 4e-16+ ……

Modeling bias dependence withBSIM4

1.0E-11

1.0E-10

1.0E-09

1.0E-08

1.0E-07

1.0E-06

1.0E-05

-0.25 0 0.25 0.5

Id data pre

Id sim pre

Id data T1

Id sim T1

Id data T2

Id sim T2

Id data T3

Id sim T3

Circuit Level Modeling(A/D Converter)

Flash-type ADC

• Compact (C-) models, degradedas function of dose andradiation bias, are used byEDA tools to model circuit degradation over time.

• C-models can be inserted at the circuit-level (SPICE/SPECTRE) or in higher level behavioral models for increased efficiency.

Circuit Level Modeling(results)Modeled application response to intra-device leakage understatic radiation bias conditions

Radiation dose

Input voltage

Output

after Mikkola et al. RADECS 2006