network based system on chip final presentation part b performed by: medvedev alexey supervisor:...

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Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

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Page 1: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Network based System on Chip

Final PresentationPart B

Performed by: Medvedev Alexey

Supervisor: Walter Isaschar (Zigmond)

Winter-Spring 2006

Page 2: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Problem to solve

• In modern high-speed systems that contain a lot of components traffic is a major problem.

• Components are interacting with each other using a bus.

Page 3: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Problem

BUS

I/O ETC…CACHE

CPU FPU MEM

Page 4: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Problem

• This architecture has certain disadvantages: low speed, allows to connect only two components at a given

time, no parallel access, unconfigurable.

Page 5: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Solution

Page 6: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Network-on-Chip

• A network-like structure with central units on junctions which manage and direct the traffichighly customizableallows any number of parallel connectionsmaintains high throughput at all times traffic control and routing mechanisms

Page 7: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Advanced features

• Service levels allow to give priorities to certain components

• Wormhole mechanism lowers the total propagation delay in the net

• Virtual channels prevent congestion in the network

Page 8: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

General NoC Router

• Central NoC unit for directing data streams and traffic control

• n input ports (IP)

• n output ports (OP)

• m service levels (SL) per each port

Page 9: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Packet structure

• Each packet consists of flits which are the minimal data unit in the net

• Routers retransmit packets further flit by flit by reading and storing the destinations address of the packet from the first flit and assigning a buffer for that packet.

Page 10: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

NoC Router

Buffers

CrossbarCrossbar

CrossbarControllerCrossbarController

Input PortInput Port Input PortInput Port

Output PortOutput Port

Input PortInput Port

Output PortOutput Port

Output PortOutput Port

Output PortOutput Port

Input PortInput Port

Page 11: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Input port

• Receives data from another router or module.

• Consists of control unit and CRT (Current Routing Table) to store routing addresses and a FIFO buffer for each service level.

Page 12: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Input port schematic

FIFO

CRT#1

TransferControl

CRT#0

DMX

data_in

ftype, sl

buffer_credits

write_enable

data_out 1

data_out 0

address 0

address 1

Page 13: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Output port

• Transmits data to another router or module.

• Consists of a single buffer for each service level and a mux to select current service level. Also, another mux is used to switch to idle state.

Page 14: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Output port

DFF

‘0’

‘0’

MUX

MUX

idle

sl_select

data_outdata_in 1

data_in 0

Page 15: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Crossbar

• Performs data routing between input and output ports in a router.

• Implemented using steering logic.

Page 16: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

CrossbarMUX

MUX

MUX

MUX

OP0 level0

OP1 level0

OP0 level1

OP1 level1

IP0 level0

IP1 level0

IP0 level1

IP1 level1

Page 17: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Crossbar controller

• Directs data streams in the crossbar.

• Uses round-robin scheduler and address data from IP’s CRT to determine data streams’ direction.

Page 18: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Crossbar controller FSM

• One FSM for each OP and service level• Transition to working states happens when there is waiting data on either IPs and the OP is able to receive data. • Transition between working states happens when ‘end of packet’ flit received on one IP and there is waiting data on the other IP and the OP is able to receive flits.• Transition to idle state happens when OP can’t receive data or when corresponding IP changed address or emptied its buffer.

Page 19: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Network congestion

• What happens if several units want to transfer lots of data to a single other unit?

• If the packets are long enough, they will block all routers on their way.

• Solution: Data Flow control.

Page 20: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Network congestionXX

Hot-Spot

X X

X

Page 21: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Solution: Flow control

X X

Hot-SpotHSController

Page 22: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Source flow controller

• Forms and sends transmission requests to Hot-Spot controllers.

• Data transmission is controlled by source unit NoC interface (not implemented in this project).

Page 23: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Source flow controller

ProcessingUnit

ProcessingUnit

SourceFC

SourceFC

RouterTX request

Page 24: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Request packet• Request packet consists of the

following fields:HS controller address (1 byte);Source flow controller address (1 byte);amount of data requested (2 bytes);data timeout (2 bytes).

• The packet is short and can be transmitted quickly.

Page 25: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Hot-Spot flow controller

• Handles transmission requests to a single unit.

• A request remains in queue until it is fulfilled or until it expires – no need to send additional requests for the same data.

Page 26: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Hot-Spot flow controller

Router

RXRX

TXTXScheduler

Scheduler

>TimerTimer

FIFO

HS controller

Page 27: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Control protocol

• When a unit wishes to transmit data, it issues a request.

• Source flow controller transmits the request to HS control unit.

• HS controller checks if the request is still valid and queues it, otherwise it discards the request and sends NACK.

Page 28: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

• The Scheduler then takes a request from queue and checks if it is still valid.

• If the amount of data requested exceeds a certain value (max_quota), then the Scheduler allows to send only max_quota bytes of data and puts the updated request back into queue.

Control protocol

Page 29: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

• HS controller sends a packet to Source controller allowing it to send certain amount of data.

• When Source controller finishes sending the data, it sends ACK to HS controller.

• When HS controller receives ACK, it discards current request and proceeds with the next.

Control protocol

Page 30: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Control transaction

Transmission request

Transmission allowance ACK

Page 31: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

System performance

• A network was built to evaluate the latency decrease from using the flow control units.

FCFC FCFC

Periodic Source 2

Sink 2 Sink 1 Periodic Source 1

Continuous Source 1

Continuous Source 2

SinkHS controller

Page 32: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Without control units:

With control units:

System performanceLatency improvement:

average number of cycles required to send a short packet

Page 33: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

System performance

• Another network evaluates increase in “throughput fairness” from using the flow control units.

FCFC FCFC

Continuous source 4

Continuous source 2

Hot-SpotHS controller

FCFCFCFC

Continuous source 1

Continuous source 3

Page 34: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Without control units:

With control units:

System performanceIncrease in throughput fairness:

average number of long packets sent in 1 ms

Page 35: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Project status

• Implemented a 3x3 router which supports two service levels and built a simple NoC that allows data transfers between modules on the chip.

• Hardware router implemented.

Page 36: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

Project status• Traffic generator and sink implemented • Source and Hot-Spot control units

implemented. • A real-life system based on NoC with

Hot-Spot control units built and tested.-------------------------------------------------------

PROJECT COMPLETED

Page 37: Network based System on Chip Final Presentation Part B Performed by: Medvedev Alexey Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006

The End